63868feb2cc6a1fb1c76d7b54296ef4869f632be |
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26-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Use correct resource flags for Dalvik ld/st instructions to enable code motion. Change-Id: I9b371af4150b6245c0ff59eea63d83406edbbcee
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58ece73d25c78a05b94c820c5ec65b8a2edca81f |
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18-Mar-2010 |
Ben Cheng <bccheng@android.com> |
Bug fix for JIT peephole optimization. Bug: 2520500 Change-Id: I36dbd8b3a6d13c40f9735df4918ab02b5f053b07
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1f74863d3e0f19930818398f375ebf1cf2d78969 |
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03-Mar-2010 |
Bill Buzbee <buzbee@google.com> |
Jit: Sapphire tuning - mostly scheduling. Re-enabled load/store motion that had inadvertently been turned off for non-armv7 targets. Tagged memory references with the kind of memory they touch (Dalvik frame, literal pool, heap) to enable more aggressive load hoisting. Eliminated some largely duplicate code in the target specific files. Reworked temp register allocation code to allocate next temp round-robin (to improve scheduling opportunities). Overall, nice gain for Sapphire. Shows 5% to 15% on some benchmarks, and measurable improvements for Passion.
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5d90c20bd7903d7bba966b224e576bf137bf8b4b |
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23-Nov-2009 |
Ben Cheng <bccheng@google.com> |
Restructure the codegen to make architectural depedency explicit. The original Codegen.c is broken into three components: - CodegenCommon.c (arch-independend) - CodegenFactory.c (Thumb1/2 dependent) - CodegenDriver.c (Dalvik dependent) For the Thumb/Thumb2 directories, each contain the followin three files: - Factory.c (low-level routines for instruction selections) - Gen.c (invoke the ISA-specific instruction selection routines) - Ralloc.c (arch-dependent register pools) The FP directory contains FP-specific codegen routines depending on Thumb/Thumb2/VFP/PortableFP: - Thumb2VFP.c - ThumbVFP.c - ThumbPortableFP.c Then the hierarchy is formed by stacking these files in the following top-down order: 1 CodegenCommon.c 2 Thumb[2]/Factory.c 3 CodegenFactory.c 4 Thumb[2]/Gen.c 5 FP stuff 6 Thumb[2]/Ralloc.c 7 CodegenDriver.c
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72e93344b4d1ffc71e9c832ec23de0657e5b04a5 |
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13-Nov-2009 |
Jean-Baptiste Queru <jbq@google.com> |
eclair snapshot
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a4aaf68a8bafa44433ceff2bb957a481381aa9a8 |
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01-Oct-2009 |
Ben Cheng <bccheng@google.com> |
Fix a memory disambiguation and a SFP/DFP assembling bug in the JIT.
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d7d426a1d746f70edeaeccf77886f3ad8298e28c |
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22-Sep-2009 |
Ben Cheng <bccheng@google.com> |
Implemented a new scheduler and FP register allocator. Improved performance by 50% over existing JIT for some FP benchmarks.
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dcf3e5d43a1831a166f70cb9e0694cd4b0b356b0 |
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11-Sep-2009 |
Ben Cheng <bccheng@google.com> |
Model resource usage for each Thumb/Thumb2 instrution. This is an mid-point checkin to avoid future merge nightmare for the register allocator work.
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a4a7f0708e75eefae8cf9fff3f9e15699f7881be |
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27-Aug-2009 |
Bill Buzbee <buzbee@google.com> |
Improved codegen for inline, continuing codegen restructuring Added support for Thumb2 IT. Moved compare-long and floating point comparisons inline. Temporarily disabled use of Thumb2 CBZ & CBNZ because they were causing too many out-of-range assembly restarts. Bug fix for LIR3 assert.
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270c1d64a192341be842f46734054c692bac061e |
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14-Aug-2009 |
Bill Buzbee <buzbee@google.com> |
Thumb/Thumb2 instruction selection rework. Change-id: I7428278f07f49e675d0271c58b3cbf1f6a4e9da1
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7ea0f64d067cd8a2213c2c04a3291335c34d9602 |
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11-Aug-2009 |
Bill Buzbee <buzbee@google.com> |
Continuing evolution of Thumb2 support. Bug fix for local optimization Enable partial floating point store sinking (with significant perf gain!)
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9bc3df373ae6f4f7e6e97d554884d4e0dbad5494 |
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30-Jul-2009 |
Bill Buzbee <buzbee@google.com> |
Stage 3 of Thumb2 support. armv7-a now generates vfp code inline.
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89efc3d632adfa076bd622369b1ad8e4b49cf20e |
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28-Jul-2009 |
Bill Buzbee <buzbee@google.com> |
Stage 2 of structural changes for support of THUMB2. No logic changes.
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