Searched refs:INSN_RS1 (Results 1 - 1 of 1) sorted by relevance

/external/qemu/tcg/sparc/
H A Dtcg-target.c190 #define INSN_RS1(x) ((x) << 14) macro
277 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
284 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
339 tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) |
349 tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(ret) |
352 tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) |
360 tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
364 tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I5) |
373 tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I5) |
512 tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O
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