Searched refs:lsl (Results 1 - 25 of 37) sorted by relevance

12

/external/openssl/crypto/0.9.9-dev/aes/
H A Daes-armv4.pl166 orr $s0,$s0,$t1,lsl#8
167 orr $s0,$s0,$t2,lsl#16
168 orr $s0,$s0,$t3,lsl#24
173 orr $s1,$s1,$t1,lsl#8
174 orr $s1,$s1,$t2,lsl#16
175 orr $s1,$s1,$t3,lsl#24
180 orr $s2,$s2,$t1,lsl#8
181 orr $s2,$s2,$t2,lsl#16
182 orr $s2,$s2,$t3,lsl#24
187 orr $s3,$s3,$t1,lsl#
[all...]
H A Daes-armv4.s126 orr r0,r0,r4,lsl#8
127 orr r0,r0,r5,lsl#16
128 orr r0,r0,r6,lsl#24
133 orr r1,r1,r4,lsl#8
134 orr r1,r1,r5,lsl#16
135 orr r1,r1,r6,lsl#24
140 orr r2,r2,r4,lsl#8
141 orr r2,r2,r5,lsl#16
142 orr r2,r2,r6,lsl#24
147 orr r3,r3,r4,lsl#
[all...]
/external/openssl/crypto/0.9.9-dev/sha/
H A Dsha512-armv4.pl65 eor $t0,$t0,$Ehi,lsl#18
66 eor $t1,$t1,$Elo,lsl#18
69 eor $t0,$t0,$Ehi,lsl#14
70 eor $t1,$t1,$Elo,lsl#14
73 eor $t0,$t0,$Elo,lsl#23
74 eor $t1,$t1,$Ehi,lsl#23 @ Sigma1(e)
119 eor $t0,$t0,$Ahi,lsl#4
120 eor $t1,$t1,$Alo,lsl#4
123 eor $t0,$t0,$Alo,lsl#30
124 eor $t1,$t1,$Ahi,lsl#3
[all...]
H A Dsha512-armv4.s52 add r2,r1,r2,lsl#7 @ len to point at the end of inp
94 orr r3,r3,r9,lsl#8
96 orr r3,r3,r10,lsl#16
98 orr r3,r3,r11,lsl#24
99 orr r4,r4,r12,lsl#8
100 orr r4,r4,r9,lsl#16
101 orr r4,r4,r10,lsl#24
111 eor r9,r9,r8,lsl#18
112 eor r10,r10,r7,lsl#18
115 eor r9,r9,r8,lsl#1
[all...]
H A Dsha256-armv4.s29 add r2,r1,r2,lsl#6 @ len to point at the end of inp
39 orr r3,r3,r12,lsl#8
40 orr r3,r3,r2,lsl#16
41 orr r3,r3,r0,lsl#24
69 orr r3,r3,r12,lsl#8
70 orr r3,r3,r2,lsl#16
71 orr r3,r3,r0,lsl#24
99 orr r3,r3,r12,lsl#8
100 orr r3,r3,r2,lsl#16
101 orr r3,r3,r0,lsl#2
[all...]
H A Dsha1-armv4-large.s9 add r2,r1,r2,lsl#6 @ r2 to point at the end of r1
23 orr r10,r11,r10,lsl#8
25 orr r10,r12,r10,lsl#8
27 orr r10,r11,r10,lsl#8
38 orr r10,r11,r10,lsl#8
40 orr r10,r12,r10,lsl#8
42 orr r10,r11,r10,lsl#8
53 orr r10,r11,r10,lsl#8
55 orr r10,r12,r10,lsl#8
57 orr r10,r11,r10,lsl#
[all...]
H A Dsha1-armv4-large.pl68 orr $t0,$t1,$t0,lsl#8
70 orr $t0,$t2,$t0,lsl#8
72 orr $t0,$t1,$t0,lsl#8
151 add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp
H A Dsha256-armv4.pl48 orr $T1,$T1,$t2,lsl#8
49 orr $T1,$T1,$t1,lsl#16
50 orr $T1,$T1,$t0,lsl#24
129 add $len,$inp,$len,lsl#6 @ len to point at the end of inp
/external/opencore/codecs_v2/audio/mp3/dec/src/asm/
H A Dpvmp3_mdct_18_arm.s70 mov lr,lr,lsl #1
77 add r8,r8,r10,lsl #5
88 add lr,lr,r9,lsl #4
143 add r1,r5,r4,lsl #2
145 ldr r3,[r6,r4,lsl #2]
148 ldr lr,[r7,r4,lsl #2]
154 str r3,[r5,r4,lsl #2]
155 str r2,[r6,r4,lsl #2]
166 ldr lr,[r7,r4,lsl #2]
167 mov r3,r3,lsl #
[all...]
H A Dpvmp3_mdct_18_gcc.s68 mov lr,lr,lsl #1
75 add r8,r8,r10,lsl #5
86 add lr,lr,r9,lsl #4
141 add r1,r5,r4,lsl #2
143 ldr r3,[r6,r4,lsl #2]
146 ldr lr,[r7,r4,lsl #2]
152 str r3,[r5,r4,lsl #2]
153 str r2,[r6,r4,lsl #2]
164 ldr lr,[r7,r4,lsl #2]
165 mov r3,r3,lsl #
[all...]
H A Dpvmp3_mdct_18_wm.asm68 mov lr,lr,lsl #1
75 add r8,r8,r10,lsl #5
86 add lr,lr,r9,lsl #4
141 add r1,r5,r4,lsl #2
143 ldr r3,[r6,r4,lsl #2]
146 ldr lr,[r7,r4,lsl #2]
152 str r3,[r5,r4,lsl #2]
153 str r2,[r6,r4,lsl #2]
164 ldr lr,[r7,r4,lsl #2]
165 mov r3,r3,lsl #
[all...]
H A Dpvmp3_dct_16_gcc.s62 mov r3,r3,lsl #3
81 mov r4,r4,lsl #1
100 mov r6,r6,lsl #1
126 mov r12,r12,lsl #2
133 mov r1,r1,lsl #1
144 mov r7,r7,lsl #1
154 mov r3,r3,lsl #1
158 mov r12,r12,lsl #2
162 mov r2,r2,lsl #1
164 mov r4,r4,lsl #
[all...]
H A Dpvmp3_dct_9_arm.s83 mov r9,r1,lsl #1
102 mov r1,r12,lsl #1
120 mov r1,r6,lsl #1
129 mov r1,r5,lsl #1
135 mov r2,r4,lsl #1
139 mov r3,r3,lsl #1
145 mov r12,lr,lsl #1
151 mov lr,lr,lsl #1
H A Dpvmp3_dct_9_gcc.s73 mov r9,r1,lsl #1
86 mov r1,r12,lsl #1
109 mov r1,r6,lsl #1
118 mov r1,r5,lsl #1
124 mov r2,r4,lsl #1
128 mov r3,r3,lsl #1
134 mov r12,lr,lsl #1
140 mov lr,lr,lsl #1
H A Dpvmp3_polyphase_filter_window_arm.s66 add r3,r0,r2,lsl #2
70 add r12,r0,r2,lsl #2
158 mov r2,r10,lsl r2
159 add r4,r4,r2,lsl #1
168 rsb r2,r2,r12,lsl #5
169 add r2,r11,r2,lsl #1
182 add r2,r0,r3,lsl #2
222 mov r1,r1,lsl r2
223 add r1,r12,r1,lsl #1
H A Dpvmp3_polyphase_filter_window_gcc.s64 add r3,r0,r2,lsl #2
68 add r12,r0,r2,lsl #2
156 mov r2,r10,lsl r2
157 add r4,r4,r2,lsl #1
166 rsb r2,r2,r12,lsl #5
167 add r2,r11,r2,lsl #1
180 add r2,r0,r3,lsl #2
220 mov r1,r1,lsl r2
221 add r1,r12,r1,lsl #1
H A Dpvmp3_polyphase_filter_window_wm.asm61 add r3,r0,r2,lsl #2
65 add r12,r0,r2,lsl #2
153 mov r2,r10,lsl r2
154 add r4,r4,r2,lsl #1
163 rsb r2,r2,r12,lsl #5
164 add r2,r11,r2,lsl #1
177 add r2,r0,r3,lsl #2
217 mov r1,r1,lsl r2
218 add r1,r12,r1,lsl #1
/external/jpeg/
H A Djidctfst.S116 sub r4, r0, r4, lsl #1
129 sub r6, r2, r6, lsl #1
140 sub r8, r0, r2, lsl #1
142 sub r6, r4, r6, lsl #1
181 rsb r2, r0, r5, lsl #1
182 rsb r6, r4, r1, lsl #1
228 sub r7, r0, r7, lsl #1
230 sub r6, r1, r6, lsl #1
232 sub r5, r2, r5, lsl #1
234 add r4, r3, r4, lsl #
[all...]
/external/skia/src/core/asm/
H A Ds32a_d565_opaque.S40 mov r2, r1, lsl #8
50 mov r3, r1, lsl #16
77 mov r2, ip, lsl #5
79 orr ip, r2, r1, lsl #11
/external/opencore/codecs_v2/audio/gsm_amr/amr_wb/dec/src/
H A Dpvamrwbdecoder_basic_op_armv5.h69 mov L_var_out, var1, lsl #16
70 mov L_var_aux, var2, lsl #16
86 mov L_var_out, var1, lsl #16
87 mov L_var_aux, var2, lsl #16
/external/webkit/JavaScriptCore/assembler/
H A DMacroAssemblerARM.cpp72 op2 = m_assembler.lsl(address.index, static_cast<int>(address.scale));
89 m_assembler.orr_r(dest, dest, m_assembler.lsl(ARMRegisters::S0, 16));
/external/opencore/codecs_v2/video/avc_h264/enc/src/
H A Dsad_mb_offset.h79 x10 = x10 | (x11 << (32 - SHIFT)); /* bic x10, x10, x11, lsl #8 = ~G ~F ~E ~D */
156 BIC x10, x10, x11, lsl #(32-SHIFT);
158 BIC x11, x11, x12, lsl #(32-SHIFT);
179 BIC x10, x10, x11, lsl #(32-SHIFT);
181 BIC x11, x11, x12, lsl #(32-SHIFT);
247 __asm__ volatile("MVN %0, %0, lsr #8\n\tBIC %0, %0, %1,lsl #24\n\tMVN %1, %1,lsr #8\n\tBIC %1, %1, %2,lsl #24": "=&r"(x10), "=&r"(x11): "r"(x12));
249 __asm__ volatile("MVN %0, %0, lsr #16\n\tBIC %0, %0, %1,lsl #16\n\tMVN %1, %1,lsr #16\n\tBIC %1, %1, %2,lsl #16": "=&r"(x10), "=&r"(x11): "r"(x12));
251 __asm__ volatile("MVN %0, %0, lsr #24\n\tBIC %0, %0, %1,lsl #
[all...]
H A Dsad_inline.h195 RSB x7, x7, x7, lsl #8; local
213 RSB x7, x7, x7, lsl #8; local
261 MOVS x8, ref, lsl #31 ; local
351 __asm__ volatile("EOR %1, %2, %0\n\tSUBS %0, %2, %0\n\tEOR %1, %1, %0\n\tAND %1, %3, %1, lsr #1\n\tORRCC %1, %1, #0x80000000\n\tRSB %1, %1, %1, lsl #8\n\tADD %0, %0, %1, asr #7\n\tEOR %0, %0, %1, asr #7": "=r"(src1), "=&r"(x7): "r"(src2), "r"(mask));
360 __asm__ volatile("EOR %1, %2, %0\n\tADDS %0, %2, %0\n\tEOR %1, %1, %0\n\tANDS %1, %3, %1, rrx\n\tRSB %1, %1, %1, lsl #8\n\tSUB %0, %0, %1, asr #7\n\tEOR %0, %0, %1, asr #7": "=r"(src1), "=&r"(x7): "r"(src2), "r"(mask));
/external/opencore/codecs_v2/video/m4v_h263/enc/src/
H A Dsad_mb_offset.h84 x10 = x10 | (x11 << (32 - SHIFT)); /* bic x10, x10, x11, lsl #8 = ~G ~F ~E ~D */
162 BIC x10, x10, x11, lsl #(32-SHIFT);
164 BIC x11, x11, x12, lsl #(32-SHIFT);
185 BIC x10, x10, x11, lsl #(32-SHIFT);
187 BIC x11, x11, x12, lsl #(32-SHIFT);
256 "bic %0, %0, %1, lsl %6\n\t"
258 "bic %1, %1, %2, lsl %6\n\t"
278 "bic %0, %0, %1, lsl %6\n\t"
280 "bic %1, %1, %2, lsl %6\n\t"
H A Dvlc_encode_inline.h138 mov run, run, lsl #1 /* 05/09/02 */
180 mov run, run, lsl #1 /* 09/02/05 */
247 "mov %1, %1, lsl #1\n\t"
282 "mov %1, %1, lsl #1\n\t"

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