1a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber/* ------------------------------------------------------------------ 2a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * Copyright (C) 1998-2009 PacketVideo 3a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * 4a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * Licensed under the Apache License, Version 2.0 (the "License"); 5a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * you may not use this file except in compliance with the License. 6a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * You may obtain a copy of the License at 7a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * 8a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * http://www.apache.org/licenses/LICENSE-2.0 9a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * 10a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * Unless required by applicable law or agreed to in writing, software 11a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * distributed under the License is distributed on an "AS IS" BASIS, 12a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either 13a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * express or implied. 14a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * See the License for the specific language governing permissions 15a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * and limitations under the License. 16a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber * ------------------------------------------------------------------- 17a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber */ 18a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber/**************************************************************************************** 19a30d40083856cb4edd225faf8b488fab156e5976Andreas HuberPortions of this file are derived from the following 3GPP standard: 20a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 21a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 3GPP TS 26.173 22a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber ANSI-C code for the Adaptive Multi-Rate - Wideband (AMR-WB) speech codec 23a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber Available from http://www.3gpp.org 24a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 25a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber(C) 2007, 3GPP Organizational Partners (ARIB, ATIS, CCSA, ETSI, TTA, TTC) 26a30d40083856cb4edd225faf8b488fab156e5976Andreas HuberPermission to distribute, modify and use this file under the standard license 27a30d40083856cb4edd225faf8b488fab156e5976Andreas Huberterms listed above has been obtained from the copyright holder. 28a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber****************************************************************************************/ 29a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber/* 30a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber------------------------------------------------------------------------------ 31a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 32a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 33a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 34a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber Pathname: ./src/pvamrwbdecoder_basic_op_gcc_armv5.h 35a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 36a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber Date: 05/07/2007 37a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 38a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber------------------------------------------------------------------------------ 39a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber REVISION HISTORY 40a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 41a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber Description: 42a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber------------------------------------------------------------------------------ 43a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber INCLUDE DESCRIPTION 44a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 45a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber------------------------------------------------------------------------------ 46a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber*/ 47a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 48a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#ifndef PVAMRWBDECODER_BASIC_OP_GCC_ARMV5_H 49a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#define PVAMRWBDECODER_BASIC_OP_GCC_ARMV5_H 50a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 51a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#ifdef __cplusplus 52a30d40083856cb4edd225faf8b488fab156e5976Andreas Huberextern "C" 53a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 54a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#endif 55a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 56a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 57a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#if (defined(PV_ARM_GCC_V5)||defined(PV_ARM_GCC_V4)) 58a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 59a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int16 sub_int16(int16 var1, int16 var2) 60a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber { 61a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 62a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_aux; 63a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)var1; 64a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)var2; 65a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 66a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 67a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %2, lsl #16\n" 68a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %1, %3, lsl #16\n" 69a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qsub %0, %0, %1\n" 70a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %0, asr #16" 71a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out), 72a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "=&r*i"(L_var_aux) 73a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 74a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 75a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 76a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (int16)L_var_out; 77a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 78a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 79a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 80a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int16 add_int16(int16 var1, int16 var2) 81a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 82a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 83a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_aux; 84a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)var1; 85a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)var2; 86a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 87a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 88a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %2, lsl #16\n" 89a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %1, %3, lsl #16\n" 90a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %0, %1\n" 91a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %0, asr #16" 92a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out), 93a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "=&r*i"(L_var_aux) 94a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 95a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 96a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 97a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (int16)L_var_out; 98a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 99a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 100a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 101a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 mul_32by16(int16 hi, int16 lo, int16 n) 102a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 103a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 H_32; 104a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_32; 105a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)hi; 106a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)lo; 107a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rc = (int32)n; 108a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 109a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 110a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 111a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %0, %2, %4\n" 112a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %1, %3, %4\n" 113a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "add %0, %0, %1, asr #15\n" 114a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %0, %0" 115a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(H_32), 116a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "=&r*i"(L_32) 117a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 118a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb), 119a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rc)); 120a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 121a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return H_32; 122a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 123a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 124a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 125a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 sub_int32(int32 L_var1, int32 L_var2) 126a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 127a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 128a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = L_var1; 129a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = L_var2; 130a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 131a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 132a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qsub %0, %1, %2" 133a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 134a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 135a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 136a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 137a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return L_var_out; 138a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 139a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 140a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 add_int32(int32 L_var1, int32 L_var2) 141a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 142a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 143a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = L_var1; 144a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = L_var2; 145a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 146a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 147a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %1, %2" 148a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 149a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 150a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 151a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 152a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return L_var_out; 153a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 154a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 155a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 msu_16by16_from_int32(int32 L_var3, int16 var1, int16 var2) 156a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 157a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 158a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)var1; 159a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)var2; 160a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rc = L_var3; 161a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 162a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 163a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %0, %1, %2\n" 164a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qdsub %0, %3, %0" 165a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 166a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 167a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb), 168a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rc)); 169a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 170a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return L_var_out; 171a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 172a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 173a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 174a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 mac_16by16_to_int32(int32 L_var3, int16 var1, int16 var2) 175a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 176a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 177a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)var1; 178a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)var2; 179a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rc = L_var3; 180a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 181a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 182a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %0, %1, %2\n" 183a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qdadd %0, %3, %0" 184a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 185a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 186a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb), 187a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rc)); 188a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 189a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return L_var_out; 190a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 191a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 192a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 193a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 mul_16by16_to_int32(int16 var1, int16 var2) 194a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 195a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 196a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)var1; 197a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)var2; 198a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 199a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 200a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %0, %1, %2\n" 201a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %0, %0" 202a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 203a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 204a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 205a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 206a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return L_var_out; 207a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 208a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 209a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 210a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int16 mult_int16(int16 var1, int16 var2) 211a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 212a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 213a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)var1; 214a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)var2; 215a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 216a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 217a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %0, %1, %2\n" 218a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %0, asr #15" 219a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 220a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 221a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 222a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 223a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (int16)L_var_out; 224a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 225a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 226a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int16 amr_wb_round(int32 L_var1) 227a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 228a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 229a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)L_var1; 230a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)0x00008000L; 231a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 232a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 233a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %1, %2\n" 234a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %0, asr #16" 235a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 236a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 237a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 238a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (int16)L_var_out; 239a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 240a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 241a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int16 amr_wb_shl1_round(int32 L_var1) 242a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 243a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 L_var_out; 244a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)L_var1; 245a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)0x00008000L; 246a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 247a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 248a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %1, %1\n" 249a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "qadd %0, %0, %2\n" 250a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "mov %0, %0, asr #16" 251a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(L_var_out) 252a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 253a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 254a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (int16)L_var_out; 255a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 256a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 257a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 258a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 fxp_mac_16by16(const int16 L_var1, const int16 L_var2, int32 L_add) 259a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 260a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 tmp; 261a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)L_var1; 262a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)L_var2; 263a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rc = (int32)L_add; 264a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 265a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 266a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smlabb %0, %1, %2, %3" 267a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(tmp) 268a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 269a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb), 270a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rc)); 271a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (tmp); 272a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 273a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 274a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 fxp_mul_16by16bb(int16 L_var1, const int16 L_var2) 275a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 276a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 tmp; 277a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)L_var1; 278a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)L_var2; 279a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 280a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 281a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulbb %0, %1, %2" 282a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(tmp) 283a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 284a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 285a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (tmp); 286a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 287a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 288a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 289a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#define fxp_mul_16by16(a, b) fxp_mul_16by16bb( a, b) 290a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 291a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 292a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber static inline int32 fxp_mul32_by_16(int32 L_var1, const int32 L_var2) 293a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber{ 294a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 tmp; 295a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 ra = (int32)L_var1; 296a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber register int32 rb = (int32)L_var2; 297a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 298a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber asm volatile( 299a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "smulwb %0, %1, %2" 300a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "=&r*i"(tmp) 301a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber : "r"(ra), 302a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber "r"(rb)); 303a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber return (tmp); 304a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber } 305a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 306a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#define fxp_mul32_by_16b( a, b) fxp_mul32_by_16( a, b) 307a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 308a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 309a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#endif 310a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 311a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#ifdef __cplusplus 312a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber} 313a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#endif 314a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 315a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 316a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 317a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 318a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber#endif /* PVAMRWBDECODER_BASIC_OP_GCC_ARMV5_H */ 319a30d40083856cb4edd225faf8b488fab156e5976Andreas Huber 320