/dalvik/vm/compiler/codegen/arm/FP/ |
H A D | ThumbVFP.c | 27 * Take the address of a Dalvik register and store it into rDest. 32 int rDest) 44 dvmCompilerClobber(cUnit, rDest); 45 dvmCompilerLockTemp(cUnit, rDest); 46 opRegRegImm(cUnit, kOpAdd, rDest, rFP, 31 loadValueAddressDirect(CompilationUnit *cUnit, RegLocation rlSrc, int rDest) argument
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/dalvik/vm/compiler/codegen/arm/ |
H A D | CodegenFactory.c | 30 int rDest) 32 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord, 29 loadWordDisp(CompilationUnit *cUnit, int rBase, int displacement, int rDest) argument
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H A D | CodegenDriver.c | 4454 ArmLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument 4456 return genRegCopyNoInsert(cUnit, rDest, rSrc); 4460 ArmLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument 4462 return genRegCopy(cUnit, rDest, rSrc);
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/dalvik/vm/compiler/codegen/arm/Thumb/ |
H A D | Factory.c | 31 int rDest); 46 * 1) rDest is freshly returned from dvmCompilerAllocTemp or 49 static ArmLIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest, argument 53 int tDest = LOWREG(rDest) ? rDest : dvmCompilerAllocTemp(cUnit); 57 if (rDest != tDest) { 58 opRegReg(cUnit, kOpMov, rDest, tDest); 65 if (rDest != tDest) { 66 opRegReg(cUnit, kOpMov, rDest, tDest); 89 if (rDest ! 113 loadConstant(CompilationUnit *cUnit, int rDest, int value) argument 229 opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest, int rSrc1, int rSrc2) argument 257 opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest, int rSrc1, int value) argument 448 loadBaseIndexed(CompilationUnit *cUnit, int rBase, int rIndex, int rDest, int scale, OpSize size) argument 554 loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, int rDestHi, OpSize size, int sReg) argument 676 loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, OpSize size, int sReg) argument 818 genRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument 842 genRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb2/ |
H A D | Factory.c | 51 static ArmLIR *loadFPConstantValue(CompilationUnit *cUnit, int rDest, argument 55 assert(SINGLEREG(rDest)); 57 return newLIR2(cUnit, kThumb2Vmovs_IMM8, rDest, encodedImm); 66 loadPcRel->operands[0] = rDest; 70 if (rDest != rlr) 135 * 1) rDest is freshly returned from dvmCompilerAllocTemp or 138 static ArmLIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest, argument 144 if (FPREG(rDest)) { 145 return loadFPConstantValue(cUnit, rDest, value); 149 if (LOWREG(rDest) 206 loadConstant(CompilationUnit *cUnit, int rDest, int value) argument 384 opRegRegRegShift(CompilationUnit *cUnit, OpKind op, int rDest, int rSrc1, int rSrc2, int shift) argument 448 opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest, int rSrc1, int rSrc2) argument 454 opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest, int rSrc1, int value) argument 676 loadBaseIndexed(CompilationUnit *cUnit, int rBase, int rIndex, int rDest, int scale, OpSize size) argument 805 loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, int rDestHi, OpSize size, int sReg) argument 922 loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, OpSize size, int sReg) argument 1124 fpRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument 1150 genRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument 1176 genRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument [all...] |