1/*
2 * fwDebug.c
3 *
4 * Copyright(c) 1998 - 2009 Texas Instruments. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 *  * Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 *  * Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in
15 *    the documentation and/or other materials provided with the
16 *    distribution.
17 *  * Neither the name Texas Instruments nor the names of its
18 *    contributors may be used to endorse or promote products derived
19 *    from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34
35
36/** \file  FWDebug.c
37 *
38 *  \see   FWDebug.h
39 */
40
41#define __FILE_ID__  FILE_ID_103
42#include "tidef.h"
43#include "fwDebug_api.h"
44#include "osApi.h"
45#include "report.h"
46#include "BusDrv.h"
47#include "TwIf.h"
48
49
50
51#define DMA_SIZE_BUF 256
52
53typedef struct
54{
55    TI_HANDLE       hOs;
56    TI_HANDLE       hReport;
57	TI_HANDLE		hTwif;
58
59	TFwDubCallback	fCb;
60	TI_HANDLE hCb;
61
62	TI_UINT8*		pReadBuf;
63
64	TTxnStruct		tTxn;
65	TI_UINT8*		pDMABuf;
66
67}TFwDebug;
68
69/* Local functions */
70static void     fwDbg_WriteAddrCb   (TI_HANDLE hFwDebug,TTxnStruct* pTxn);
71static void     fwDbg_ReadAddrCb    (TI_HANDLE hFwDebug,TTxnStruct* pTxn);
72
73
74
75/*
76 * \brief	Create the FW Debug module
77 *
78 * \param  hOs  - Handle to OS
79 * \return The created object
80 *
81 * \par Description
82 * This function will allocate memory to FW Debug module.
83 *
84 * \sa
85 */
86TI_HANDLE fwDbg_Create (TI_HANDLE hOs)
87{
88	TFwDebug* pFwDebug = (TFwDebug*)os_memoryAlloc(hOs,sizeof(TFwDebug));
89	pFwDebug->hOs = hOs;
90	return pFwDebug;
91}
92
93
94/*
95 * \brief	Initialize the module
96 *
97 * \param  hFwDebug  - Handle to FW Debug
98 * \param  hReport - Handle to report
99 * \param  hTwif - Handle to TWIF
100 * \return none
101 *
102 * \par Description
103 *
104 *
105 * \sa
106 */
107void fwDbg_Init (TI_HANDLE hFwDebug,
108				 TI_HANDLE hReport,
109				 TI_HANDLE hTwif)
110{
111	TFwDebug* pFwDebug = (TFwDebug*)hFwDebug;
112	pFwDebug->hReport  = hReport;
113	pFwDebug->hTwif	   = hTwif;
114
115	/* Allocate DMA memory for read write transact */
116	pFwDebug->pDMABuf = (TI_UINT8*)os_memoryAlloc(pFwDebug->hOs,DMA_SIZE_BUF);
117}
118
119
120/*
121 * \brief	Destroy the object
122 *
123 * \param  hFwDebug  - Handle to FW Debug
124 * \return none
125 *
126 * \par Description
127 * Deallocate the object memory
128 *
129 * \sa
130 */
131void fwDbg_Destroy (TI_HANDLE hFwDebug)
132{
133	TFwDebug* pFwDebug = (TFwDebug*)hFwDebug;
134
135	if (pFwDebug)
136	{
137		if (pFwDebug->pDMABuf)
138    	{
139    		os_memoryFree(pFwDebug->hOs,pFwDebug->pDMABuf,DMA_SIZE_BUF);
140    	}
141        os_memoryFree(pFwDebug->hOs,pFwDebug,sizeof(pFwDebug));
142	}
143}
144
145
146/*
147 * \brief	Write Address to FW
148 *
149 * \param  hFwDebug  - Handle to FW Debug
150 * \param  Address - Absolute HW address
151 * \param  Length - Length in byte to write
152 * \param  Buffer - Buffer to copy to FW
153 * \param  fCb - CB function
154 * \param  hCb - CB Handle
155 * \return none
156 *
157 * \par Description
158 * Write buffer to HW must receive length in byte max size 256 bytes
159 * address must be absolute HW address.
160 *
161 * \sa
162 */
163TI_STATUS fwDbg_WriteAddr (TI_HANDLE hFwDebug,
164                           TI_UINT32 Address,
165                           TI_UINT32 Length,
166                           TI_UINT8* Buffer,
167                           TFwDubCallback fCb,
168                           TI_HANDLE hCb)
169{
170	TI_STATUS rc;
171	TTxnStruct *pTxn;
172	TFwDebug* pFwDebug = (TFwDebug*)hFwDebug;
173
174	pTxn = &pFwDebug->tTxn;
175
176	/* check if length is large than default threshold */
177	if (Length > DMA_SIZE_BUF)
178    {
179TRACE1(pFwDebug->hOs, REPORT_SEVERITY_ERROR, "fwDbg_WriteAddr : Buffer Length too large -- %d",Length);
180		return TXN_STATUS_ERROR;
181    }
182
183	pFwDebug->fCb = fCb;
184	pFwDebug->hCb = hCb;
185	/* copy the given buffer to DMA buffer */
186	os_memoryCopy(pFwDebug->hOs,pFwDebug->pDMABuf,Buffer,Length);
187	/* Build the command TxnStruct */
188    TXN_PARAM_SET(pTxn, TXN_LOW_PRIORITY, TXN_FUNC_ID_WLAN, TXN_DIRECTION_WRITE, TXN_INC_ADDR)
189	/* Applying a CB in case of an async read */
190    BUILD_TTxnStruct(pTxn, Address, pFwDebug->pDMABuf, Length,(TTxnDoneCb)fwDbg_WriteAddrCb, pFwDebug)
191	rc = twIf_Transact(pFwDebug->hTwif,pTxn);
192
193	return rc;
194}
195
196
197/*
198 * \brief	Read Address to FW
199 *
200 * \param  hFwDebug  - Handle to FW Debug
201 * \param  Address - Absolute HW address
202 * \param  Length - Length in byte to write
203 * \param  Buffer - Buffer to copy to FW
204 * \param  fCb - CB function
205 * \param  hCb - CB Handle
206 * \return none
207 *
208 * \par Description
209 * Read from HW, must receive length in byte max size 256 bytes
210 * address must be absolute HW address.
211 *
212 * \sa
213 */
214TI_STATUS fwDbg_ReadAddr (TI_HANDLE hFwDebug,
215                          TI_UINT32 Address,
216                          TI_UINT32 Length,
217                          TI_UINT8* Buffer,
218                          TFwDubCallback fCb,
219                          TI_HANDLE hCb)
220{
221	TI_STATUS rc;
222	TTxnStruct *pTxn;
223	TFwDebug *pFwDebug = (TFwDebug*)hFwDebug;
224	pTxn = &pFwDebug->tTxn;
225	/* check if length is large than default threshold */
226	if (Length > DMA_SIZE_BUF)
227	{
228TRACE1(pFwDebug->hOs, REPORT_SEVERITY_ERROR, "fwDbg_ReadAddr : Buffer Length too large -- %d",Length);
229		return TXN_STATUS_ERROR;
230	}
231
232	pFwDebug->fCb = fCb;
233	pFwDebug->hCb = hCb;
234	pFwDebug->pReadBuf = Buffer;
235
236	/* Build the command TxnStruct */
237    TXN_PARAM_SET(pTxn, TXN_LOW_PRIORITY, TXN_FUNC_ID_WLAN, TXN_DIRECTION_READ, TXN_INC_ADDR)
238	/* Applying a CB in case of an async read */
239    BUILD_TTxnStruct(pTxn, Address, pFwDebug->pDMABuf, Length,(TTxnDoneCb)fwDbg_ReadAddrCb, pFwDebug)
240	rc = twIf_Transact(pFwDebug->hTwif,pTxn);
241	if (rc == TXN_STATUS_COMPLETE)
242    {
243		/* copy from DMA buufer to given buffer */
244		os_memoryCopy(pFwDebug->hOs,pFwDebug->pReadBuf,pFwDebug->pDMABuf,Length);
245	}
246	return rc;
247}
248
249
250/*
251 * \brief	Write CB function
252 *
253 * \param  hFwDebug  - Handle to FW Debug
254 * \param  pTxn - pointer ti Transact
255 * \return none
256 *
257 * \par Description
258 * This function called from TWIF upon Async Write
259 *
260 * \sa
261 */
262static void fwDbg_WriteAddrCb (TI_HANDLE hFwDebug,TTxnStruct* pTxn)
263{
264	TFwDebug *pFwDebug = (TFwDebug*)hFwDebug;
265
266	if (pFwDebug->fCb && pFwDebug->hCb)
267    {
268		pFwDebug->fCb(pFwDebug->hCb);
269    }
270}
271
272
273/*
274 * \brief	Read CB function
275 *
276 * \param  hFwDebug  - Handle to FW Debug
277 * \param  pTxn - pointer ti Transact
278 * \return none
279 *
280 * \par Description
281 * This function called from TWIF upon Async Read
282 *
283 * \sa
284 */
285static void fwDbg_ReadAddrCb (TI_HANDLE hFwDebug,TTxnStruct* pTxn)
286{
287	TFwDebug *pFwDebug = (TFwDebug*)hFwDebug;
288	/* copy from DMA buufer to given buffer */
289	os_memoryCopy(pFwDebug->hOs,pFwDebug->pReadBuf,pFwDebug->pDMABuf,pTxn->aLen[0]);
290
291	if (pFwDebug->fCb && pFwDebug->hCb)
292    {
293		pFwDebug->fCb(pFwDebug->hCb);
294    }
295}
296
297
298/*
299 * \brief	Check HW address
300 *
301 * \param  hFwDebug  - Handle to FW Debug
302 * \return TI_TRUE, TI_FALSE
303 *
304 * \par Description
305 * This function called to check the given address to be a valid memory address.
306 *
307 * \sa
308 */
309TI_BOOL fwDbg_isValidMemoryAddr (TI_HANDLE hFwDebug, TI_UINT32 Address, TI_UINT32 Length)
310{
311	TFwDebug *pFwDebug = (TFwDebug*)hFwDebug;
312
313	return twIf_isValidMemoryAddr(pFwDebug->hTwif, Address, Length);
314}
315
316
317/*
318 * \brief	Check HW address
319 *
320 * \param  hFwDebug  - Handle to FW Debug
321 * \return TI_TRUE, TI_FALSE
322 *
323 * \par Description
324 * This function called to check the given address to be a valid register address.
325 *
326 * \sa
327 */
328TI_BOOL fwDbg_isValidRegAddr (TI_HANDLE hFwDebug, TI_UINT32 Address, TI_UINT32 Length)
329{
330	TFwDebug *pFwDebug = (TFwDebug*)hFwDebug;
331
332	return twIf_isValidRegAddr(pFwDebug->hTwif, Address, Length);
333}
334
335