Cross Reference: /external/llvm/lib/CodeGen/RegisterCoalescer.cpp

Lines Matching refs:LIS
87     LiveIntervals *LIS;
419   if (!LIS->hasInterval(CP.getDstReg()))
423     LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg());
425     LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg());
426   SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getDefIndex();
482     LIS->getInstructionFromIndex(ValLR->end.getPrevSlot());
496       if (LIS->hasInterval(*AS) && IntA.overlaps(LIS->getInterval(*AS))) {
499             LIS->getInterval(*AS).print(dbgs(), TRI);
526       if (!LIS->hasInterval(*SR))
528       LiveInterval &SRLI = LIS->getInterval(*SR);
531                                                 LIS->getVNInfoAllocator())));
561     LIS->shrinkToUses(&IntA);
625   if (!LIS->hasInterval(CP.getDstReg()))
628   SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getDefIndex();
631     LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg());
633     LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg());
651   MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def);
688       if (LIS->hasInterval(*AS) &&
689           HasOtherReachingDefs(IntA, LIS->getInterval(*AS), AValNo, 0))
698     SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
720     LIS->ReplaceMachineInstrInMaps(DefMI, NewMI);
750     SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getUseIndex();
802   SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getUseIndex();
808   MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def);
854   LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI);
863     LIS->shrinkToUses(&SrcInt);
877   SlotIndex Idx = LIS->getInstructionIndex(CopyMI);
878   LiveInterval *SrcInt = &LIS->getInterval(CP.getSrcReg());
881   LiveInterval *DstInt = &LIS->getInterval(CP.getDstReg());
902     SlotIndex Idx = LIS->getInstructionIndex(MI);
936           ReMaterializeTrivialDef(LIS->getInterval(SrcReg), false,
986           dbgs() << LIS->getInstructionIndex(UseMI) << "\t";
995 static bool removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *LIS,
1000         if (!LIS->hasInterval(*SR))
1002         LiveInterval &sli = LIS->getInterval(*SR);
1004           LIS->removeInterval(*SR);
1006     LIS->removeInterval(li.reg);
1016   SlotIndex DefIdx = LIS->getInstructionIndex(DefMI).getDefIndex();
1021   return removeIntervalIfEmpty(li, LIS, TRI);
1026   SlotIndex DefIdx = LIS->getInstructionIndex(CopyMI).getDefIndex();
1027   if (LIS->hasInterval(DstReg)) {
1028     LiveInterval &LI = LIS->getInterval(DstReg);
1036     if (!LIS->hasInterval(*AS))
1038     LiveInterval &LI = LIS->getInterval(*AS);
1051   bool Allocatable = LIS->isAllocatable(CP.getDstReg());
1052   LiveInterval &JoinVInt = LIS->getInterval(CP.getSrcReg());
1075   if (LIS->hasInterval(CP.getDstReg()) &&
1076       LIS->getInterval(CP.getDstReg()).ranges.size() > 1000) {
1088     unsigned Length = LIS->getApproximateInstructionCount(JoinVInt);
1114       (LIS->getFuncInstructionCount() / NewRCCount) < 8)
1116   LiveInterval &SrcInt = LIS->getInterval(SrcReg);
1117   LiveInterval &DstInt = LIS->getInterval(DstReg);
1118   unsigned SrcSize = LIS->getApproximateInstructionCount(SrcInt);
1119   unsigned DstSize = LIS->getApproximateInstructionCount(DstInt);
1160   DEBUG(dbgs() << LIS->getInstructionIndex(CopyMI) << '\t' << *CopyMI);
1192           ReMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
1216     if (!CP.getSubIdx() && LIS->getInterval(CP.getSrcReg()).ranges.size() >
1217                            LIS->getInterval(CP.getDstReg()).ranges.size())
1231         ReMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
1269     LiveInterval &SrcInt = LIS->getInterval(CP.getSrcReg());
1272       LIS->findLiveInMBBs(I->start, I->end, BlockSeq);
1284   LIS->removeInterval(CP.getSrcReg());
1290     LiveInterval &DstInt = LIS->getInterval(CP.getDstReg());
1426   LiveInterval &RHS = LIS->getInterval(CP.getSrcReg());
1435       if (!LIS->hasInterval(*AS))
1437       const LiveInterval &LHS = LIS->getInterval(*AS);
1445              !CP.isCoalescable(LIS->getInstructionFromIndex(RI->start)))) {
1457               !CP.isCoalescable(LIS->getInstructionFromIndex(LI->start))) {
1480   LiveInterval &LHS = LIS->getOrCreateInterval(CP.getDstReg());
1504         !RegistersDefinedFromSameValue(*LIS, *TRI, CP, VNI, lr, DupCopies))
1531         !RegistersDefinedFromSameValue(*LIS, *TRI, CP, VNI, lr, DupCopies))
1662     LIS->shrinkToUses(&LIS->getInterval(*I));
1719     if (LIS->hasInterval(SrcReg) && LIS->getInterval(SrcReg).empty())
1816   LIS = &getAnalysis<LiveIntervals>();
1835         for (LiveIntervals::iterator I = LIS->begin(), E = LIS->end();
1878               LIS->hasInterval(SrcReg))
1879             LIS->shrinkToUses(&LIS->getInterval(SrcReg));
1891           LIS->RemoveMachineInstrFromMaps(MI);
1926             RemoveDeadDef(LIS->getInterval(DeadDef), MI);
1928           LIS->RemoveMachineInstrFromMaps(mii);
1938       if (LIS->isNotInMIMap(MI)) continue;
1939       SlotIndex DefIdx = LIS->getInstructionIndex(MI).getDefIndex();
1944         if (!reg || !LIS->hasInterval(reg)) continue;
1945         if (!LIS->getInterval(reg).killedAt(DefIdx)) {
1955           if (LIS->hasInterval(S) && LIS->getInterval(S).liveAt(DefIdx))
1988    LIS->print(O, m);