Lines Matching defs:Insn

143 static DecodeStatus DecodeBitfieldMaskOperand(llvm::MCInst &Inst, unsigned Insn,
145 static DecodeStatus DecodeCopMemInstruction(llvm::MCInst &Inst, unsigned Insn,
148 unsigned Insn,
151 static DecodeStatus DecodeSORegMemOperand(llvm::MCInst &Inst, unsigned Insn,
153 static DecodeStatus DecodeAddrMode3Instruction(llvm::MCInst &Inst,unsigned Insn,
155 static DecodeStatus DecodeSORegImmOperand(llvm::MCInst &Inst, unsigned Insn,
157 static DecodeStatus DecodeSORegRegOperand(llvm::MCInst &Inst, unsigned Insn,
161 unsigned Insn,
164 static DecodeStatus DecodeT2MOVTWInstruction(llvm::MCInst &Inst, unsigned Insn,
166 static DecodeStatus DecodeArmMOVTWInstruction(llvm::MCInst &Inst, unsigned Insn,
168 static DecodeStatus DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn,
170 static DecodeStatus DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn,
172 static DecodeStatus DecodeT2CPSInstruction(llvm::MCInst &Inst, unsigned Insn,
180 static DecodeStatus DecodeBranchImmInstruction(llvm::MCInst &Inst,unsigned Insn,
210 static DecodeStatus DecodeTBLInstruction(llvm::MCInst &Inst, unsigned Insn,
212 static DecodeStatus DecodePostIdxReg(llvm::MCInst &Inst, unsigned Insn,
214 static DecodeStatus DecodeCoprocessor(llvm::MCInst &Inst, unsigned Insn,
216 static DecodeStatus DecodeMemBarrierOption(llvm::MCInst &Inst, unsigned Insn,
218 static DecodeStatus DecodeMSRMask(llvm::MCInst &Inst, unsigned Insn,
220 static DecodeStatus DecodeDoubleRegLoad(llvm::MCInst &Inst, unsigned Insn,
222 static DecodeStatus DecodeDoubleRegStore(llvm::MCInst &Inst, unsigned Insn,
224 static DecodeStatus DecodeLDRPreImm(llvm::MCInst &Inst, unsigned Insn,
226 static DecodeStatus DecodeLDRPreReg(llvm::MCInst &Inst, unsigned Insn,
228 static DecodeStatus DecodeSTRPreImm(llvm::MCInst &Inst, unsigned Insn,
230 static DecodeStatus DecodeSTRPreReg(llvm::MCInst &Inst, unsigned Insn,
232 static DecodeStatus DecodeVLD1LN(llvm::MCInst &Inst, unsigned Insn,
234 static DecodeStatus DecodeVLD2LN(llvm::MCInst &Inst, unsigned Insn,
236 static DecodeStatus DecodeVLD3LN(llvm::MCInst &Inst, unsigned Insn,
238 static DecodeStatus DecodeVLD4LN(llvm::MCInst &Inst, unsigned Insn,
240 static DecodeStatus DecodeVST1LN(llvm::MCInst &Inst, unsigned Insn,
242 static DecodeStatus DecodeVST2LN(llvm::MCInst &Inst, unsigned Insn,
244 static DecodeStatus DecodeVST3LN(llvm::MCInst &Inst, unsigned Insn,
246 static DecodeStatus DecodeVST4LN(llvm::MCInst &Inst, unsigned Insn,
248 static DecodeStatus DecodeVMOVSRR(llvm::MCInst &Inst, unsigned Insn,
250 static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
253 static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
285 static DecodeStatus DecodeThumbAddSPReg(llvm::MCInst &Inst, uint16_t Insn,
287 static DecodeStatus DecodeThumbCPS(llvm::MCInst &Inst, uint16_t Insn,
289 static DecodeStatus DecodeThumbBLXOffset(llvm::MCInst &Inst, unsigned Insn,
305 static DecodeStatus DecodeT2LDRDPreInstruction(llvm::MCInst &Inst,unsigned Insn,
307 static DecodeStatus DecodeT2STRDPreInstruction(llvm::MCInst &Inst,unsigned Insn,
1181 static DecodeStatus DecodeCopMemInstruction(llvm::MCInst &Inst, unsigned Insn,
1185 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1186 unsigned CRd = fieldFromInstruction32(Insn, 12, 4);
1187 unsigned coproc = fieldFromInstruction32(Insn, 8, 4);
1188 unsigned imm = fieldFromInstruction32(Insn, 0, 8);
1189 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
1190 unsigned U = fieldFromInstruction32(Insn, 23, 1);
1326 DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn,
1330 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
1331 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
1332 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
1333 unsigned imm = fieldFromInstruction32(Insn, 0, 12);
1334 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1335 unsigned reg = fieldFromInstruction32(Insn, 25, 1);
1336 unsigned P = fieldFromInstruction32(Insn, 24, 1);
1337 unsigned W = fieldFromInstruction32(Insn, 21, 1);
1380 if (!fieldFromInstruction32(Insn, 23, 1))
1397 switch( fieldFromInstruction32(Insn, 5, 2)) {
1413 unsigned amt = fieldFromInstruction32(Insn, 7, 5);
1470 DecodeAddrMode3Instruction(llvm::MCInst &Inst, unsigned Insn,
1474 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
1475 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
1476 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
1477 unsigned type = fieldFromInstruction32(Insn, 22, 1);
1478 unsigned imm = fieldFromInstruction32(Insn, 8, 4);
1479 unsigned U = ((~fieldFromInstruction32(Insn, 23, 1)) & 1) << 8;
1480 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1481 unsigned W = fieldFromInstruction32(Insn, 21, 1);
1482 unsigned P = fieldFromInstruction32(Insn, 24, 1);
1581 static DecodeStatus DecodeRFEInstruction(llvm::MCInst &Inst, unsigned Insn,
1585 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
1586 unsigned mode = fieldFromInstruction32(Insn, 23, 2);
1611 unsigned Insn,
1615 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
1616 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1617 unsigned reglist = fieldFromInstruction32(Insn, 0, 16);
1674 if (fieldFromInstruction32(Insn, 20, 1) == 0) {
1676 MCOperand::CreateImm(fieldFromInstruction32(Insn, 0, 4)));
1680 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
1695 static DecodeStatus DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn,
1697 unsigned imod = fieldFromInstruction32(Insn, 18, 2);
1698 unsigned M = fieldFromInstruction32(Insn, 17, 1);
1699 unsigned iflags = fieldFromInstruction32(Insn, 6, 3);
1700 unsigned mode = fieldFromInstruction32(Insn, 0, 5);
1735 static DecodeStatus DecodeT2CPSInstruction(llvm::MCInst &Inst, unsigned Insn,
1737 unsigned imod = fieldFromInstruction32(Insn, 9, 2);
1738 unsigned M = fieldFromInstruction32(Insn, 8, 1);
1739 unsigned iflags = fieldFromInstruction32(Insn, 5, 3);
1740 unsigned mode = fieldFromInstruction32(Insn, 0, 5);
1775 static DecodeStatus DecodeT2MOVTWInstruction(llvm::MCInst &Inst, unsigned Insn,
1779 unsigned Rd = fieldFromInstruction32(Insn, 8, 4);
1782 imm |= (fieldFromInstruction32(Insn, 0, 8) << 0);
1783 imm |= (fieldFromInstruction32(Insn, 12, 3) << 8);
1784 imm |= (fieldFromInstruction32(Insn, 16, 4) << 12);
1785 imm |= (fieldFromInstruction32(Insn, 26, 1) << 11);
1799 static DecodeStatus DecodeArmMOVTWInstruction(llvm::MCInst &Inst, unsigned Insn,
1803 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
1804 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1807 imm |= (fieldFromInstruction32(Insn, 0, 12) << 0);
1808 imm |= (fieldFromInstruction32(Insn, 16, 4) << 12);
1825 static DecodeStatus DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn,
1829 unsigned Rd = fieldFromInstruction32(Insn, 16, 4);
1830 unsigned Rn = fieldFromInstruction32(Insn, 0, 4);
1831 unsigned Rm = fieldFromInstruction32(Insn, 8, 4);
1832 unsigned Ra = fieldFromInstruction32(Insn, 12, 4);
1833 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1836 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
1898 DecodeBranchImmInstruction(llvm::MCInst &Inst, unsigned Insn,
1902 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
1903 unsigned imm = fieldFromInstruction32(Insn, 0, 24) << 2;
1907 imm |= fieldFromInstruction32(Insn, 24, 1) << 1;
1945 static DecodeStatus DecodeVLDInstruction(llvm::MCInst &Inst, unsigned Insn,
1949 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
1950 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
1951 unsigned wb = fieldFromInstruction32(Insn, 16, 4);
1952 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
1953 Rn |= fieldFromInstruction32(Insn, 4, 2) << 4;
1954 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2194 static DecodeStatus DecodeVSTInstruction(llvm::MCInst &Inst, unsigned Insn,
2198 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2199 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2200 unsigned wb = fieldFromInstruction32(Insn, 16, 4);
2201 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2202 Rn |= fieldFromInstruction32(Insn, 4, 2) << 4;
2203 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2444 static DecodeStatus DecodeVLD1DupInstruction(llvm::MCInst &Inst, unsigned Insn,
2448 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2449 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2450 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2451 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2452 unsigned align = fieldFromInstruction32(Insn, 4, 1);
2453 unsigned size = fieldFromInstruction32(Insn, 6, 2);
2454 unsigned regs = fieldFromInstruction32(Insn, 5, 1) + 1;
2483 static DecodeStatus DecodeVLD2DupInstruction(llvm::MCInst &Inst, unsigned Insn,
2487 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2488 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2489 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2490 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2491 unsigned align = fieldFromInstruction32(Insn, 4, 1);
2492 unsigned size = 1 << fieldFromInstruction32(Insn, 6, 2);
2493 unsigned inc = fieldFromInstruction32(Insn, 5, 1) + 1;
2519 static DecodeStatus DecodeVLD3DupInstruction(llvm::MCInst &Inst, unsigned Insn,
2523 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2524 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2525 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2526 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2527 unsigned inc = fieldFromInstruction32(Insn, 5, 1) + 1;
2554 static DecodeStatus DecodeVLD4DupInstruction(llvm::MCInst &Inst, unsigned Insn,
2558 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2559 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2560 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2561 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2562 unsigned size = fieldFromInstruction32(Insn, 6, 2);
2563 unsigned inc = fieldFromInstruction32(Insn, 5, 1) + 1;
2564 unsigned align = fieldFromInstruction32(Insn, 4, 1);
2607 DecodeNEONModImmInstruction(llvm::MCInst &Inst, unsigned Insn,
2611 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2612 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2613 unsigned imm = fieldFromInstruction32(Insn, 0, 4);
2614 imm |= fieldFromInstruction32(Insn, 16, 3) << 4;
2615 imm |= fieldFromInstruction32(Insn, 24, 1) << 7;
2616 imm |= fieldFromInstruction32(Insn, 8, 4) << 8;
2617 imm |= fieldFromInstruction32(Insn, 5, 1) << 12;
2618 unsigned Q = fieldFromInstruction32(Insn, 6, 1);
2652 static DecodeStatus DecodeVSHLMaxInstruction(llvm::MCInst &Inst, unsigned Insn,
2656 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2657 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2658 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2659 Rm |= fieldFromInstruction32(Insn, 5, 1) << 4;
2660 unsigned size = fieldFromInstruction32(Insn, 18, 2);
2695 static DecodeStatus DecodeTBLInstruction(llvm::MCInst &Inst, unsigned Insn,
2699 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
2700 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
2701 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2702 Rn |= fieldFromInstruction32(Insn, 7, 1) << 4;
2703 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
2704 Rm |= fieldFromInstruction32(Insn, 5, 1) << 4;
2705 unsigned op = fieldFromInstruction32(Insn, 6, 1);
2706 unsigned length = fieldFromInstruction32(Insn, 8, 2) + 1;
2726 static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
2730 unsigned dst = fieldFromInstruction16(Insn, 8, 3);
2731 unsigned imm = fieldFromInstruction16(Insn, 0, 8);
2832 static DecodeStatus DecodeT2LoadShift(llvm::MCInst &Inst, unsigned Insn,
2842 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
2848 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2871 int imm = fieldFromInstruction32(Insn, 0, 12);
2872 if (!fieldFromInstruction32(Insn, 23, 1)) imm *= -1;
2878 unsigned addrmode = fieldFromInstruction32(Insn, 4, 2);
2879 addrmode |= fieldFromInstruction32(Insn, 0, 4) << 2;
2880 addrmode |= fieldFromInstruction32(Insn, 16, 4) << 6;
2970 static DecodeStatus DecodeT2LdStPre(llvm::MCInst &Inst, unsigned Insn,
2974 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
2975 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
2976 unsigned addr = fieldFromInstruction32(Insn, 0, 8);
2977 addr |= fieldFromInstruction32(Insn, 9, 1) << 8;
2979 unsigned load = fieldFromInstruction32(Insn, 20, 1);
3015 static DecodeStatus DecodeThumbAddSPImm(llvm::MCInst &Inst, uint16_t Insn,
3017 unsigned imm = fieldFromInstruction16(Insn, 0, 7);
3026 static DecodeStatus DecodeThumbAddSPReg(llvm::MCInst &Inst, uint16_t Insn,
3031 unsigned Rdm = fieldFromInstruction16(Insn, 0, 3);
3032 Rdm |= fieldFromInstruction16(Insn, 7, 1) << 3;
3040 unsigned Rm = fieldFromInstruction16(Insn, 3, 4);
3051 static DecodeStatus DecodeThumbCPS(llvm::MCInst &Inst, uint16_t Insn,
3053 unsigned imod = fieldFromInstruction16(Insn, 4, 1) | 0x2;
3054 unsigned flags = fieldFromInstruction16(Insn, 0, 3);
3062 static DecodeStatus DecodePostIdxReg(llvm::MCInst &Inst, unsigned Insn,
3065 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3066 unsigned add = fieldFromInstruction32(Insn, 4, 1);
3094 DecodeThumbTableBranch(llvm::MCInst &Inst, unsigned Insn,
3098 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3099 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3110 DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Insn,
3114 unsigned pred = fieldFromInstruction32(Insn, 22, 4);
3116 unsigned opc = fieldFromInstruction32(Insn, 4, 28);
3131 unsigned imm = fieldFromInstruction32(Insn, 0, 4);
3135 unsigned brtarget = fieldFromInstruction32(Insn, 0, 11) << 1;
3136 brtarget |= fieldFromInstruction32(Insn, 11, 1) << 19;
3137 brtarget |= fieldFromInstruction32(Insn, 13, 1) << 18;
3138 brtarget |= fieldFromInstruction32(Insn, 16, 6) << 12;
3139 brtarget |= fieldFromInstruction32(Insn, 26, 1) << 20;
3223 static DecodeStatus DecodeDoubleRegLoad(llvm::MCInst &Inst, unsigned Insn,
3227 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3228 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3229 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3246 static DecodeStatus DecodeDoubleRegStore(llvm::MCInst &Inst, unsigned Insn,
3250 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3251 unsigned Rt = fieldFromInstruction32(Insn, 0, 4);
3252 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3253 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3273 static DecodeStatus DecodeLDRPreImm(llvm::MCInst &Inst, unsigned Insn,
3277 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3278 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3279 unsigned imm = fieldFromInstruction32(Insn, 0, 12);
3280 imm |= fieldFromInstruction32(Insn, 16, 4) << 13;
3281 imm |= fieldFromInstruction32(Insn, 23, 1) << 12;
3282 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3298 static DecodeStatus DecodeLDRPreReg(llvm::MCInst &Inst, unsigned Insn,
3302 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3303 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3304 unsigned imm = fieldFromInstruction32(Insn, 0, 12);
3305 imm |= fieldFromInstruction32(Insn, 16, 4) << 13;
3306 imm |= fieldFromInstruction32(Insn, 23, 1) << 12;
3307 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3308 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3326 static DecodeStatus DecodeSTRPreImm(llvm::MCInst &Inst, unsigned Insn,
3330 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3331 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3332 unsigned imm = fieldFromInstruction32(Insn, 0, 12);
3333 imm |= fieldFromInstruction32(Insn, 16, 4) << 13;
3334 imm |= fieldFromInstruction32(Insn, 23, 1) << 12;
3335 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3351 static DecodeStatus DecodeSTRPreReg(llvm::MCInst &Inst, unsigned Insn,
3355 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3356 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3357 unsigned imm = fieldFromInstruction32(Insn, 0, 12);
3358 imm |= fieldFromInstruction32(Insn, 16, 4) << 13;
3359 imm |= fieldFromInstruction32(Insn, 23, 1) << 12;
3360 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3376 static DecodeStatus DecodeVLD1LN(llvm::MCInst &Inst, unsigned Insn,
3380 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3381 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3382 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3383 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3384 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3392 if (fieldFromInstruction32(Insn, 4, 1))
3394 index = fieldFromInstruction32(Insn, 5, 3);
3397 if (fieldFromInstruction32(Insn, 5, 1))
3399 index = fieldFromInstruction32(Insn, 6, 2);
3400 if (fieldFromInstruction32(Insn, 4, 1))
3404 if (fieldFromInstruction32(Insn, 6, 1))
3406 index = fieldFromInstruction32(Insn, 7, 1);
3407 if (fieldFromInstruction32(Insn, 4, 2) != 0)
3435 static DecodeStatus DecodeVST1LN(llvm::MCInst &Inst, unsigned Insn,
3439 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3440 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3441 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3442 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3443 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3451 if (fieldFromInstruction32(Insn, 4, 1))
3453 index = fieldFromInstruction32(Insn, 5, 3);
3456 if (fieldFromInstruction32(Insn, 5, 1))
3458 index = fieldFromInstruction32(Insn, 6, 2);
3459 if (fieldFromInstruction32(Insn, 4, 1))
3463 if (fieldFromInstruction32(Insn, 6, 1))
3465 index = fieldFromInstruction32(Insn, 7, 1);
3466 if (fieldFromInstruction32(Insn, 4, 2) != 0)
3493 static DecodeStatus DecodeVLD2LN(llvm::MCInst &Inst, unsigned Insn,
3497 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3498 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3499 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3500 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3501 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3510 index = fieldFromInstruction32(Insn, 5, 3);
3511 if (fieldFromInstruction32(Insn, 4, 1))
3515 index = fieldFromInstruction32(Insn, 6, 2);
3516 if (fieldFromInstruction32(Insn, 4, 1))
3518 if (fieldFromInstruction32(Insn, 5, 1))
3522 if (fieldFromInstruction32(Insn, 5, 1))
3524 index = fieldFromInstruction32(Insn, 7, 1);
3525 if (fieldFromInstruction32(Insn, 4, 1) != 0)
3527 if (fieldFromInstruction32(Insn, 6, 1))
3560 static DecodeStatus DecodeVST2LN(llvm::MCInst &Inst, unsigned Insn,
3564 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3565 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3566 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3567 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3568 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3577 index = fieldFromInstruction32(Insn, 5, 3);
3578 if (fieldFromInstruction32(Insn, 4, 1))
3582 index = fieldFromInstruction32(Insn, 6, 2);
3583 if (fieldFromInstruction32(Insn, 4, 1))
3585 if (fieldFromInstruction32(Insn, 5, 1))
3589 if (fieldFromInstruction32(Insn, 5, 1))
3591 index = fieldFromInstruction32(Insn, 7, 1);
3592 if (fieldFromInstruction32(Insn, 4, 1) != 0)
3594 if (fieldFromInstruction32(Insn, 6, 1))
3624 static DecodeStatus DecodeVLD3LN(llvm::MCInst &Inst, unsigned Insn,
3628 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3629 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3630 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3631 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3632 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3641 if (fieldFromInstruction32(Insn, 4, 1))
3643 index = fieldFromInstruction32(Insn, 5, 3);
3646 if (fieldFromInstruction32(Insn, 4, 1))
3648 index = fieldFromInstruction32(Insn, 6, 2);
3649 if (fieldFromInstruction32(Insn, 5, 1))
3653 if (fieldFromInstruction32(Insn, 4, 2))
3655 index = fieldFromInstruction32(Insn, 7, 1);
3656 if (fieldFromInstruction32(Insn, 6, 1))
3694 static DecodeStatus DecodeVST3LN(llvm::MCInst &Inst, unsigned Insn,
3698 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3699 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3700 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3701 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3702 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3711 if (fieldFromInstruction32(Insn, 4, 1))
3713 index = fieldFromInstruction32(Insn, 5, 3);
3716 if (fieldFromInstruction32(Insn, 4, 1))
3718 index = fieldFromInstruction32(Insn, 6, 2);
3719 if (fieldFromInstruction32(Insn, 5, 1))
3723 if (fieldFromInstruction32(Insn, 4, 2))
3725 index = fieldFromInstruction32(Insn, 7, 1);
3726 if (fieldFromInstruction32(Insn, 6, 1))
3758 static DecodeStatus DecodeVLD4LN(llvm::MCInst &Inst, unsigned Insn,
3762 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3763 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3764 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3765 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3766 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3775 if (fieldFromInstruction32(Insn, 4, 1))
3777 index = fieldFromInstruction32(Insn, 5, 3);
3780 if (fieldFromInstruction32(Insn, 4, 1))
3782 index = fieldFromInstruction32(Insn, 6, 2);
3783 if (fieldFromInstruction32(Insn, 5, 1))
3787 if (fieldFromInstruction32(Insn, 4, 2))
3788 align = 4 << fieldFromInstruction32(Insn, 4, 2);
3789 index = fieldFromInstruction32(Insn, 7, 1);
3790 if (fieldFromInstruction32(Insn, 6, 1))
3832 static DecodeStatus DecodeVST4LN(llvm::MCInst &Inst, unsigned Insn,
3836 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3837 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3838 unsigned Rd = fieldFromInstruction32(Insn, 12, 4);
3839 Rd |= fieldFromInstruction32(Insn, 22, 1) << 4;
3840 unsigned size = fieldFromInstruction32(Insn, 10, 2);
3849 if (fieldFromInstruction32(Insn, 4, 1))
3851 index = fieldFromInstruction32(Insn, 5, 3);
3854 if (fieldFromInstruction32(Insn, 4, 1))
3856 index = fieldFromInstruction32(Insn, 6, 2);
3857 if (fieldFromInstruction32(Insn, 5, 1))
3861 if (fieldFromInstruction32(Insn, 4, 2))
3862 align = 4 << fieldFromInstruction32(Insn, 4, 2);
3863 index = fieldFromInstruction32(Insn, 7, 1);
3864 if (fieldFromInstruction32(Insn, 6, 1))
3897 static DecodeStatus DecodeVMOVSRR(llvm::MCInst &Inst, unsigned Insn,
3900 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3901 unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4);
3902 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3903 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3904 Rm |= fieldFromInstruction32(Insn, 5, 1) << 4;
3923 static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
3926 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3927 unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4);
3928 unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
3929 unsigned pred = fieldFromInstruction32(Insn, 28, 4);
3930 Rm |= fieldFromInstruction32(Insn, 5, 1) << 4;
3949 static DecodeStatus DecodeIT(llvm::MCInst &Inst, unsigned Insn,
3952 unsigned pred = fieldFromInstruction16(Insn, 4, 4);
3955 unsigned mask = fieldFromInstruction16(Insn, 0, 5);
3976 DecodeT2LDRDPreInstruction(llvm::MCInst &Inst, unsigned Insn,
3980 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
3981 unsigned Rt2 = fieldFromInstruction32(Insn, 8, 4);
3982 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
3983 unsigned addr = fieldFromInstruction32(Insn, 0, 8);
3984 unsigned W = fieldFromInstruction32(Insn, 21, 1);
3985 unsigned U = fieldFromInstruction32(Insn, 23, 1);
3986 unsigned P = fieldFromInstruction32(Insn, 24, 1);
4013 DecodeT2STRDPreInstruction(llvm::MCInst &Inst, unsigned Insn,
4017 unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
4018 unsigned Rt2 = fieldFromInstruction32(Insn, 8, 4);
4019 unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
4020 unsigned addr = fieldFromInstruction32(Insn, 0, 8);
4021 unsigned W = fieldFromInstruction32(Insn, 21, 1);
4022 unsigned U = fieldFromInstruction32(Insn, 23, 1);
4023 unsigned P = fieldFromInstruction32(Insn, 24, 1);
4047 static DecodeStatus DecodeT2Adr(llvm::MCInst &Inst, uint32_t Insn,
4049 unsigned sign1 = fieldFromInstruction32(Insn, 21, 1);
4050 unsigned sign2 = fieldFromInstruction32(Insn, 23, 1);
4053 unsigned Val = fieldFromInstruction32(Insn, 0, 8);
4054 Val |= fieldFromInstruction32(Insn, 12, 3) << 8;
4055 Val |= fieldFromInstruction32(Insn, 26, 1) << 11;