Cross Reference: /external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp

Lines Matching refs:Op
201   const MCOperand &Op = MI->getOperand(OpNo);
202   if (Op.isReg()) {
203     unsigned Reg = Op.getReg();
205   } else if (Op.isImm()) {
206     O << '#' << Op.getImm();
208     assert(Op.isExpr() && "unknown operand kind in printOperand");
211     const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
219       O << *Op.getExpr();
278 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
280   const MCOperand &MO1 = MI->getOperand(Op);
281   const MCOperand &MO2 = MI->getOperand(Op+1);
282   const MCOperand &MO3 = MI->getOperand(Op+2);
306 void ARMInstPrinter::printAM2PostIndexOp(const MCInst *MI, unsigned Op,
308   const MCOperand &MO1 = MI->getOperand(Op);
309   const MCOperand &MO2 = MI->getOperand(Op+1);
310   const MCOperand &MO3 = MI->getOperand(Op+2);
331 void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op,
333   const MCOperand &MO1 = MI->getOperand(Op);
334   const MCOperand &MO2 = MI->getOperand(Op+1);
339 void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op,
341   const MCOperand &MO1 = MI->getOperand(Op);
342   const MCOperand &MO2 = MI->getOperand(Op+1);
347 void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,
349   const MCOperand &MO1 = MI->getOperand(Op);
352     printOperand(MI, Op, O);
356   const MCOperand &MO3 = MI->getOperand(Op+2);
360     printAM2PostIndexOp(MI, Op, O);
363   printAM2PreOrOffsetIndexOp(MI, Op, O);
393 void ARMInstPrinter::printAM3PostIndexOp(const MCInst *MI, unsigned Op,
395   const MCOperand &MO1 = MI->getOperand(Op);
396   const MCOperand &MO2 = MI->getOperand(Op+1);
397   const MCOperand &MO3 = MI->getOperand(Op+2);
413 void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
415   const MCOperand &MO1 = MI->getOperand(Op);
416   const MCOperand &MO2 = MI->getOperand(Op+1);
417   const MCOperand &MO3 = MI->getOperand(Op+2);
434 void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,
436   const MCOperand &MO3 = MI->getOperand(Op+2);
440     printAM3PostIndexOp(MI, Op, O);
443   printAM3PreOrOffsetIndexOp(MI, Op, O);
509   unsigned Op = ARM_AM::getAM5Op(MO2.getImm());
510   if (ImmOffs || Op == ARM_AM::sub) {
606   const MCOperand &Op = MI->getOperand(OpNum);
607   if (Op.getImm())
615   const MCOperand &Op = MI->getOperand(OpNum);
616   O << ARM_PROC::IModToString(Op.getImm());
621   const MCOperand &Op = MI->getOperand(OpNum);
622   unsigned IFlags = Op.getImm();
633   const MCOperand &Op = MI->getOperand(OpNum);
634   unsigned SpecRegRBit = Op.getImm() >> 4;
635   unsigned Mask = Op.getImm() & 0xf;
638     switch (Op.getImm()) {
759 void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op,
761   const MCOperand &MO1 = MI->getOperand(Op);
762   const MCOperand &MO2 = MI->getOperand(Op + 1);
765     printOperand(MI, Op, O);
776                                                     unsigned Op,
779   const MCOperand &MO1 = MI->getOperand(Op);
780   const MCOperand &MO2 = MI->getOperand(Op + 1);
783     printOperand(MI, Op, O);
794                                                      unsigned Op,
796   printThumbAddrModeImm5SOperand(MI, Op, O, 1);
800                                                      unsigned Op,
802   printThumbAddrModeImm5SOperand(MI, Op, O, 2);
806                                                      unsigned Op,
808   printThumbAddrModeImm5SOperand(MI, Op, O, 4);
811 void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op,
813   printThumbAddrModeImm5SOperand(MI, Op, O, 4);