Lines Matching defs:X86InstrInfo

1 //===- X86InstrInfo.cpp - X86 Instruction Information -----------*- C++ -*-===//
14 #include "X86InstrInfo.h"
86 X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
905 X86InstrInfo::AddTableEntry(RegOp2MemOpTableType &R2MTable,
920 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
977 bool X86InstrInfo::isFrameOperand(const MachineInstr *MI, unsigned int Op,
1048 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
1056 unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
1069 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
1078 unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr *MI,
1107 X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
1266 void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB,
1326 X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
1438 X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
1696 X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
1906 bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
1918 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
2062 unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
2083 X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
2175 void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
2327 void X86InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
2344 void X86InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
2365 void X86InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
2379 void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
2419 bool X86InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
2432 X86InstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
2510 X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
2655 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
2696 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
2825 bool X86InstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
2882 bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
3008 X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
3115 unsigned X86InstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,
3134 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
3239 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
3288 bool X86InstrInfo::
3298 bool X86InstrInfo::
3312 unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
3383 X86InstrInfo::getExecutionDomain(const MachineInstr *MI) const {
3389 void X86InstrInfo::setExecutionDomain(MachineInstr *MI, unsigned Domain) const {
3399 void X86InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
3403 bool X86InstrInfo::isHighLatencyDef(int opc) const {
3457 bool X86InstrInfo::
3495 const X86InstrInfo *TII = TM->getInstrInfo();