Lines Matching refs:instr
98 void PrintRs(Instruction* instr);
99 void PrintRt(Instruction* instr);
100 void PrintRd(Instruction* instr);
101 void PrintFs(Instruction* instr);
102 void PrintFt(Instruction* instr);
103 void PrintFd(Instruction* instr);
104 void PrintSa(Instruction* instr);
105 void PrintSd(Instruction* instr);
106 void PrintBc(Instruction* instr);
107 void PrintCc(Instruction* instr);
108 void PrintFunction(Instruction* instr);
109 void PrintSecondaryField(Instruction* instr);
110 void PrintUImm16(Instruction* instr);
111 void PrintSImm16(Instruction* instr);
112 void PrintXImm16(Instruction* instr);
113 void PrintImm26(Instruction* instr);
114 void PrintCode(Instruction* instr); // For break and trap instructions.
116 void PrintInstructionName(Instruction* instr);
119 int FormatRegister(Instruction* instr, const char* option);
120 int FormatFPURegister(Instruction* instr, const char* option);
121 int FormatOption(Instruction* instr, const char* option);
122 void Format(Instruction* instr, const char* format);
123 void Unknown(Instruction* instr);
126 void DecodeTypeRegister(Instruction* instr);
127 void DecodeTypeImmediate(Instruction* instr);
128 void DecodeTypeJump(Instruction* instr);
166 void Decoder::PrintRs(Instruction* instr) {
167 int reg = instr->RsValue();
172 void Decoder::PrintRt(Instruction* instr) {
173 int reg = instr->RtValue();
178 void Decoder::PrintRd(Instruction* instr) {
179 int reg = instr->RdValue();
190 void Decoder::PrintFs(Instruction* instr) {
191 int freg = instr->RsValue();
196 void Decoder::PrintFt(Instruction* instr) {
197 int freg = instr->RtValue();
202 void Decoder::PrintFd(Instruction* instr) {
203 int freg = instr->RdValue();
209 void Decoder::PrintSa(Instruction* instr) {
210 int sa = instr->SaValue();
216 void Decoder::PrintSd(Instruction* instr) {
217 int sd = instr->RdValue();
223 void Decoder::PrintBc(Instruction* instr) {
224 int cc = instr->FBccValue();
230 void Decoder::PrintCc(Instruction* instr) {
231 int cc = instr->FCccValue();
237 void Decoder::PrintUImm16(Instruction* instr) {
238 int32_t imm = instr->Imm16Value();
244 void Decoder::PrintSImm16(Instruction* instr) {
245 int32_t imm = ((instr->Imm16Value())<<16)>>16;
251 void Decoder::PrintXImm16(Instruction* instr) {
252 int32_t imm = instr->Imm16Value();
258 void Decoder::PrintImm26(Instruction* instr) {
259 int32_t imm = instr->Imm26Value();
265 void Decoder::PrintCode(Instruction* instr) {
266 if (instr->OpcodeFieldRaw() != SPECIAL)
268 switch (instr->FunctionFieldRaw()) {
270 int32_t code = instr->Bits(25, 6);
281 int32_t code = instr->Bits(15, 6);
293 void Decoder::PrintInstructionName(Instruction* instr) {
299 int Decoder::FormatRegister(Instruction* instr, const char* format) {
302 int reg = instr->RsValue();
306 int reg = instr->RtValue();
310 int reg = instr->RdValue();
321 int Decoder::FormatFPURegister(Instruction* instr, const char* format) {
324 int reg = instr->FsValue();
328 int reg = instr->FtValue();
332 int reg = instr->FdValue();
346 int Decoder::FormatOption(Instruction* instr, const char* format) {
350 PrintCode(instr);
358 PrintSImm16(instr);
361 PrintSImm16(instr);
364 PrintXImm16(instr);
369 PrintImm26(instr);
374 return FormatRegister(instr, format);
377 return FormatFPURegister(instr, format);
383 PrintSa(instr);
388 PrintSd(instr);
395 PrintBc(instr);
400 PrintCc(instr);
412 void Decoder::Format(Instruction* instr, const char* format) {
416 format += FormatOption(instr, format);
426 // For currently unimplemented decodings the disassembler calls Unknown(instr)
428 void Decoder::Unknown(Instruction* instr) {
429 Format(instr, "unknown");
433 void Decoder::DecodeTypeRegister(Instruction* instr) {
434 switch (instr->OpcodeFieldRaw()) {
436 switch (instr->RsFieldRaw()) {
441 Format(instr, "mfc1 'rt, 'fs");
444 Format(instr, "mfhc1 'rt, 'fs");
447 Format(instr, "mtc1 'rt, 'fs");
451 Format(instr, "ctc1 'rt, 'fs");
454 Format(instr, "cfc1 'rt, 'fs");
457 Format(instr, "mthc1 'rt, 'fs");
460 switch (instr->FunctionFieldRaw()) {
462 Format(instr, "add.d 'fd, 'fs, 'ft");
465 Format(instr, "sub.d 'fd, 'fs, 'ft");
468 Format(instr, "mul.d 'fd, 'fs, 'ft");
471 Format(instr, "div.d 'fd, 'fs, 'ft");
474 Format(instr, "abs.d 'fd, 'fs");
477 Format(instr, "mov.d 'fd, 'fs");
480 Format(instr, "neg.d 'fd, 'fs");
483 Format(instr, "sqrt.d 'fd, 'fs");
486 Format(instr, "cvt.w.d 'fd, 'fs");
490 Format(instr, "cvt.l.d 'fd, 'fs");
492 Unknown(instr);
497 Format(instr, "trunc.w.d 'fd, 'fs");
501 Format(instr, "trunc.l.d 'fd, 'fs");
503 Unknown(instr);
508 Format(instr, "round.w.d 'fd, 'fs");
511 Format(instr, "floor.w.d 'fd, 'fs");
514 Format(instr, "ceil.w.d 'fd, 'fs");
517 Format(instr, "cvt.s.d 'fd, 'fs");
520 Format(instr, "c.f.d 'fs, 'ft, 'Cc");
523 Format(instr, "c.un.d 'fs, 'ft, 'Cc");
526 Format(instr, "c.eq.d 'fs, 'ft, 'Cc");
529 Format(instr, "c.ueq.d 'fs, 'ft, 'Cc");
532 Format(instr, "c.olt.d 'fs, 'ft, 'Cc");
535 Format(instr, "c.ult.d 'fs, 'ft, 'Cc");
538 Format(instr, "c.ole.d 'fs, 'ft, 'Cc");
541 Format(instr, "c.ule.d 'fs, 'ft, 'Cc");
544 Format(instr, "unknown.cop1.d");
552 switch (instr->FunctionFieldRaw()) {
554 Format(instr, "cvt.s.w 'fd, 'fs");
557 Format(instr, "cvt.d.w 'fd, 'fs");
564 switch (instr->FunctionFieldRaw()) {
567 Format(instr, "cvt.d.l 'fd, 'fs");
569 Unknown(instr);
575 Format(instr, "cvt.s.l 'fd, 'fs");
577 Unknown(instr);
593 switch (instr->FunctionFieldRaw()) {
595 Format(instr, "jr 'rs");
598 Format(instr, "jalr 'rs");
601 if ( 0x0 == static_cast<int>(instr->InstructionBits()))
602 Format(instr, "nop");
604 Format(instr, "sll 'rd, 'rt, 'sa");
607 if (instr->RsValue() == 0) {
608 Format(instr, "srl 'rd, 'rt, 'sa");
611 Format(instr, "rotr 'rd, 'rt, 'sa");
613 Unknown(instr);
618 Format(instr, "sra 'rd, 'rt, 'sa");
621 Format(instr, "sllv 'rd, 'rt, 'rs");
624 if (instr->SaValue() == 0) {
625 Format(instr, "srlv 'rd, 'rt, 'rs");
628 Format(instr, "rotrv 'rd, 'rt, 'rs");
630 Unknown(instr);
635 Format(instr, "srav 'rd, 'rt, 'rs");
638 Format(instr, "mfhi 'rd");
641 Format(instr, "mflo 'rd");
644 Format(instr, "mult 'rs, 'rt");
647 Format(instr, "multu 'rs, 'rt");
650 Format(instr, "div 'rs, 'rt");
653 Format(instr, "divu 'rs, 'rt");
656 Format(instr, "add 'rd, 'rs, 'rt");
659 Format(instr, "addu 'rd, 'rs, 'rt");
662 Format(instr, "sub 'rd, 'rs, 'rt");
665 Format(instr, "sub 'rd, 'rs, 'rt");
668 Format(instr, "and 'rd, 'rs, 'rt");
671 if (0 == instr->RsValue()) {
672 Format(instr, "mov 'rd, 'rt");
673 } else if (0 == instr->RtValue()) {
674 Format(instr, "mov 'rd, 'rs");
676 Format(instr, "or 'rd, 'rs, 'rt");
680 Format(instr, "xor 'rd, 'rs, 'rt");
683 Format(instr, "nor 'rd, 'rs, 'rt");
686 Format(instr, "slt 'rd, 'rs, 'rt");
689 Format(instr, "sltu 'rd, 'rs, 'rt");
692 Format(instr, "break, code: 'code");
695 Format(instr, "tge 'rs, 'rt, code: 'code");
698 Format(instr, "tgeu 'rs, 'rt, code: 'code");
701 Format(instr, "tlt 'rs, 'rt, code: 'code");
704 Format(instr, "tltu 'rs, 'rt, code: 'code");
707 Format(instr, "teq 'rs, 'rt, code: 'code");
710 Format(instr, "tne 'rs, 'rt, code: 'code");
713 Format(instr, "movz 'rd, 'rs, 'rt");
716 Format(instr, "movn 'rd, 'rs, 'rt");
719 if (instr->Bit(16)) {
720 Format(instr, "movt 'rd, 'rs, 'Cc");
722 Format(instr, "movf 'rd, 'rs, 'Cc");
730 switch (instr->FunctionFieldRaw()) {
732 Format(instr, "mul 'rd, 'rs, 'rt");
735 Format(instr, "clz 'rd, 'rs");
742 switch (instr->FunctionFieldRaw()) {
745 Format(instr, "ins 'rt, 'rs, 'sd, 'sa");
747 Unknown(instr);
753 Format(instr, "ext 'rt, 'rs, 'sd, 'sa");
755 Unknown(instr);
769 void Decoder::DecodeTypeImmediate(Instruction* instr) {
770 switch (instr->OpcodeFieldRaw()) {
773 switch (instr->RsFieldRaw()) {
775 if (instr->FBtrueValue()) {
776 Format(instr, "bc1t 'bc, 'imm16u");
778 Format(instr, "bc1f 'bc, 'imm16u");
786 switch (instr->RtFieldRaw()) {
788 Format(instr, "bltz 'rs, 'imm16u");
791 Format(instr, "bltzal 'rs, 'imm16u");
794 Format(instr, "bgez 'rs, 'imm16u");
797 Format(instr, "bgezal 'rs, 'imm16u");
805 Format(instr, "beq 'rs, 'rt, 'imm16u");
808 Format(instr, "bne 'rs, 'rt, 'imm16u");
811 Format(instr, "blez 'rs, 'imm16u");
814 Format(instr, "bgtz 'rs, 'imm16u");
818 Format(instr, "addi 'rt, 'rs, 'imm16s");
821 Format(instr, "addiu 'rt, 'rs, 'imm16s");
824 Format(instr, "slti 'rt, 'rs, 'imm16s");
827 Format(instr, "sltiu 'rt, 'rs, 'imm16u");
830 Format(instr, "andi 'rt, 'rs, 'imm16x");
833 Format(instr, "ori 'rt, 'rs, 'imm16x");
836 Format(instr, "xori 'rt, 'rs, 'imm16x");
839 Format(instr, "lui 'rt, 'imm16x");
843 Format(instr, "lb 'rt, 'imm16s('rs)");
846 Format(instr, "lh 'rt, 'imm16s('rs)");
849 Format(instr, "lwl 'rt, 'imm16s('rs)");
852 Format(instr, "lw 'rt, 'imm16s('rs)");
855 Format(instr, "lbu 'rt, 'imm16s('rs)");
858 Format(instr, "lhu 'rt, 'imm16s('rs)");
861 Format(instr, "lwr 'rt, 'imm16s('rs)");
864 Format(instr, "sb 'rt, 'imm16s('rs)");
867 Format(instr, "sh 'rt, 'imm16s('rs)");
870 Format(instr, "swl 'rt, 'imm16s('rs)");
873 Format(instr, "sw 'rt, 'imm16s('rs)");
876 Format(instr, "swr 'rt, 'imm16s('rs)");
879 Format(instr, "lwc1 'ft, 'imm16s('rs)");
882 Format(instr, "ldc1 'ft, 'imm16s('rs)");
885 Format(instr, "swc1 'ft, 'imm16s('rs)");
888 Format(instr, "sdc1 'ft, 'imm16s('rs)");
897 void Decoder::DecodeTypeJump(Instruction* instr) {
898 switch (instr->OpcodeFieldRaw()) {
900 Format(instr, "j 'imm26");
903 Format(instr, "jal 'imm26");
913 Instruction* instr = Instruction::At(instr_ptr);
917 instr->InstructionBits());
918 switch (instr->InstructionType()) {
920 DecodeTypeRegister(instr);
924 DecodeTypeImmediate(instr);
928 DecodeTypeJump(instr);