Lines Matching defs:baseVReg
273 unsigned baseVReg = currentInstruction[2].u.operand;
276 emitGetVirtualRegister(baseVReg, regT0);
292 unsigned baseVReg = currentInstruction[1].u.operand;
297 emitGetVirtualRegisters(baseVReg, regT0, valueVReg, regT1);
326 unsigned baseVReg = currentInstruction[2].u.operand;
329 emitGetVirtualRegister(baseVReg, regT0);
361 compileGetByIdHotPath(resultVReg, baseVReg, ident, m_propertyAccessInstructionIndex++);
374 unsigned baseVReg = currentInstruction[2].u.operand;
377 compileGetByIdSlowCase(resultVReg, baseVReg, ident, iter, true);
394 unsigned baseVReg = currentInstruction[2].u.operand;
397 emitGetVirtualRegister(baseVReg, regT0);
398 compileGetByIdHotPath(resultVReg, baseVReg, ident, m_propertyAccessInstructionIndex++);
402 void JIT::compileGetByIdHotPath(int, int baseVReg, Identifier*, unsigned propertyAccessInstructionIndex)
409 emitJumpSlowCaseIfNotJSCell(regT0, baseVReg);
436 unsigned baseVReg = currentInstruction[2].u.operand;
439 compileGetByIdSlowCase(resultVReg, baseVReg, ident, iter, false);
442 void JIT::compileGetByIdSlowCase(int resultVReg, int baseVReg, Identifier* ident, Vector<SlowCaseEntry>::iterator& iter, bool isMethodCheck)
450 linkSlowCaseIfNotJSCell(iter, baseVReg);
474 unsigned baseVReg = currentInstruction[1].u.operand;
483 emitGetVirtualRegisters(baseVReg, regT0, valueVReg, regT1);
486 emitJumpSlowCaseIfNotJSCell(regT0, baseVReg);
508 unsigned baseVReg = currentInstruction[1].u.operand;
514 linkSlowCaseIfNotJSCell(iter, baseVReg);