/external/llvm/lib/Transforms/Utils/ |
H A D | LowerSwitch.cpp | 51 Constant* High; member in struct:__anon7091::LowerSwitch::CaseRange 55 Low(low), High(high), BB(bb) { } 77 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); 120 O << *B->Low << " -" << *B->High; 148 << cast<ConstantInt>(Pivot.High)->getValue() << "\n"); 186 if (Leaf.Low == Leaf.High) { 194 Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_SLE, Val, Leaf.High, 198 Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_ULE, Val, Leaf.High, 206 Constant *UpperBound = ConstantExpr::getAdd(NegLo, Leaf.High); 221 uint64_t Range = cast<ConstantInt>(Leaf.High) [all...] |
/external/llvm/include/llvm/ |
H A D | InlineAsm.h | 232 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data"); 245 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data"); 283 unsigned High = Flag >> 16; local 286 if (!High) 288 RC = High - 1;
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/external/llvm/lib/CodeGen/ |
H A D | RenderMachineFunction.h | 261 typedef enum { Zero, Low, High } PressureState; enumerator in enum:llvm::RenderMachineFunction::__anon6657
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 662 unsigned getX86SubSuperRegister(unsigned Reg, EVT VT, bool High) { argument 666 if (High) {
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/external/clang/lib/Basic/ |
H A D | Diagnostic.cpp | 514 unsigned High = PluralNumber(Start, End); local 517 return Low <= Val && Val <= High;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.h | 133 Constant* High; member in struct:llvm::SelectionDAGBuilder::Case 137 Case() : Low(0), High(0), BB(0), ExtraWeight(0) { } 139 uint32_t extraweight) : Low(low), High(high), BB(bb), 143 const APInt &rHigh = cast<ConstantInt>(High)->getValue(); 187 assert(isa<ConstantInt>(C1.Low) && isa<ConstantInt>(C2.High)); 189 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High);
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H A D | SelectionDAGBuilder.cpp | 1559 const APInt& High = cast<ConstantInt>(CB.CmpRHS)->getValue(); local 1565 Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, VT), 1571 DAG.getConstant(High-Low, VT), ISD::SETULE); 1904 if (Small.Low == Small.High && Big.Low == Big.High && Small.BB == Big.BB) { 1976 if (I->High == I->Low) { 1979 LHS = SV; RHS = I->High; MHS = NULL; 1982 LHS = I->Low; MHS = SV; RHS = I->High; 2027 const APInt &Last = cast<ConstantInt>(BackCase.High)->getValue(); 2074 const APInt &High local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 439 SDValue High = DAG.getLoad(getPointerTy(), DL, Chain, local 442 SDValue HighShifted = DAG.getNode(ISD::SHL, DL, MVT::i32, High, HighShift); 445 High.getValue(1)); 456 SDValue High = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, local 461 SDValue HighShifted = DAG.getNode(ISD::SHL, DL, MVT::i32, High, 465 High.getValue(1)); 514 SDValue High = DAG.getNode(ISD::SRL, dl, MVT::i32, Value, local 522 SDValue StoreHigh = DAG.getTruncStore(Chain, dl, High, HighAddr,
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 150 StringRef Op, int Low, int High); 2637 int Low, int High) { 2671 if (Val < Low || Val > High) { 2636 parsePKHImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Op, int Low, int High) argument
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