/external/llvm/lib/Target/Blackfin/ |
H A D | BlackfinFrameLowering.cpp | 45 MachineBasicBlock::iterator MBBI = MBB.begin(); local 52 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 63 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize); 69 BuildMI(MBB, MBBI, dl, TII.get(BF::LINK)).addImm(FrameSize); 79 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH)) 81 BuildMI(MBB, MBBI, dl, TII.get(BF::PUSH)) 83 BuildMI(MBB, MBBI, dl, TII.get(BF::MOVE), BF::FP) 85 RegInfo->loadConstant(MBB, MBBI, dl, BF::P1, -FrameSize); 86 BuildMI(MBB, MBBI, d 99 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 34 MachineBasicBlock::iterator MBBI = MBB.begin(); local 35 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 55 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6) 61 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi); 63 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) 65 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6) 72 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local 75 DebugLoc dl = MBBI->getDebugLoc(); 76 assert(MBBI [all...] |
H A D | SparcInstrInfo.cpp | 335 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 343 BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg);
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2RegisterInfo.cpp | 36 MachineBasicBlock::iterator &MBBI, 48 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci)) 35 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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H A D | Thumb2InstrInfo.cpp | 57 MachineBasicBlock::iterator MBBI = Tail; local 60 --MBBI; 69 while (Count && MBBI != E) { 70 if (MBBI->isDebugValue()) { 71 --MBBI; 74 if (MBBI->getOpcode() == ARM::t2IT) { 75 unsigned Mask = MBBI->getOperand(1).getImm(); 77 MBBI->eraseFromParent(); 81 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn); 85 --MBBI; 174 emitT2RegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument [all...] |
H A D | Thumb1FrameLowering.cpp | 39 MachineBasicBlock::iterator &MBBI, 43 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII, 49 MachineBasicBlock::iterator MBBI = MBB.begin(); local 60 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 74 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize, 79 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes, 118 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) { 119 ++MBBI; 38 emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetInstrInfo &TII, DebugLoc dl, const Thumb1RegisterInfo &MRI, int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) argument 225 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
H A D | Thumb1RegisterInfo.cpp | 65 MachineBasicBlock::iterator &MBBI, 77 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci)) 90 MachineBasicBlock::iterator &MBBI, 116 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg)) 119 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg)) 121 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg)) 124 MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes, 130 BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); 167 MachineBasicBlock::iterator &MBBI, 228 emitThumbRegPlusImmInReg(MBB, MBBI, d 64 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument 89 emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags = MachineInstr::NoFlags) argument 166 emitThumbRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags) argument 298 emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetInstrInfo &TII, DebugLoc dl, const Thumb1RegisterInfo &MRI, int NumBytes) argument 341 emitThumbConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, int Imm, const TargetInstrInfo &TII, const Thumb1RegisterInfo& MRI, DebugLoc dl) argument [all...] |
H A D | Thumb2ITBlockPass.cpp | 168 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); local 169 while (MBBI != E) { 170 MachineInstr *MI = &*MBBI; 175 ++MBBI; 184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT)) 193 ++MBBI; 200 for (; MBBI != E && Pos && 201 (!MI->getDesc().isBranch() && !MI->getDesc().isReturn()) ; ++MBBI) { 202 if (MBBI->isDebugValue()) 205 MachineInstr *NMI = &*MBBI; [all...] |
H A D | ARMExpandPseudoInsts.cpp | 58 MachineBasicBlock::iterator MBBI); 60 void ExpandVLD(MachineBasicBlock::iterator &MBBI); 61 void ExpandVST(MachineBasicBlock::iterator &MBBI); 62 void ExpandLaneOp(MachineBasicBlock::iterator &MBBI); 63 void ExpandVTBL(MachineBasicBlock::iterator &MBBI, 66 MachineBasicBlock::iterator &MBBI); 408 void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) { argument 409 MachineInstr &MI = *MBBI; 417 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 472 void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { argument 520 ExpandLaneOp(MachineBasicBlock::iterator &MBBI) argument 607 ExpandVTBL(MachineBasicBlock::iterator &MBBI, unsigned Opc, bool IsExt, unsigned NumRegs) argument 643 ExpandMOV32BitImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI) argument 715 ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) argument 1287 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); local [all...] |
/external/llvm/lib/Target/Alpha/ |
H A D | AlphaFrameLowering.cpp | 48 MachineBasicBlock::iterator MBBI = MBB.begin(); local 52 DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc()); 56 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29) 58 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29) 61 BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT)) 82 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes) 85 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30) 87 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30) 95 BuildMI(MBB, MBBI, d 107 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
H A D | AlphaInstrInfo.cpp | 346 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 351 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), 371 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 376 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 48 MachineBasicBlock::iterator MBBI = MBB.begin(); local 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) 82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r)) 83 ++MBBI; 85 if (MBBI != MBB.end()) 86 DL = MBBI 113 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | RegisterScavenging.h | 35 MachineBasicBlock::iterator MBBI; member in class:llvm::RegScavenger 67 /// before MBBI. One bit per physical register. If bit is set that means it's 91 while (MBBI != I) forward(); 96 void skipTo(MachineBasicBlock::iterator I) { MBBI = I; } 121 return scavengeRegister(RegClass, MBBI, SPAdj);
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/external/llvm/lib/Target/CellSPU/ |
H A D | SPUFrameLowering.cpp | 92 MachineBasicBlock::iterator MBBI = MBB.begin(); local 97 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 103 // Move MBBI back to the beginning of the function. 104 MBBI = MBB.begin(); 119 BuildMI(MBB, MBBI, dl, TII.get(SPU::PROLOG_LABEL)).addSym(FrameLabel); 124 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16) 128 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize) 131 BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1) 136 BuildMI(MBB, MBBI, d 189 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/llvm/lib/Target/MBlaze/ |
H A D | MBlazeInstrInfo.cpp | 286 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 291 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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H A D | MBlazeFrameLowering.cpp | 348 MachineBasicBlock::iterator MBBI = MBB.begin(); local 349 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 367 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDIK), MBlaze::R1) 372 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI)) 378 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI)) 382 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADD), MBlaze::R19) 389 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local 395 DebugLoc dl = MBBI->getDebugLoc(); 406 BuildMI(MBB, MBBI, d [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 86 MachineBasicBlock::iterator &MBBI, 103 unsigned Opc = MBBI->getOpcode(); 117 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) { 118 MachineOperand &MO = MBBI->getOperand(i); 142 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, argument 152 DebugLoc DL = MBB.findDebugLoc(MBBI); 160 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit); 165 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) 175 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) 187 void mergeSPUpdatesUp(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 85 findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetRegisterInfo &TRI, bool Is64Bit) argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsFrameLowering.cpp | 146 MachineBasicBlock::iterator MBBI = MBB.begin(); local 147 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 165 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER)); 169 BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD)) 171 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO)); 182 MBBI); 183 BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP) 188 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO)); 192 BuildMI(MBB, MBBI, d 270 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
H A D | MipsInstrInfo.cpp | 448 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 453 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 301 MachineBasicBlock::iterator MBBI = I; local 302 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg) 304 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg) 307 BuildMI(MBB, MBBI, dl, TII.get(ADDInstr))
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 67 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, argument 81 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 86 BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D) 101 MachineBasicBlock::iterator MBBI = MBB.begin(); local 102 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 113 while (MBBI != MBB.end() && 114 (MBBI->getOpcode() == SystemZ::MOV64mr || 115 MBBI 144 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 92 MachineBasicBlock::iterator MBBI = MBB.begin(); local 100 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 107 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII); 136 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); 143 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); 157 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII); 162 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel); 173 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII); 178 BuildMI(MBB, MBBI, d 217 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/llvm/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 215 MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const { 313 MachineBasicBlock::iterator MBBI) const { 214 convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const argument
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/external/llvm/lib/CodeGen/ |
H A D | MachineBasicBlock.cpp | 755 /// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping 758 MachineBasicBlock::findDebugLoc(MachineBasicBlock::iterator &MBBI) { argument 761 if (MBBI != E) { 763 MachineBasicBlock::iterator MBBI2 = MBBI;
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H A D | MachineFunction.cpp | 116 MachineFunction::iterator MBBI, E = end(); local 118 MBBI = begin(); 120 MBBI = MBB; 124 if (MBBI != begin()) 125 BlockNo = prior(MBBI)->getNumber()+1; 127 for (; MBBI != E; ++MBBI, ++BlockNo) { 128 if (MBBI->getNumber() != (int)BlockNo) { 130 if (MBBI->getNumber() != -1) { 131 assert(MBBNumbering[MBBI [all...] |