| /external/llvm/lib/MC/ |
| H A D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM) { argument
19 RelocationModel = RM;
|
| /external/libpng/contrib/pngminim/decoder/ |
| H A D | makefile | 8 RM=rm -f macro
40 $(RM) pngm2pnm$(O)
41 $(RM) pngm2pnm$(E)
42 $(RM) $(OBJS)
|
| /external/libpng/contrib/pngminim/encoder/ |
| H A D | makefile | 8 RM=rm -f macro
39 $(RM) pnm2pngm$(O)
40 $(RM) pnm2pngm$(E)
41 $(RM) $(OBJS)
|
| /external/libpng/contrib/pngminim/preader/ |
| H A D | makefile | 8 RM=rm -f macro
56 $(RM) rpng2-x$(O)
57 $(RM) rpng2-x$(E)
58 $(RM) $(OBJS)
|
| /external/llvm/lib/ExecutionEngine/ |
| H A D | TargetSelect.cpp | 33 Reloc::Model RM,
90 RM, CM);
29 selectTarget(Module *Mod, StringRef MArch, StringRef MCPU, const SmallVectorImpl<std::string>& MAttrs, Reloc::Model RM, CodeModel::Model CM, std::string *ErrorStr) argument
|
| /external/llvm/lib/Target/Alpha/ |
| H A D | AlphaTargetMachine.cpp | 27 Reloc::Model RM, CodeModel::Model CM)
28 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
25 AlphaTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/Alpha/MCTargetDesc/ |
| H A D | AlphaMCTargetDesc.cpp | 53 static MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
|
| /external/llvm/lib/Target/Blackfin/ |
| H A D | BlackfinTargetMachine.cpp | 28 Reloc::Model RM,
30 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
24 BlackfinTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/Blackfin/MCTargetDesc/ |
| H A D | BlackfinMCTargetDesc.cpp | 54 static MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
57 X->InitMCCodeGenInfo(RM, CM);
|
| /external/llvm/lib/Target/CBackend/ |
| H A D | CTargetMachine.h | 25 Reloc::Model RM, CodeModel::Model CM)
23 CTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/CellSPU/ |
| H A D | SPUTargetMachine.cpp | 37 Reloc::Model RM, CodeModel::Model CM)
38 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
35 SPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 27 Reloc::Model RM, CodeModel::Model CM)
25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeTargetMachine.cpp | 37 Reloc::Model RM, CodeModel::Model CM):
38 LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
35 MBlazeTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM)
32 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCTargetDesc.cpp | 52 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
55 X->InitMCCodeGenInfo(RM, CM);
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 29 Reloc::Model RM, CodeModel::Model CM,
31 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
56 StringRef FS, Reloc::Model RM,
58 : SparcTargetMachine(T, TT, CPU, FS, RM, CM, false) {
63 StringRef FS, Reloc::Model RM,
65 : SparcTargetMachine(T, TT, CPU, FS, RM, CM, true) {
27 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM, bool is64bit) argument
54 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
61 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCTargetDesc.cpp | 53 static MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
56 if (RM == Reloc::Default)
57 RM = Reloc::Static;
58 X->InitMCCodeGenInfo(RM, CM);
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetMachine.cpp | 25 StringRef FS, Reloc::Model RM,
27 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
23 SystemZTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 24 Reloc::Model RM, CodeModel::Model CM)
25 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
22 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | BuiltinFunctionChecker.cpp | 58 MemRegionManager& RM = C.getStoreManager().getRegionManager(); local
60 RM.getAllocaRegion(CE, C.getCurrentBlockCount(),
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMTargetMachine.cpp | 41 Reloc::Model RM, CodeModel::Model CM)
42 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
53 Reloc::Model RM, CodeModel::Model CM)
54 : ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM), InstrInfo(Subtarget),
74 Reloc::Model RM, CodeModel::Model CM)
75 : ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM),
39 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
51 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
72 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|
| /external/llvm/lib/Target/CellSPU/MCTargetDesc/ |
| H A D | SPUMCTargetDesc.cpp | 64 static MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
|
| /external/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCTargetDesc.cpp | 53 static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
56 X->InitMCCodeGenInfo(RM, CM);
|
| /external/llvm/lib/Target/PTX/MCTargetDesc/ |
| H A D | PTXMCTargetDesc.cpp | 54 static MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
57 X->InitMCCodeGenInfo(RM, CM);
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM,
33 : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
47 Reloc::Model RM, CodeModel::Model CM)
48 : PPCTargetMachine(T, TT, CPU, FS, RM, CM, false) {
54 Reloc::Model RM, CodeModel::Model CM)
55 : PPCTargetMachine(T, TT, CPU, FS, RM, CM, true) {
29 PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM, bool is64Bit) argument
45 PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
52 PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, Reloc::Model RM, CodeModel::Model CM) argument
|