Searched defs:rn (Results 1 - 18 of 18) sorted by relevance

/external/opencv/cv/src/
H A Dcvkdtree.cpp120 int rn = results->rows * results->cols; local
127 inbounds.begin() + std::min((int)inbounds.size(), rn),
H A Dcvhough.cpp211 int rn, tn; /* number of rho and theta discrete values */ local
254 rn = cvFloor( sqrt( (double)w * w + (double)h * h ) * irho );
270 CV_CALL( caccum = (uchar*)cvAlloc( rn * tn * sizeof( caccum[0] )));
271 memset( caccum, 0, rn * tn * sizeof( caccum[0] ));
323 assert( i < rn * tn );
335 for( ri = 0; ri < rn; ri++ )
346 if( count * 100 > rn * tn )
356 for( ri = 0; ri < rn; ri++ )
/external/openssl/crypto/lhash/
H A Dlhash.c182 LHASH_NODE *nn,**rn; local
189 rn=getrn(lh,data,&hash);
191 if (*rn == NULL)
203 *rn=nn;
210 ret= (*rn)->data;
211 (*rn)->data=data;
220 LHASH_NODE *nn,**rn; local
224 rn=getrn(lh,data,&hash);
226 if (*rn == NULL)
233 nn= *rn;
251 LHASH_NODE **rn; local
[all...]
/external/ipsec-tools/src/racoon/
H A Deaytest.c991 vchar_t *rn; local
995 rn = eay_set_random((u_int32_t)96);
996 PVDUMP(rn);
997 vfree(rn);
/external/qemu/target-arm/
H A Dop_helper.c32 uint32_t rn, uint32_t maxindex)
39 table = (uint64_t *)&env->vfp.regs[rn];
513 const int rn = (insn >> 16) & 0xf; local
518 uint32_t addr = env->regs[rn];
525 addr = env->regs[rn] + (1 << size) * reg;
527 addr = env->regs[rn] + (1 << size);
31 neon_tbl(uint32_t ireg, uint32_t def, uint32_t rn, uint32_t maxindex) argument
H A Dtranslate.c1187 static inline void gen_op_iwmmxt_movq_wRn_M0(int rn) argument
1189 iwmmxt_store_reg(cpu_M0, rn);
1192 static inline void gen_op_iwmmxt_movq_M0_wRn(int rn) argument
1194 iwmmxt_load_reg(cpu_M0, rn);
1197 static inline void gen_op_iwmmxt_orq_M0_wRn(int rn) argument
1199 iwmmxt_load_reg(cpu_V1, rn);
1203 static inline void gen_op_iwmmxt_andq_M0_wRn(int rn) argument
1205 iwmmxt_load_reg(cpu_V1, rn);
1209 static inline void gen_op_iwmmxt_xorq_M0_wRn(int rn) argument
1211 iwmmxt_load_reg(cpu_V1, rn);
1313 gen_op_iwmmxt_addl_M0_wRn(int rn) argument
2727 uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask; local
3829 int rd, rn, rm; local
4420 int rd, rn, rm; local
6417 unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; local
7782 uint32_t rd, rn, rm, rs; local
8852 uint32_t val, insn, op, rm, rn, rd, shift, cond; local
[all...]
/external/srec/srec_jni/
H A Dandroid_speech_srec_Recognizer.cpp192 const char* rn = env->GetStringUTFChars(ruleName, 0); local
193 checkEsrError(env, SR_RecognizerSetupRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn));
194 env->ReleaseStringUTFChars(ruleName, rn);
206 const char* rn = env->GetStringUTFChars(ruleName, 0); local
207 checkEsrError(env, SR_RecognizerActivateRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn, weight));
208 env->ReleaseStringUTFChars(ruleName, rn);
213 const char* rn = env->GetStringUTFChars(ruleName, 0); local
214 checkEsrError(env, SR_RecognizerDeactivateRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn));
215 env->ReleaseStringUTFChars(ruleName, rn);
226 const char* rn local
[all...]
/external/bluetooth/glib/tests/
H A Dtestglib.c673 const gchar *un, *rn, *hn; local
687 rn = g_get_real_name();
693 g_print ("real: %s\n", rn);
/external/v8/src/arm/
H A Dassembler-arm.cc193 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) { argument
194 rn_ = rn;
200 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) { argument
201 rn_ = rn;
209 MemOperand::MemOperand(Register rn, Register rm, argument
212 rn_ = rn;
811 Register rn,
826 CHECK(!rn.is(ip)); // rn should never be ip, or will be trashed
848 addrmod1(instr, rn, r
[all...]
H A Dassembler-arm.h427 // [rn +/- offset] Offset/NegOffset
428 // [rn +/- offset]! PreIndex/NegPreIndex
429 // [rn], +/- offset PostIndex/NegPostIndex
432 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
434 // [rn +/- rm] Offset/NegOffset
435 // [rn +/- rm]! PreIndex/NegPreIndex
436 // [rn], +/- rm PostIndex/NegPostIndex
437 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
439 // [rn +/- rm <shift_op> shift_imm] Offset/NegOffset
440 // [rn
455 Register rn() const { return rn_; } function in class:v8::internal::BASE_EMBEDDED
[all...]
H A Dsimulator-arm.cc1530 int rn = instr->RnValue(); local
1531 int32_t rn_val = get_register(rn);
1561 set_register(rn, rn_val);
1891 int rn = instr->RnValue(); local
1901 // Format(instr, "mul'cond's 'rn, 'rm, 'rs");
1902 int rd = rn; // Remap the rn field to the Rd register.
1913 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
1925 // Format(instr, "'um'al'cond's 'rd, 'rn, 'rs, 'rm");
1926 int rd_hi = rn; // Rema
1956 int rn = instr->RnValue(); local
2135 int rn = instr->RnValue(); local
2351 int rn = instr->RnValue(); local
2415 int rn = instr->RnValue(); local
3009 int rn = instr->RnValue(); local
3046 int rn = instr->RnValue(); local
3065 int rn = instr->RnValue(); local
[all...]
/external/wpa_supplicant_8/wpa_supplicant/
H A Devents.c1038 const char *rn, *rn2; local
1057 rn = wpa_s->driver->get_radio_name(wpa_s->drv_priv);
1058 if (rn == NULL || rn[0] == '\0')
1062 "sharing same radio (%s) in event_scan_results", rn);
1069 if (rn2 && os_strcmp(rn, rn2) == 0) {
/external/bluetooth/bluez/lib/
H A Dhci.c1113 evt_remote_name_req_complete *rn; local
1186 rn = (void *) ptr;
1189 if (bacmp(&rn->bdaddr, &cp->bdaddr))
1450 evt_remote_name_req_complete rn; local
1465 rq.rparam = &rn;
1471 if (rn.status) {
1476 rn.name[247] = '\0';
1477 strncpy(name, (char *) rn.name, len);
/external/qemu/
H A Darm-dis.c1742 int rn = (given >> 16) & 0xf; local
1746 func (stream, "[%s", arm_regnames[rn]);
1755 if (rn == 15)
2071 const char *rn = arm_regnames [(given >> 16) & 0xf]; local
2078 func (stream, "[%s], %c%s", rn, ubit ? '+' : '-', rm);
2090 func (stream, "[%s, %c%s", rn, ubit ? '+' : '-', rm);
2284 int rn = ((given >> 16) & 0xf); local
2300 func (stream, "}, [%s", arm_regnames[rn]);
2314 int rn = ((given >> 16) & 0xf); local
2375 func (stream, "}, [%s", arm_regnames[rn]);
2389 int rn = ((given >> 16) & 0xf); local
[all...]
/external/qemu/tcg/arm/
H A Dtcg-target.c342 static inline void tcg_out_bx(TCGContext *s, int cond, int rn) argument
344 tcg_out32(s, (cond << 28) | 0x012fff10 | rn); local
373 static inline void tcg_out_blx(TCGContext *s, int cond, int rn) argument
375 tcg_out32(s, (cond << 28) | 0x012fff30 | rn); local
385 int cond, int opc, int rd, int rn, int rm, int shift)
388 (rn << 16) | (rd << 12) | shift | rm);
411 int cond, int opc, int rd, int rn, int im)
414 (rn << 16) | (rd << 12) | im);
436 int rn = 0; local
443 tcg_out_dat_imm(s, cond, opc, rd, rn, ((ar
384 tcg_out_dat_reg(TCGContext *s, int cond, int opc, int rd, int rn, int rm, int shift) argument
410 tcg_out_dat_imm(TCGContext *s, int cond, int opc, int rd, int rn, int im) argument
503 tcg_out_ext8s(TCGContext *s, int cond, int rd, int rn) argument
517 tcg_out_ext8u(TCGContext *s, int cond, int rd, int rn) argument
523 tcg_out_ext16s(TCGContext *s, int cond, int rd, int rn) argument
537 tcg_out_ext16u(TCGContext *s, int cond, int rd, int rn) argument
551 tcg_out_bswap16s(TCGContext *s, int cond, int rd, int rn) argument
566 tcg_out_bswap16(TCGContext *s, int cond, int rd, int rn) argument
581 tcg_out_bswap32(TCGContext *s, int cond, int rd, int rn) argument
598 tcg_out_ld32_12(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
609 tcg_out_st32_12(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
620 tcg_out_ld32_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
627 tcg_out_st32_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
635 tcg_out_ld32_rwb(TCGContext *s, int cond, int rd, int rn, int rm) argument
642 tcg_out_st32_rwb(TCGContext *s, int cond, int rd, int rn, int rm) argument
649 tcg_out_ld16u_8(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
662 tcg_out_st16_8(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
675 tcg_out_ld16u_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
682 tcg_out_st16_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
689 tcg_out_ld16s_8(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
702 tcg_out_ld16s_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
709 tcg_out_ld8_12(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
720 tcg_out_st8_12(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
731 tcg_out_ld8_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
738 tcg_out_st8_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
745 tcg_out_ld8s_8(TCGContext *s, int cond, int rd, int rn, tcg_target_long im) argument
758 tcg_out_ld8s_r(TCGContext *s, int cond, int rd, int rn, int rm) argument
765 tcg_out_ld32u(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
775 tcg_out_st32(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
785 tcg_out_ld16u(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
795 tcg_out_ld16s(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
805 tcg_out_st16(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
815 tcg_out_ld8u(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
825 tcg_out_ld8s(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
835 tcg_out_st8(TCGContext *s, int cond, int rd, int rn, int32_t offset) argument
[all...]
/external/webkit/Source/JavaScriptCore/assembler/
H A DARMAssembler.h259 void emitInst(ARMWord op, int rd, int rn, ARMWord op2) argument
262 m_buffer.putInt(op | RN(rn) | RD(rd) | op2);
281 void and_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
283 emitInst(static_cast<ARMWord>(cc) | AND, rd, rn, op2);
286 void ands_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
288 emitInst(static_cast<ARMWord>(cc) | AND | SET_CC, rd, rn, op2); local
291 void eor_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
293 emitInst(static_cast<ARMWord>(cc) | EOR, rd, rn, op2);
296 void eors_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
298 emitInst(static_cast<ARMWord>(cc) | EOR | SET_CC, rd, rn, op local
301 sub_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
306 subs_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
308 emitInst(static_cast<ARMWord>(cc) | SUB | SET_CC, rd, rn, op2); local
311 rsb_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
316 rsbs_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
318 emitInst(static_cast<ARMWord>(cc) | RSB | SET_CC, rd, rn, op2); local
321 add_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
326 adds_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
328 emitInst(static_cast<ARMWord>(cc) | ADD | SET_CC, rd, rn, op2); local
331 adc_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
336 adcs_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
338 emitInst(static_cast<ARMWord>(cc) | ADC | SET_CC, rd, rn, op2); local
341 sbc_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
346 sbcs_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
348 emitInst(static_cast<ARMWord>(cc) | SBC | SET_CC, rd, rn, op2); local
351 rsc_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
356 rscs_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
358 emitInst(static_cast<ARMWord>(cc) | RSC | SET_CC, rd, rn, op2); local
361 tst_r(int rn, ARMWord op2, Condition cc = AL) argument
363 emitInst(static_cast<ARMWord>(cc) | TST | SET_CC, 0, rn, op2); local
366 teq_r(int rn, ARMWord op2, Condition cc = AL) argument
368 emitInst(static_cast<ARMWord>(cc) | TEQ | SET_CC, 0, rn, op2); local
371 cmp_r(int rn, ARMWord op2, Condition cc = AL) argument
373 emitInst(static_cast<ARMWord>(cc) | CMP | SET_CC, 0, rn, op2); local
376 cmn_r(int rn, ARMWord op2, Condition cc = AL) argument
378 emitInst(static_cast<ARMWord>(cc) | CMN | SET_CC, 0, rn, op2); local
381 orr_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
386 orrs_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
388 emitInst(static_cast<ARMWord>(cc) | ORR | SET_CC, rd, rn, op2); local
415 bic_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
420 bics_r(int rd, int rn, ARMWord op2, Condition cc = AL) argument
422 emitInst(static_cast<ARMWord>(cc) | BIC | SET_CC, rd, rn, op2); local
435 mul_r(int rd, int rn, int rm, Condition cc = AL) argument
440 muls_r(int rd, int rn, int rm, Condition cc = AL) argument
445 mull_r(int rdhi, int rdlo, int rn, int rm, Condition cc = AL) argument
510 ldrh_r(int rd, int rn, int rm, Condition cc = AL) argument
512 emitInst(static_cast<ARMWord>(cc) | LDRH | HDT_UH | DT_UP | DT_PRE, rd, rn, rm); local
525 strh_r(int rn, int rm, int rd, Condition cc = AL) argument
527 emitInst(static_cast<ARMWord>(cc) | STRH | HDT_UH | DT_UP | DT_PRE, rd, rn, rm); local
[all...]
H A DARMv7Assembler.h745 void add(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
748 ASSERT((rd != ARMRegisters::sp) || (rn == ARMRegisters::sp));
750 ASSERT(rn != ARMRegisters::pc);
753 if (rn == ARMRegisters::sp) {
761 } else if (!((rd | rn) & 8)) {
763 m_formatter.oneWordOp7Reg3Reg3Reg3(OP_ADD_imm_T1, (RegisterID)imm.getUInt3(), rn, rd);
765 } else if ((rd == rn) && imm.isUInt8()) {
772 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_ADD_imm_T3, rn, rd, imm);
775 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_ADD_imm_T4, rn, rd, imm);
779 void add(RegisterID rd, RegisterID rn, RegisterI argument
789 add(RegisterID rd, RegisterID rn, RegisterID rm) argument
802 add_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
824 add_S(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
834 add_S(RegisterID rd, RegisterID rn, RegisterID rm) argument
842 ARM_and(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
850 ARM_and(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
858 ARM_and(RegisterID rd, RegisterID rn, RegisterID rm) argument
876 asr(RegisterID rd, RegisterID rn, RegisterID rm) argument
924 cmn(RegisterID rn, ARMThumbImmediate imm) argument
932 cmp(RegisterID rn, ARMThumbImmediate imm) argument
943 cmp(RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
950 cmp(RegisterID rn, RegisterID rm) argument
959 eor(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
968 eor(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
977 eor(RegisterID rd, RegisterID rn, RegisterID rm) argument
1008 ldr(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1032 ldr(RegisterID rt, RegisterID rn, int offset, bool index, bool wback) argument
1055 ldr(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0) argument
1068 ldrh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1090 ldrh(RegisterID rt, RegisterID rn, int offset, bool index, bool wback) argument
1112 ldrh(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0) argument
1125 ldrb(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1136 ldrb(RegisterID rt, RegisterID rn, int offset, bool index, bool wback) argument
1159 ldrb(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift = 0) argument
1179 lsl(RegisterID rd, RegisterID rn, RegisterID rm) argument
1195 lsr(RegisterID rd, RegisterID rn, RegisterID rm) argument
1266 orr(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1274 orr(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
1282 orr(RegisterID rd, RegisterID rn, RegisterID rm) argument
1292 orr_S(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
1300 orr_S(RegisterID rd, RegisterID rn, RegisterID rm) argument
1318 ror(RegisterID rd, RegisterID rn, RegisterID rm) argument
1326 smull(RegisterID rdLo, RegisterID rdHi, RegisterID rn, RegisterID rm) argument
1337 str(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) argument
1362 str(RegisterID rt, RegisterID rn, int offset, bool index, bool wback) argument
1385 str(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0) argument
1397 sub(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1426 sub(RegisterID rd, ARMThumbImmediate imm, RegisterID rn) argument
1439 sub(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
1449 sub(RegisterID rd, RegisterID rn, RegisterID rm) argument
1458 sub_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) argument
1483 sub_S(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
1493 sub_S(RegisterID rd, RegisterID rn, RegisterID rm) argument
1501 tst(RegisterID rn, ARMThumbImmediate imm) argument
1509 tst(RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift) argument
1516 tst(RegisterID rn, RegisterID rm) argument
1524 vadd_F64(FPDoubleRegisterID rd, FPDoubleRegisterID rn, FPDoubleRegisterID rm) argument
1551 vdiv_F64(FPDoubleRegisterID rd, FPDoubleRegisterID rn, FPDoubleRegisterID rm) argument
1556 vldr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm) argument
1561 vmov(RegisterID rd, FPSingleRegisterID rn) argument
1567 vmov(FPSingleRegisterID rd, RegisterID rn) argument
1579 vmul_F64(FPDoubleRegisterID rd, FPDoubleRegisterID rn, FPDoubleRegisterID rm) argument
1584 vstr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm) argument
1589 vsub_F64(FPDoubleRegisterID rd, FPDoubleRegisterID rn, FPDoubleRegisterID rm) argument
2272 vfpMemOp(OpcodeID1 op1, OpcodeID2 op2, bool size, RegisterID rn, VFPOperand rd, int32_t imm) argument
[all...]
H A DSH4Assembler.h220 inline uint16_t getOpcodeGroup1(uint16_t opc, int rm, int rn) argument
222 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4));
230 inline uint16_t getOpcodeGroup3(uint16_t opc, int rm, int rn) argument
232 return (opc | ((rm & 0xf) << 8) | (rn & 0xff));
235 inline uint16_t getOpcodeGroup4(uint16_t opc, int rm, int rn, int offset) argument
237 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4) | (offset & 0xf));
255 inline uint16_t getOpcodeGroup8(uint16_t opc, int rm, int rn) argument
257 return (opc | ((rm & 0x7) << 9) | ((rn & 0x7) << 5));
260 inline uint16_t getOpcodeGroup9(uint16_t opc, int rm, int rn) argument
262 return (opc | ((rm & 0xf) << 8) | ((rn
265 getOpcodeGroup10(uint16_t opc, int rm, int rn) argument
270 getOpcodeGroup11(uint16_t opc, int rm, int rn) argument
[all...]

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