/external/llvm/test/MC/MBlaze/ |
H A D | mblaze_fsl.s | 6 # TYPE F: OPCODE RD NCTAE FSL 9 # TYPE FD: OPCODE RD RB NCTAE
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H A D | mblaze_operands.s | 7 # TYPE A: OPCODE RD RA RB FLAGS
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/external/clang/lib/AST/ |
H A D | DeclBase.cpp | 868 if (const RecordDecl *RD = dyn_cast<RecordDecl>(this)) 869 FieldsAlreadyLoaded = RD->LoadedFieldsFromExternalStorage;
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H A D | ExprConstant.cpp | 565 const RecordDecl *RD = Ty->getAs<RecordType>()->getDecl(); local 566 const ASTRecordLayout &RL = Info.Ctx.getASTRecordLayout(RD); 1781 RecordDecl *RD = RT->getDecl(); 1782 const ASTRecordLayout &RL = Info.Ctx.getASTRecordLayout(RD); 1803 RecordDecl *RD = RT->getDecl(); 1804 const ASTRecordLayout &RL = Info.Ctx.getASTRecordLayout(RD);
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H A D | Expr.cpp | 1960 const CXXRecordDecl *RD = cast<CXXRecordDecl>(RT->getDecl()); local 1961 CT = MergeCanThrow(CT, CanCalleeThrow(C, this, RD->getDestructor()));
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/external/valgrind/main/none/tests/arm/ |
H A D | v6media.c | 18 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ 26 /* set #RD to 0x55555555 so we can see which parts get overwritten */ \ 27 "mov " #RD ", #0x55" "\n\t" \ 28 "orr " #RD "," #RD "," #RD ", LSL #8" "\n\t" \ 29 "orr " #RD "," #RD "," #RD ", LSL #16" "\n\t" \ 31 "mov %0," #RD ";" \ [all...] |
H A D | v6intThumb.c | 19 #define TESTINST1(instruction, RD, cvin) \ 27 "mov %0," #RD ";" \ 31 : #RD, "cc", "memory" \ 47 #define TESTINST1x(instruction, RDval, RD, cvin) \ 54 "mov " #RD ",%3;" \ 56 "mov %0," #RD ";" \ 60 : #RD, "cc", "memory" \ 74 #define TESTINST2(instruction, RMval, RD, RM, cvin) \ 82 /* set #RD to 0x55555555 so we can see which parts get overwritten */ \ 83 "mov " #RD ", # [all...] |
/external/clang/lib/Serialization/ |
H A D | ASTWriter.cpp | 3918 if (const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(D)) { 3920 if (RD->isFromASTFile()) { 3924 RewriteDecl(RD); 3928 I = RD->redecls_begin(), E = RD->redecls_end(); I != E; ++I) { 3930 if (Redecl == RD) 3957 void ASTWriter::AddedCXXImplicitMember(const CXXRecordDecl *RD, const Decl *D) { argument 3960 if (!(!D->isFromASTFile() && RD->isFromASTFile())) 3966 assert(RD->isCompleteDefinition()); 3967 UpdateRecord &Record = DeclUpdates[RD]; [all...] |
/external/clang/lib/Analysis/ |
H A D | CFG.cpp | 687 const CXXRecordDecl *RD = DD->getParent(); local 690 for (CXXRecordDecl::base_class_const_iterator VI = RD->vbases_begin(), 691 VE = RD->vbases_end(); VI != VE; ++VI) { 700 for (CXXRecordDecl::base_class_const_iterator BI = RD->bases_begin(), 701 BE = RD->bases_end(); BI != BE; ++BI) { 712 for (CXXRecordDecl::field_iterator FI = RD->field_begin(), 713 FE = RD->field_end(); FI != FE; ++FI) {
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/external/clang/lib/Sema/ |
H A D | SemaCast.cpp | 1912 RecordDecl *RD = DestRecordTy->getDecl(); local 1914 for (Field = RD->field_begin(), FieldEnd = RD->field_end();
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H A D | SemaExprMember.cpp | 34 RecordDecl *RD = Record->getDefinition(); 35 if (!RD) return false; 36 Record = cast<CXXRecordDecl>(RD);
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H A D | SemaInit.cpp | 687 RecordDecl *RD = DeclType->getAs<RecordType>()->getDecl(); local 688 CheckStructUnionTypes(Entity, IList, DeclType, RD->field_begin(), 1329 RecordDecl *RD = DeclType->getAs<RecordType>()->getDecl(); local 1330 for (RecordDecl::field_iterator FieldEnd = RD->field_end(); 1348 RecordDecl *RD = DeclType->getAs<RecordType>()->getDecl(); local 1349 RecordDecl::field_iterator FieldEnd = RD->field_end(); 1431 for (RecordDecl::field_iterator it = Field, end = RD->field_end();
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H A D | SemaChecking.cpp | 3872 const RecordDecl *RD = dyn_cast<RecordDecl>(FD->getDeclContext()); local 3873 if (!RD || !RD->isStruct())
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H A D | SemaCodeComplete.cpp | 1062 if (RecordDecl *RD = dyn_cast<RecordDecl>(ND)) 1063 return RD->getTagKind() == TTK_Class || 1064 RD->getTagKind() == TTK_Struct; 1075 if (RecordDecl *RD = dyn_cast<RecordDecl>(ND)) 1076 return RD->getTagKind() == TTK_Union;
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H A D | SemaExpr.cpp | 2028 CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(Member->getDeclContext()); local 2029 if (!RD) 2038 DestRecordType = Context.getCanonicalType(Context.getTypeDeclType(RD)); 8498 RecordDecl *RD = RC->getDecl(); 8504 if (CXXRecordDecl *CRD = dyn_cast<CXXRecordDecl>(RD)) { 8515 LookupQualifiedName(R, RD); 8525 << OC.U.IdentInfo << RD << SourceRange(OC.LocStart,
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/external/libvpx/vp8/common/x86/ |
H A D | postproc_mmx.c | 35 #define RD __declspec(align(16)) __int64 rd = 0x0040004000400040; macro 39 const static RD; variable 63 RD
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/external/clang/lib/CodeGen/ |
H A D | CodeGenModule.h | 751 llvm::GlobalVariable::LinkageTypes getVTableLinkage(const CXXRecordDecl *RD);
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H A D | CGExprAgg.cpp | 1002 const CXXRecordDecl *RD = cast<CXXRecordDecl>(RT->getDecl()); local 1003 if (RD->hasUserDeclaredConstructor())
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H A D | ItaniumCXXABI.cpp | 215 const CXXRecordDecl *RD = local 219 CGM.getTypes().GetFunctionType(CGM.getTypes().getFunctionInfo(RD, FPT),
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H A D | CGExprScalar.cpp | 1511 RecordDecl *RD = CurrentType->getAs<RecordType>()->getDecl(); local 1512 const ASTRecordLayout &RL = CGF.getContext().getASTRecordLayout(RD); 1517 for (RecordDecl::field_iterator Field = RD->field_begin(), 1518 FieldEnd = RD->field_end(); 1544 RecordDecl *RD = CurrentType->getAs<RecordType>()->getDecl(); local 1545 const ASTRecordLayout &RL = CGF.getContext().getASTRecordLayout(RD);
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H A D | CGBlocks.cpp | 306 if (const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(DC)) 307 thisType = C.getPointerType(C.getRecordType(RD));
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/external/clang/include/clang/Sema/ |
H A D | Sema.h | 3098 bool FindDeallocationFunction(SourceLocation StartLoc, CXXRecordDecl *RD, 3532 const CXXRecordDecl *RD); 3745 void DiagnoseAbstractType(const CXXRecordDecl *RD); 5431 void AddAlignmentAttributesForRecord(RecordDecl *RD); 5434 void AddMsStructLayoutForRecord(RecordDecl *RD); 5445 void AddPushedVisibilityAttribute(Decl *RD);
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/external/libvpx/vp8/encoder/ |
H A D | encodeframe.c | 454 /* Apply the masking to the RD multiplier. */ 1161 if (cpi->sf.RD && cpi->compressor_speed != 2) 1248 if (cpi->sf.RD) 1282 // Experimental RD code
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H A D | onyx_if.c | 559 sf->RD = 1; 790 sf->RD = 0; // Turn rd off 978 sf->RD = 0; 1782 // Experimental RD Code 2056 // Set starting values of RD threshold multipliers (128 = *1) 3072 if ((cpi->compressor_speed == 2) && (cpi->Speed >= 5) && (cpi->sf.RD == 0)) 3447 // Reset the RD threshold multipliers to default of * 1 (128)
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/external/llvm/lib/Analysis/ |
H A D | ScalarEvolution.cpp | 6579 LoopDisposition RD = getLoopDisposition(UDiv->getRHS(), L); 6580 if (RD == LoopVariant) 6582 return (LD == LoopInvariant && RD == LoopInvariant) ? 6663 BlockDisposition RD = getBlockDisposition(RHS, BB); 6664 if (RD == DoesNotDominateBlock) 6666 return (LD == ProperlyDominatesBlock && RD == ProperlyDominatesBlock) ?
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