Searched refs:Implicit (Results 1 - 9 of 9) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 31 Implicit = 0x4, enumerator in enum:llvm::RegState::__anon6431
37 ImplicitDefine = Implicit | Define,
38 ImplicitKill = Implicit | Kill
63 flags & RegState::Implicit,
250 return B ? RegState::Implicit : 0;
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| /external/clang/include/clang/AST/ |
| H A D | DeclBase.h | 233 /// Implicit - Whether this declaration was implicitly generated by
235 unsigned Implicit : 1;
287 HasAttrs(false), Implicit(false), Used(false), Referenced(false),
298 HasAttrs(false), Implicit(false), Used(false), Referenced(false),
440 bool isImplicit() const { return Implicit; }
441 void setImplicit(bool I = true) { Implicit = I; }
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| H A D | ExprCXX.h | 551 bool Implicit : 1;
561 Loc(L), Implicit(isImplicit) { }
570 bool isImplicit() const { return Implicit; }
571 void setImplicit(bool I) { Implicit = I; }
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| /external/clang/lib/Sema/ |
| H A D | SemaAccess.cpp | 1046 bool Implicit = true; local
1052 Implicit = false;
1059 << Implicit;
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| /external/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 856 .addReg(StackPtr, RegState::Define | RegState::Implicit)
857 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit)
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| H A D | X86ISelLowering.cpp | 11878 .addReg(X86::RAX, RegState::Implicit)
11879 .addReg(X86::RSP, RegState::Implicit)
11880 .addReg(X86::RAX, RegState::Define | RegState::Implicit)
11881 .addReg(X86::RSP, RegState::Define | RegState::Implicit)
11882 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
11889 .addReg(X86::RAX, RegState::Implicit)
11890 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
11902 .addReg(X86::EAX, RegState::Implicit)
11903 .addReg(X86::ESP, RegState::Implicit)
11904 .addReg(X86::EAX, RegState::Define | RegState::Implicit)
[all...] |
| H A D | X86InstrInfo.cpp | 2958 RegState::Implicit |
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| /external/clang/lib/Serialization/ |
| H A D | ASTReaderStmt.cpp | 837 bool Implicit = Record[Idx++] != 0; local
838 if (Implicit) {
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 918 MIB.addReg(DestReg, RegState::Define | RegState::Implicit);
937 MIB.addReg(DestReg, RegState::Define | RegState::Implicit);
1052 MachineInstrBuilder(MI).addReg(SrcRegS, RegState::Implicit);
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