Searched refs:LiveRegDefs (Results 1 - 2 of 2) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp67 /// LiveRegDefs - A set of physical registers and their definition
71 std::vector<SUnit*> LiveRegDefs; member in class:__anon6666::ScheduleDAGFast
115 LiveRegDefs.resize(TRI->getNumRegs(), NULL);
165 if (!LiveRegDefs[I->getReg()]) {
167 LiveRegDefs[I->getReg()] = I->getSUnit();
193 assert(LiveRegDefs[I->getReg()] == SU &&
196 LiveRegDefs[I->getReg()] = NULL;
439 std::vector<SUnit*> &LiveRegDefs,
444 if (LiveRegDefs[Reg] && LiveRegDefs[Re
438 CheckForLiveRegDef(SUnit *SU, unsigned Reg, std::vector<SUnit*> &LiveRegDefs, SmallSet<unsigned, 4> &RegAdded, SmallVector<unsigned, 4> &LRegs, const TargetRegisterInfo *TRI) argument
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H A DScheduleDAGRRList.cpp154 /// LiveRegDefs - A set of physical registers and their definition
158 std::vector<SUnit*> LiveRegDefs; member in class:__anon6670::ScheduleDAGRRList
332 LiveRegDefs.resize(TRI->getNumRegs(), NULL);
407 /// Always update LiveRegDefs for a register dependence even if the current SU
418 /// LiveRegDefs[flags] = 3
433 SUnit *RegDef = LiveRegDefs[I->getReg()]; (void)RegDef;
436 LiveRegDefs[I->getReg()] = I->getSUnit();
626 if (I->isAssignedRegDep() && LiveRegDefs[I->getReg()] == SU) {
629 LiveRegDefs[I->getReg()] = NULL;
681 assert(LiveRegDefs[
1040 CheckForLiveRegDef(SUnit *SU, unsigned Reg, std::vector<SUnit*> &LiveRegDefs, SmallSet<unsigned, 4> &RegAdded, SmallVector<unsigned, 4> &LRegs, const TargetRegisterInfo *TRI) argument
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