Searched refs:eor (Results 1 - 25 of 38) sorted by relevance

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/external/openssl/crypto/sha/asm/
H A Dsha256-armv4.s46 eor r0,r0,r8,ror#11
47 eor r2,r9,r10
48 eor r0,r0,r8,ror#25 @ Sigma1(e)
51 eor r2,r2,r10 @ Ch(e,f,g)
55 eor r11,r11,r4,ror#13
57 eor r11,r11,r4,ror#22 @ Sigma0(a)
76 eor r0,r0,r7,ror#11
77 eor r2,r8,r9
78 eor r0,r0,r7,ror#25 @ Sigma1(e)
81 eor r
[all...]
H A Dsha1-armv4-large.s26 eor r10,r5,r6 @ F_xx_xx
31 eor r10,r10,r6,ror#2 @ F_00_19(B,C,D)
41 eor r10,r4,r5 @ F_xx_xx
46 eor r10,r10,r5,ror#2 @ F_00_19(B,C,D)
56 eor r10,r3,r4 @ F_xx_xx
61 eor r10,r10,r4,ror#2 @ F_00_19(B,C,D)
71 eor r10,r7,r3 @ F_xx_xx
76 eor r10,r10,r3,ror#2 @ F_00_19(B,C,D)
86 eor r10,r6,r7 @ F_xx_xx
91 eor r1
[all...]
H A Dsha512-armv4.s111 eor r9,r9,r8,lsl#18
112 eor r10,r10,r7,lsl#18
113 eor r9,r9,r7,lsr#18
114 eor r10,r10,r8,lsr#18
115 eor r9,r9,r8,lsl#14
116 eor r10,r10,r7,lsl#14
117 eor r9,r9,r8,lsr#9
118 eor r10,r10,r7,lsr#9
119 eor r9,r9,r7,lsl#23
120 eor r1
[all...]
H A Dsha512-armv4.pl71 eor $t0,$t0,$Ehi,lsl#18
72 eor $t1,$t1,$Elo,lsl#18
73 eor $t0,$t0,$Elo,lsr#18
74 eor $t1,$t1,$Ehi,lsr#18
75 eor $t0,$t0,$Ehi,lsl#14
76 eor $t1,$t1,$Elo,lsl#14
77 eor $t0,$t0,$Ehi,lsr#9
78 eor $t1,$t1,$Elo,lsr#9
79 eor $t0,$t0,$Elo,lsl#23
80 eor
[all...]
H A Dsha256-armv4.pl62 eor $t0,$t0,$e,ror#$Sigma1[1]
63 eor $t1,$f,$g
64 eor $t0,$t0,$e,ror#$Sigma1[2] @ Sigma1(e)
67 eor $t1,$t1,$g @ Ch(e,f,g)
71 eor $h,$h,$a,ror#$Sigma0[1]
73 eor $h,$h,$a,ror#$Sigma0[2] @ Sigma0(a)
93 eor $t0,$t0,$t1,ror#$sigma0[1]
94 eor $t0,$t0,$t1,lsr#$sigma0[2] @ sigma0(X[i+1])
97 eor $t1,$t1,$t2,ror#$sigma1[1]
99 eor
[all...]
H A Dsha1-armv4-large.pl78 eor $t0,$t0,$t1
79 eor $t2,$t2,$t3
80 eor $t1,$c,$d @ F_xx_xx
83 eor $t0,$t0,$t2,ror#31
101 eor $t1,$c,$d @ F_xx_xx
106 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
116 eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
123 &Xupdate(@_,"eor $t1,$b,$t1,ror#2");
H A Dsha1-thumb.pl70 eor $t1,$d
72 eor $t1,$d @ F_00_19(B,C,D)
81 eor $t1,$c
82 eor $t1,$d @ F_20_39(B,C,D)
161 eor $a,$b
162 eor $a,$c
163 eor $a,$d
/external/openssl/crypto/aes/asm/
H A Daes-armv4.pl242 eor $s0,$s0,$t1
244 eor $s1,$s1,$t2
245 eor $s2,$s2,$t3
246 eor $s3,$s3,$i1
267 eor $s0,$s0,$i1,ror#8
270 eor $t2,$t2,$i2,ror#8
272 eor $t3,$t3,$i3,ror#8
274 eor $s1,$s1,$t1,ror#24
280 eor $s0,$s0,$i1,ror#16
283 eor
[all...]
H A Daes-armv4.s194 eor r0,r0,r4
196 eor r1,r1,r5
197 eor r2,r2,r6
198 eor r3,r3,r7
219 eor r0,r0,r7,ror#8
222 eor r5,r5,r8,ror#8
224 eor r6,r6,r9,ror#8
226 eor r1,r1,r4,ror#24
232 eor r0,r0,r7,ror#16
235 eor r
[all...]
/external/webkit/Source/WebCore/platform/text/
H A DBidiResolver.h59 : eor(WTF::Unicode::OtherNeutral)
66 : eor(eorDir)
73 WTF::Unicode::Direction eor; member in struct:WebCore::BidiStatus
96 return status1.eor == status2.eor && status1.last == status2.last && status1.lastStrong == status2.lastStrong && *(status1.context) == *(status2.context);
173 void setEorDir(WTF::Unicode::Direction eorDir) { m_status.eor = eorDir; }
200 // sor and eor are "start of run" and "end of run" respectively and correpond
249 m_status.eor = WTF::Unicode::OtherNeutral;
266 ASSERT(m_status.eor != OtherNeutral || m_eor.atEnd());
285 // bidi.sor ... bidi.eor
[all...]
/external/llvm/test/MC/ARM/
H A Darm-arithmetic-aliases.s46 eor r2, r2, #6 label
47 eor r2, #6 label
48 eor r2, r2, r3 label
49 eor r2, r3 label
51 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2]
52 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2]
53 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
54 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
H A Darm_instructions.s21 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
22 eor r1,r2,r3
H A Dbasic-arm-instructions.s580 eor r4, r5, #0xf000
581 eor r4, r5, r6
582 eor r4, r5, r6, lsl #5
583 eor r4, r5, r6, lsr #5
584 eor r4, r5, r6, lsr #5
585 eor r4, r5, r6, asr #5
586 eor r4, r5, r6, ror #5
587 eor r6, r7, r8, lsl r9
588 eor r6, r7, r8, lsr r9
589 eor r
[all...]
/external/v8/test/cctest/
H A Dtest-disasm-arm.cc116 COMPARE(eor(r4, r5, Operand(r6, LSL, 0)),
117 "e0254006 eor r4, r5, r6");
118 COMPARE(eor(r4, r5, Operand(r7, LSL, 1), SetCC),
120 COMPARE(eor(r4, r5, Operand(r8, LSL, 2), LeaveCC, ne),
122 COMPARE(eor(r4, r5, Operand(r9, LSL, 3), SetCC, cs),
276 // We only disassemble one instruction so the eor instruction is not here.
277 COMPARE(eor(r5, r4, Operand(0x1234), LeaveCC, ne),
283 // We only disassemble one instruction so the eor instruction is not here.
284 // The eor does the setcc so we get a movw here.
285 COMPARE(eor(r
[all...]
/external/libvpx/vp8/common/arm/armv6/
H A Dsimpleloopfilter_v6.asm99 eor r3, r3, r2 ; p1 offset to convert to a signed value
100 eor r6, r6, r2 ; q1 offset to convert to a signed value
101 eor r4, r4, r2 ; p0 offset to convert to a signed value
102 eor r5, r5, r2 ; q0 offset to convert to a signed value
126 eor r5, r5, r2 ; *oq0 = u^0x80
128 eor r4, r4, r2 ; *op0 = u^0x80
203 eor r3, r3, r2 ; p1 offset to convert to a signed value
204 eor r6, r6, r2 ; q1 offset to convert to a signed value
205 eor r4, r4, r2 ; p0 offset to convert to a signed value
206 eor r
[all...]
H A Dloopfilter_v6.asm171 eor r7, r7, r12 ; p1 offset to convert to a signed value
172 eor r8, r8, r12 ; p0 offset to convert to a signed value
173 eor r9, r9, r12 ; q0 offset to convert to a signed value
174 eor r10, r10, r12 ; q1 offset to convert to a signed value
239 eor r11, r11, r12 ; *op1 = u^0x80
241 eor r9, r9, r12 ; *op0 = u^0x80
243 eor r8, r8, r12 ; *oq0 = u^0x80
245 eor r10, r10, r12 ; *oq1 = u^0x80
384 eor r7, r7, r12 ; ps1
385 eor r
[all...]
/external/libvpx/vp8/encoder/arm/armv6/
H A Dvp8_variance_halfpixvar16x16_hv_armv6.asm44 eor r4, r4, r10
48 eor r5, r5, r10
53 eor r4, r4, r10
85 eor r4, r4, r10
89 eor r5, r5, r10
94 eor r4, r4, r10
127 eor r4, r4, r10
131 eor r5, r5, r10
136 eor r4, r4, r10
167 eor r
[all...]
H A Dvp8_fast_quantize_b_armv6.asm48 eor r9, r9, lr ; [z1 ^ sz1 | z0 ^ sz0]
60 eor r12, r12, r11 ; [z3 ^ sz3 | z2 ^ sz2]
67 eor r0, r0, lr ; [(y1 ^ sz1) | (y0 ^ sz0)]
81 eor r10, r10, r11 ; [(y3 ^ sz3) | (y2 ^ sz2)]
H A Dvp8_variance_halfpixvar16x16_h_armv6.asm42 eor r4, r4, r10
70 eor r4, r4, r10
101 eor r4, r4, r10
132 eor r4, r4, r10
H A Dvp8_variance_halfpixvar16x16_v_armv6.asm43 eor r4, r4, r10
71 eor r4, r4, r10
102 eor r4, r4, r10
133 eor r4, r4, r10
/external/valgrind/main/none/tests/arm/
H A Dv6intThumb.stdout.exp1793 eor.w r1, r2, #0xffffffff :: rd 0xcebea6d8 rm 0x31415927, c:v-in 0, cpsr 0xc0000000 NZ
1794 eor.w r1, r2, #0xee00ee00 :: rd 0xdf41b727 rm 0x31415927, c:v-in 0, cpsr 0xc0000000 NZ
1795 eor.w r1, r2, #255 :: rd 0x000000ff rm 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
1796 eor.w r1, r2, #0 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0xc0000000 NZ
1797 eor.w r1, r2, #1 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
1798 eor.w r1, r2, #0 :: rd 0xffffffff rm 0xffffffff, c:v-in 0, cpsr 0xc0000000 NZ
1799 eor.w r1, r2, #-1 :: rd 0xffffffff rm 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
1800 eor.w r1, r2, #0x80000000 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
1801 eor.w r1, r2, #0 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0xc0000000 NZ
1802 eor
[all...]
/external/webrtc/src/common_audio/signal_processing_library/main/source/
H A Dwebrtc_fft_4ofq14_gcc_android.s117 eor r3, r3, r2, lsr #4
121 eor r3, r3, r2, lsr #5
128 eor r3, r3, r12
H A Dwebrtc_fft_4oiq14_gcc_android.s115 eor r3, r3, r2, lsr #4
118 eor r3, r3, r2, lsr #5
125 eor r3, r3, r12
/external/icu4c/common/
H A Dubidi.c1010 until proven that there is L or sor/eor on both sides. AN is handled like EN.
1411 DirProp sor, DirProp eor) {
1454 gprop=eor;
1489 /* there is an unprocessed sequence if its property == eor */
1519 processPropertySeq(pBiDi, &levState, eor, limit, limit);
1954 /* sor, eor: start and end types of same-level-run */
1958 DirProp sor, eor; local
1960 /* determine the first sor and set eor to it because of the loop body (sor=eor there) */
1964 eor
1409 resolveImplicitLevels(UBiDi *pBiDi, int32_t start, int32_t limit, DirProp sor, DirProp eor) argument
[all...]
/external/webkit/Source/WebCore/rendering/
H A DInlineIterator.h291 m_status.eor = WTF::Unicode::OtherNeutral;

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