iwalsh_sse2.asm revision 90d3ed91ae9228e1c8bab561b6138d4cb8c1e4fd 
1;
2;  Copyright (c) 2010 The VP8 project authors. All Rights Reserved.
3;
4;  Use of this source code is governed by a BSD-style license and patent
5;  grant that can be found in the LICENSE file in the root of the source
6;  tree. All contributing project authors may be found in the AUTHORS
7;  file in the root of the source tree.
8;
9
10
11%include "vpx_ports/x86_abi_support.asm"
12
13;void vp8_short_inv_walsh4x4_sse2(short *input, short *output)
14global sym(vp8_short_inv_walsh4x4_sse2)
15sym(vp8_short_inv_walsh4x4_sse2):
16    push        rbp
17    mov         rbp, rsp
18    SHADOW_ARGS_TO_STACK 2
19    push        rsi
20    push        rdi
21    ; end prolog
22
23    mov     rsi, arg(0)
24    mov     rdi, arg(1)
25    mov     rax, 3
26
27    movdqa    xmm0, [rsi + 0]       ;ip[4] ip[0]
28    movdqa    xmm1, [rsi + 16]      ;ip[12] ip[8]
29
30    shl     rax, 16
31    or      rax, 3            ;00030003h
32
33    pshufd    xmm2, xmm1, 4eh       ;ip[8] ip[12]
34    movdqa    xmm3, xmm0          ;ip[4] ip[0]
35
36    paddw   xmm0, xmm2          ;ip[4]+ip[8] ip[0]+ip[12] aka b1 a1
37    psubw   xmm3, xmm2          ;ip[4]-ip[8] ip[0]-ip[12] aka c1 d1
38
39    movdqa    xmm4, xmm0
40    punpcklqdq  xmm0, xmm3          ;d1 a1
41    punpckhqdq  xmm4, xmm3          ;c1 b1
42    movd    xmm7, eax
43
44    movdqa    xmm1, xmm4          ;c1 b1
45    paddw   xmm4, xmm0          ;dl+cl a1+b1 aka op[4] op[0]
46    psubw   xmm0, xmm1          ;d1-c1 a1-b1 aka op[12] op[8]
47
48;;;temp output
49;;  movdqu  [rdi + 0], xmm4
50;;  movdqu  [rdi + 16], xmm3
51
52;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
53    ; 13 12 11 10 03 02 01 00
54    ;
55    ; 33 32 31 30 23 22 21 20
56    ;
57    movdqa    xmm3, xmm4          ; 13 12 11 10 03 02 01 00
58    punpcklwd xmm4, xmm0          ; 23 03 22 02 21 01 20 00
59    punpckhwd xmm3, xmm0          ; 33 13 32 12 31 11 30 10
60    movdqa    xmm1, xmm4          ; 23 03 22 02 21 01 20 00
61    punpcklwd xmm4, xmm3          ; 31 21 11 01 30 20 10 00
62    punpckhwd xmm1, xmm3          ; 33 23 13 03 32 22 12 02
63    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
64    pshufd    xmm2, xmm1, 4eh       ;ip[8] ip[12]
65    movdqa    xmm3, xmm4          ;ip[4] ip[0]
66
67    pshufd    xmm7, xmm7, 0       ;03 03 03 03 03 03 03 03
68
69    paddw   xmm4, xmm2          ;ip[4]+ip[8] ip[0]+ip[12] aka b1 a1
70    psubw   xmm3, xmm2          ;ip[4]-ip[8] ip[0]-ip[12] aka c1 d1
71
72    movdqa    xmm5, xmm4
73    punpcklqdq  xmm4, xmm3          ;d1 a1
74    punpckhqdq  xmm5, xmm3          ;c1 b1
75
76    movdqa    xmm1, xmm5          ;c1 b1
77    paddw   xmm5, xmm4          ;dl+cl a1+b1 aka op[4] op[0]
78    psubw   xmm4, xmm1          ;d1-c1 a1-b1 aka op[12] op[8]
79;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
80    ; 13 12 11 10 03 02 01 00
81    ;
82    ; 33 32 31 30 23 22 21 20
83    ;
84    movdqa    xmm0, xmm5          ; 13 12 11 10 03 02 01 00
85    punpcklwd xmm5, xmm4          ; 23 03 22 02 21 01 20 00
86    punpckhwd xmm0, xmm4          ; 33 13 32 12 31 11 30 10
87    movdqa    xmm1, xmm5          ; 23 03 22 02 21 01 20 00
88    punpcklwd xmm5, xmm0          ; 31 21 11 01 30 20 10 00
89    punpckhwd xmm1, xmm0          ; 33 23 13 03 32 22 12 02
90;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
91    paddw   xmm5, xmm7
92    paddw   xmm1, xmm7
93
94    psraw   xmm5, 3
95    psraw   xmm1, 3
96
97    movdqa  [rdi + 0], xmm5
98    movdqa  [rdi + 16], xmm1
99
100    ; begin epilog
101    pop rdi
102    pop rsi
103    UNSHADOW_ARGS
104    pop         rbp
105    ret
106
107SECTION_RODATA
108align 16
109x_s1sqr2:
110    times 4 dw 0x8A8C
111align 16
112x_c1sqr2less1:
113    times 4 dw 0x4E7B
114align 16
115fours:
116    times 4 dw 0x0004
117