ARMISelLowering.h revision 3d2125c9dbac695c93f42c0f59fd040e413fd711
1a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===// 2a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 3a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// The LLVM Compiler Infrastructure 4a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 8a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 9a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 10a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// This file defines the interfaces that ARM uses to lower LLVM code into a 11a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// selection DAG. 12a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 13a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 14a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 15a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#ifndef ARMISELLOWERING_H 16a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#define ARMISELLOWERING_H 17a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 18f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola#include "ARMSubtarget.h" 19a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/Target/TargetLowering.h" 203144687df78731ac4ddbc716a24b951678a73f57Evan Cheng#include "llvm/Target/TargetRegisterInfo.h" 21ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher#include "llvm/CodeGen/FastISel.h" 22a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/SelectionDAG.h" 231f595bb42950088ccb8246e6b065a96027b46ec6Bob Wilson#include "llvm/CodeGen/CallingConvLower.h" 24a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include <vector> 25a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 26a8e2989ece6dc46df59b0768184028257f913843Evan Chengnamespace llvm { 27a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMConstantPoolValue; 28a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 29a8e2989ece6dc46df59b0768184028257f913843Evan Cheng namespace ARMISD { 30a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // ARM Specific DAG Nodes 31a8e2989ece6dc46df59b0768184028257f913843Evan Cheng enum NodeType { 326aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach // Start the numbering where the builtin ops and target ops leave off. 330ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bddDan Gohman FIRST_NUMBER = ISD::BUILTIN_OP_END, 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 35a8e2989ece6dc46df59b0768184028257f913843Evan Cheng Wrapper, // Wrapper - A wrapper node for TargetConstantPool, 36a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // TargetExternalSymbol, and TargetGlobalAddress. 37a8e2989ece6dc46df59b0768184028257f913843Evan Cheng WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable 386aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 39a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL, // Function call. 40277f0741c5ea123b30360c382a153df238c31caeEvan Cheng CALL_PRED, // Function call that's predicable. 41a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL_NOLINK, // Function call with branch not branch-and-link. 42a8e2989ece6dc46df59b0768184028257f913843Evan Cheng tCALL, // Thumb function call. 43a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BRCOND, // Conditional branch. 44a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BR_JT, // Jumptable branch. 455657c01949dca6c012ac60d242d1a8d2ffdf5603Evan Cheng BR2_JT, // Jumptable branch (2 level - jumptable entry is a jump). 46a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RET_FLAG, // Return with a flag operand. 47a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 48a8e2989ece6dc46df59b0768184028257f913843Evan Cheng PIC_ADD, // Add with a PC operand and a PIC label. 49a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 50a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMP, // ARM compare instructions. 51c0309b48b560f119982c02a81416c8c1fd208648David Goodwin CMPZ, // ARM compare that sets only Z flag. 52a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFP, // ARM VFP compare instruction, sets FPSCR. 53a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR. 54a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FMSTAT, // ARM fmstat instruction. 55a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMOV, // ARM conditional move instructions. 56a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CNEG, // ARM conditional negate instructions. 576aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 58218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng BCC_i64, 59218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng 603482c8003ad0c88469b7333aaf658036e3fd0468Jim Grosbach RBIT, // ARM bitreverse instruction 613482c8003ad0c88469b7333aaf658036e3fd0468Jim Grosbach 6276a312b7d1c2b41394696510506967cd0794b831Bob Wilson FTOSI, // FP to sint within a FP register. 6376a312b7d1c2b41394696510506967cd0794b831Bob Wilson FTOUI, // FP to uint within a FP register. 6476a312b7d1c2b41394696510506967cd0794b831Bob Wilson SITOF, // sint to FP within a FP register. 6576a312b7d1c2b41394696510506967cd0794b831Bob Wilson UITOF, // uint to FP within a FP register. 6676a312b7d1c2b41394696510506967cd0794b831Bob Wilson 67a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRL_FLAG, // V,Flag = srl_flag X -> srl X, 1 + save carry out. 68a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRA_FLAG, // V,Flag = sra_flag X -> sra X, 1 + save carry out. 69a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. 706aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 71e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach VMOVRRD, // double to two gprs. 72e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach VMOVDRR, // Two gprs to double. 7364f4fa5e0eb505eec3a72041bec6b3a7f7739dedLauro Ramos Venancio 74e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_SETJMP, // SjLj exception handling setjmp. 75e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_LONGJMP, // SjLj exception handling longjmp. 76e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_DISPATCHSETUP, // SjLj exception handling dispatch setup. 770e0da734bbdfa1d3f55cd04db31d83b97e4556f7Jim Grosbach 7851e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen TC_RETURN, // Tail call return pseudo. 7951e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen 805bafff36c798608a189c517d37527e4a38863071Bob Wilson THREAD_POINTER, 815bafff36c798608a189c517d37527e4a38863071Bob Wilson 82861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng DYN_ALLOC, // Dynamic allocation on the stack. 83861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng 84f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson MEMBARRIER, // Memory barrier (DMB) 85f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson MEMBARRIER_MCR, // Memory barrier (MCR) 86dfed19fe2c34c1209108afa58e8ab014ffd894e2Evan Cheng 87dfed19fe2c34c1209108afa58e8ab014ffd894e2Evan Cheng PRELOAD, // Preload 88d1fb583128c6682bb8a7c74eafa810a9270cc8dfNate Begeman 895bafff36c798608a189c517d37527e4a38863071Bob Wilson VCEQ, // Vector compare equal. 90c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCEQZ, // Vector compare equal to zero. 915bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGE, // Vector compare greater than or equal. 92c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCGEZ, // Vector compare greater than or equal to zero. 93c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCLEZ, // Vector compare less than or equal to zero. 945bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGEU, // Vector compare unsigned greater than or equal. 955bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGT, // Vector compare greater than. 96c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCGTZ, // Vector compare greater than zero. 97c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCLTZ, // Vector compare less than zero. 985bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGTU, // Vector compare unsigned greater than. 995bafff36c798608a189c517d37527e4a38863071Bob Wilson VTST, // Vector test bits. 1005bafff36c798608a189c517d37527e4a38863071Bob Wilson 1015bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift by immediate: 1025bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHL, // ...left 1035bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRs, // ...right (signed) 1045bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRu, // ...right (unsigned) 1055bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLs, // ...left long (signed) 1065bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLu, // ...left long (unsigned) 1075bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLi, // ...left long (with maximum shift count) 1085bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRN, // ...right narrow 1095bafff36c798608a189c517d37527e4a38863071Bob Wilson 1105bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector rounding shift by immediate: 1115bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRs, // ...right (signed) 1125bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRu, // ...right (unsigned) 1135bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRN, // ...right narrow 1145bafff36c798608a189c517d37527e4a38863071Bob Wilson 1155bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating shift by immediate: 1165bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLs, // ...left (signed) 1175bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLu, // ...left (unsigned) 1185bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLsu, // ...left (signed to unsigned) 1195bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNs, // ...right narrow (signed) 1205bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNu, // ...right narrow (unsigned) 1215bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNsu, // ...right narrow (signed to unsigned) 1225bafff36c798608a189c517d37527e4a38863071Bob Wilson 1235bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating rounding shift by immediate: 1245bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNs, // ...right narrow (signed) 1255bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNu, // ...right narrow (unsigned) 1265bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNsu, // ...right narrow (signed to unsigned) 1275bafff36c798608a189c517d37527e4a38863071Bob Wilson 1285bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift and insert: 1295bafff36c798608a189c517d37527e4a38863071Bob Wilson VSLI, // ...left 1305bafff36c798608a189c517d37527e4a38863071Bob Wilson VSRI, // ...right 1315bafff36c798608a189c517d37527e4a38863071Bob Wilson 1325bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector get lane (VMOV scalar to ARM core register) 1335bafff36c798608a189c517d37527e4a38863071Bob Wilson // (These are used for 8- and 16-bit element types only.) 1345bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEu, // zero-extend vector extract element 1355bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEs, // sign-extend vector extract element 1365bafff36c798608a189c517d37527e4a38863071Bob Wilson 1377e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson // Vector move immediate and move negated immediate: 138cba270d042862bca213b812656a2181b0de0578eBob Wilson VMOVIMM, 1397e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson VMVNIMM, 1407e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson 1417e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson // Vector duplicate: 142c1d287b4b73487b6ab094a253a7357addc1d8b84Bob Wilson VDUP, 1430ce371082565330672c276f76297f46b362d74b7Bob Wilson VDUPLANE, 144a599bff101095e528198ae85739fe8b97ffba82bBob Wilson 145d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson // Vector shuffles: 146de95c1b88be44d4af916af8fba9d7940b7e98e32Bob Wilson VEXT, // extract 147d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV64, // reverse elements within 64-bit doublewords 148d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV32, // reverse elements within 32-bit words 1491c8e581832440a114c9587d41473d107de4cac74Anton Korobeynikov VREV16, // reverse elements within 16-bit halfwords 150c692cb77aaa8b16bcc7fe0c70d47adce94c43911Bob Wilson VZIP, // zip (interleave) 151c692cb77aaa8b16bcc7fe0c70d47adce94c43911Bob Wilson VUZP, // unzip (deinterleave) 1529f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson VTRN, // transpose 1539f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson 154d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson // Vector multiply long: 155d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson VMULLs, // ...signed 156d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson VMULLu, // ...unsigned 157d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson 15840cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // Operands of the standard BUILD_VECTOR node are not legalized, which 15940cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // is fine if BUILD_VECTORs are always lowered to shuffles or other 16040cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // operations, but for ARM some BUILD_VECTORs are legal as-is and their 16140cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // operands need to be legalized. Define an ARM-specific version of 16240cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // BUILD_VECTOR for this purpose. 16340cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson BUILD_VECTOR, 16440cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson 1659f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson // Floating-point max and min: 1669f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson FMAX, 167469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach FMIN, 168469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach 169469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach // Bit-field insert 170d966817f3cb87897cbec29c967b974924fe939baOwen Anderson BFI, 171d966817f3cb87897cbec29c967b974924fe939baOwen Anderson 172d966817f3cb87897cbec29c967b974924fe939baOwen Anderson // Vector OR with immediate 173080c09229739ec2b13f7bccc361994a8d26b4ed2Owen Anderson VORRIMM, 174080c09229739ec2b13f7bccc361994a8d26b4ed2Owen Anderson // Vector AND with NOT of immediate 175b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VBICIMM, 176b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson 177b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson // Vector load N-element structure to all lanes: 178b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE, 179b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD3DUP, 180b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD4DUP 181a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 182a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 183a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 1845bafff36c798608a189c517d37527e4a38863071Bob Wilson /// Define some predicates that are used for node matching. 1855bafff36c798608a189c517d37527e4a38863071Bob Wilson namespace ARM { 18639382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// getVFPf32Imm / getVFPf64Imm - If the given fp immediate can be 18739382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// materialized with a VMOV.f32 / VMOV.f64 (i.e. fconsts / fconstd) 18839382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// instruction, returns its 8-bit integer representation. Otherwise, 18939382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// returns -1. 19039382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng int getVFPf32Imm(const APFloat &FPImm); 19139382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng int getVFPf64Imm(const APFloat &FPImm); 192469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach bool isBitFieldInvertedMask(unsigned v); 1935bafff36c798608a189c517d37527e4a38863071Bob Wilson } 1945bafff36c798608a189c517d37527e4a38863071Bob Wilson 195261f2a2337990bc7cc3d9e20d3338de54b26c74cBob Wilson //===--------------------------------------------------------------------===// 19680dae195c75a3ef38854645ae3cf41f8ae835644Dale Johannesen // ARMTargetLowering - ARM Implementation of the TargetLowering interface 1976aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 198a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMTargetLowering : public TargetLowering { 199a8e2989ece6dc46df59b0768184028257f913843Evan Cheng public: 20061e729e2e9517ab2d8887bab86fb377900fa1081Dan Gohman explicit ARMTargetLowering(TargetMachine &TM); 201a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 202e1102caf86c8e09387ac7ee83aae4e69d2d35fc4Jim Grosbach virtual unsigned getJumpTableEncoding(void) const; 203e1102caf86c8e09387ac7ee83aae4e69d2d35fc4Jim Grosbach 204d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 2051607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 2061607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// ReplaceNodeResults - Replace the results of node with an illegal result 2071607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// type with new values built out of custom code. 2081607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// 2091607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 210d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 2111607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 212475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 2136aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 214a8e2989ece6dc46df59b0768184028257f913843Evan Cheng virtual const char *getTargetNodeName(unsigned Opcode) const; 215a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 216af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman virtual MachineBasicBlock * 217af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman EmitInstrWithCustomInserter(MachineInstr *MI, 218af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman MachineBasicBlock *MBB) const; 219a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 220af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// allowsUnalignedMemoryAccesses - Returns true if the target allows 221af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// unaligned memory accesses. of the specified type. 222af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// FIXME: Add getOptimalMemOpType to implement memcpy with NEON? 223af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling virtual bool allowsUnalignedMemoryAccesses(EVT VT) const; 224af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 225c9addb74883fef318140272768422656a694341fChris Lattner /// isLegalAddressingMode - Return true if the addressing mode represented 226c9addb74883fef318140272768422656a694341fChris Lattner /// by AM is legal for this target, for a load/store of the specified type. 227c9addb74883fef318140272768422656a694341fChris Lattner virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const; 228e6c835f42418c0fae6b63908d3c576a26d64cab2Evan Cheng bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const; 2296aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 23077e4751011da2d6afa930ab91f7baee39e7c7e89Evan Cheng /// isLegalICmpImmediate - Return true if the specified immediate is legal 23118f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// icmp immediate, that is the target has icmp instructions which can 23218f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// compare a register against the immediate without having to materialize 23318f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// the immediate into a register. 23406b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng virtual bool isLegalICmpImmediate(int64_t Imm) const; 23577e4751011da2d6afa930ab91f7baee39e7c7e89Evan Cheng 236a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPreIndexedAddressParts - returns true by value, base pointer and 237a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if the node's address 238a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// can be legally represented as pre-indexed load / store address. 239475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 240475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue &Offset, 241a8e2989ece6dc46df59b0768184028257f913843Evan Cheng ISD::MemIndexedMode &AM, 24273e0914848662404cf2aa18eb049ff5aae543388Dan Gohman SelectionDAG &DAG) const; 243a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 244a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPostIndexedAddressParts - returns true by value, base pointer and 245a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if this node can be 246a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// combined with a load / store to form a post-indexed load / store. 247a8e2989ece6dc46df59b0768184028257f913843Evan Cheng virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, 248475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue &Base, SDValue &Offset, 249a8e2989ece6dc46df59b0768184028257f913843Evan Cheng ISD::MemIndexedMode &AM, 25073e0914848662404cf2aa18eb049ff5aae543388Dan Gohman SelectionDAG &DAG) const; 251a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 252475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual void computeMaskedBitsForTargetNode(const SDValue Op, 253977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3Dan Gohman const APInt &Mask, 2546aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach APInt &KnownZero, 255fd29e0eb060ea8b4d490860329234d2ae5f5952eDan Gohman APInt &KnownOne, 256ea859be53ca13a1547c4675549946b74dc3c6f41Dan Gohman const SelectionDAG &DAG, 257a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned Depth) const; 258af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 259af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 2604234f57fa02b1f04a9f52a7b3c2aa22d32ac521cChris Lattner ConstraintType getConstraintType(const std::string &Constraint) const; 26144ab89eb376af838d1123293a79975aede501464John Thompson 26244ab89eb376af838d1123293a79975aede501464John Thompson /// Examine constraint string and operand type and determine a weight value. 26344ab89eb376af838d1123293a79975aede501464John Thompson /// The operand object must already have been set up with the operand type. 26444ab89eb376af838d1123293a79975aede501464John Thompson ConstraintWeight getSingleConstraintMatchWeight( 26544ab89eb376af838d1123293a79975aede501464John Thompson AsmOperandInfo &info, const char *constraint) const; 26644ab89eb376af838d1123293a79975aede501464John Thompson 2676aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach std::pair<unsigned, const TargetRegisterClass*> 268a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegForInlineAsmConstraint(const std::string &Constraint, 269e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT) const; 270a8e2989ece6dc46df59b0768184028257f913843Evan Cheng std::vector<unsigned> 271a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegClassForInlineAsmConstraint(const std::string &Constraint, 272e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT) const; 273f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 274bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 275bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// vector. If it is invalid, don't add anything to Ops. If hasMemory is 276bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// true it means one of the asm constraint of the inline asm instruction 277bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// being processed is 'm'. 278bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson virtual void LowerAsmOperandForConstraint(SDValue Op, 279bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson char ConstraintLetter, 280bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson std::vector<SDValue> &Ops, 281bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson SelectionDAG &DAG) const; 2826aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 283419e4f92635cfaa409282691437aff99062e4e0bDan Gohman const ARMSubtarget* getSubtarget() const { 284707e0184233f27e0e9f9aee0309f2daab8cfe7f8Dan Gohman return Subtarget; 285f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola } 286f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 28706b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng /// getRegClassFor - Return the register class that should be used for the 28806b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng /// specified value type. 28906b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng virtual TargetRegisterClass *getRegClassFor(EVT VT) const; 29006b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng 291b4202b84d7e54efe5e144885c7da63e6cc465f80Bill Wendling /// getFunctionAlignment - Return the Log2 alignment of this function. 29220c568f366be211323eeaf0e45ef053278ec9ddcBill Wendling virtual unsigned getFunctionAlignment(const Function *F) const; 29320c568f366be211323eeaf0e45ef053278ec9ddcBill Wendling 294cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov /// getMaximalGlobalOffset - Returns the maximal possible offset which can 295cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov /// be used for loads / stores from the global. 296cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov virtual unsigned getMaximalGlobalOffset() const; 297cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov 298ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher /// createFastISel - This method returns a target specific FastISel object, 299ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher /// or null if the target does not support "fast" ISel. 300ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher virtual FastISel *createFastISel(FunctionLoweringInfo &funcInfo) const; 301ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher 3021cc3984148be113c6e5e470f23c9ddbd37679c5fEvan Cheng Sched::Preference getSchedulingPreference(SDNode *N) const; 3031cc3984148be113c6e5e470f23c9ddbd37679c5fEvan Cheng 3043144687df78731ac4ddbc716a24b951678a73f57Evan Cheng unsigned getRegPressureLimit(const TargetRegisterClass *RC, 3053144687df78731ac4ddbc716a24b951678a73f57Evan Cheng MachineFunction &MF) const; 3063144687df78731ac4ddbc716a24b951678a73f57Evan Cheng 307d0ac234b1b3a88946ad8bb52677764f3e3eeb8b3Anton Korobeynikov bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const; 30848e19352840a5f7012493ead894e81a2dbec1778Anton Korobeynikov bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; 30939382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng 31039382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// isFPImmLegal - Returns true if the target can instruction select the 31139382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// specified FP immediate natively. If false, the legalizer will 31239382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// materialize the FP immediate as a load from a constant pool. 31339382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 31439382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng 31565ffec49f73d1f8856211b107712c58cc9636b78Bob Wilson virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info, 31665ffec49f73d1f8856211b107712c58cc9636b78Bob Wilson const CallInst &I, 31765ffec49f73d1f8856211b107712c58cc9636b78Bob Wilson unsigned Intrinsic) const; 318d70f57b254114841892425a40944268d38ae0bcdEvan Cheng protected: 3194f6b4674be5473319ac5e70c76fd5cb964da2128Evan Cheng std::pair<const TargetRegisterClass*, uint8_t> 3204f6b4674be5473319ac5e70c76fd5cb964da2128Evan Cheng findRepresentativeClass(EVT VT) const; 321d70f57b254114841892425a40944268d38ae0bcdEvan Cheng 322a8e2989ece6dc46df59b0768184028257f913843Evan Cheng private: 323a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can 324a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// make the right decision when generating code for different targets. 325a8e2989ece6dc46df59b0768184028257f913843Evan Cheng const ARMSubtarget *Subtarget; 326a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 3273144687df78731ac4ddbc716a24b951678a73f57Evan Cheng const TargetRegisterInfo *RegInfo; 3283144687df78731ac4ddbc716a24b951678a73f57Evan Cheng 3293ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1Evan Cheng const InstrItineraryData *Itins; 3303ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1Evan Cheng 331d2559bf3f30cc7400483825414489ec0fb36481aBob Wilson /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created. 332a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// 333a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned ARMPCLabelIndex; 334a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 335e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addTypeForNEON(EVT VT, EVT PromotedLdStVT, EVT PromotedBitwiseVT); 336e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addDRTypeForNEON(EVT VT); 337e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addQRTypeForNEON(EVT VT); 3385bafff36c798608a189c517d37527e4a38863071Bob Wilson 3395bafff36c798608a189c517d37527e4a38863071Bob Wilson typedef SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPassVector; 34098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman void PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, 3415bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue Chain, SDValue &Arg, 3425bafff36c798608a189c517d37527e4a38863071Bob Wilson RegsToPassVector &RegsToPass, 3435bafff36c798608a189c517d37527e4a38863071Bob Wilson CCValAssign &VA, CCValAssign &NextVA, 3445bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue &StackPtr, 3455bafff36c798608a189c517d37527e4a38863071Bob Wilson SmallVector<SDValue, 8> &MemOpChains, 346d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman ISD::ArgFlagsTy Flags) const; 3475bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, 348d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue &Root, SelectionDAG &DAG, 349d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman DebugLoc dl) const; 3505bafff36c798608a189c517d37527e4a38863071Bob Wilson 35118f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, 35218f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach bool isVarArg) const; 35398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, 35498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 35598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const CCValAssign &VA, 356d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman ISD::ArgFlagsTy Flags) const; 35723ff7cff52702a8bff904d8ab4c9ca67cc19d6caJim Grosbach SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const; 3585eb195153950bc7ebfc30649494a78b2096b5ef8Jim Grosbach SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const; 359e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach SDValue LowerEH_SJLJ_DISPATCHSETUP(SDValue Op, SelectionDAG &DAG) const; 360a87ded2695e5bce30dbd0d2d2ac10c571bf1d161Jim Grosbach SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, 361d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman const ARMSubtarget *Subtarget) const; 362d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 363d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const; 364d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const; 365d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 366475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, 367d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 368475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA, 369d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 370d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG) const; 371d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 372de2b151dbf125af49717807b9cfc1f6f7a5b9ea6Bill Wendling SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 373d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 374d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 375515fe3a58877c745a922252a4492e866a2f1e42eEvan Cheng SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const; 3762457f2c66184e978d4ed8fa9e2128effff26cb0bEvan Cheng SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; 377d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 378d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const; 379d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const; 380d1fb583128c6682bb8a7c74eafa810a9270cc8dfNate Begeman SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const; 381475871a144eb604ddaf37503397ba0941442e5fbDan Gohman 38298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 38365c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 38498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 38598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 386d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SmallVectorImpl<SDValue> &InVals) const; 38798ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 38898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 38998ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerFormalArguments(SDValue Chain, 39065c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 39198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 39298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 393d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SmallVectorImpl<SDValue> &InVals) const; 39498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 39598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 396022d9e1cef7586a80a96446ae8691a37def9bbf4Evan Cheng LowerCall(SDValue Chain, SDValue Callee, 39765c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 3980c439eb2c8397996cbccaf2798e598052d9982c8Evan Cheng bool &isTailCall, 39998ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 400c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 40198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 40298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 403d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SmallVectorImpl<SDValue> &InVals) const; 40498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 40551e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// IsEligibleForTailCallOptimization - Check whether the call is eligible 40651e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// for tail call optimization. Targets which want to do tail call 40751e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// optimization should implement this function. 40851e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool IsEligibleForTailCallOptimization(SDValue Callee, 40951e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen CallingConv::ID CalleeCC, 41051e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isVarArg, 41151e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isCalleeStructRet, 41251e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isCallerStructRet, 41351e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen const SmallVectorImpl<ISD::OutputArg> &Outs, 414c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 41551e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen const SmallVectorImpl<ISD::InputArg> &Ins, 41651e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen SelectionDAG& DAG) const; 41798ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 41898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerReturn(SDValue Chain, 41965c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 42098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 421c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 422d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman DebugLoc dl, SelectionDAG &DAG) const; 42306b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng 4243d2125c9dbac695c93f42c0f59fd040e413fd711Evan Cheng virtual bool isUsedByReturnOnly(SDNode *N) const; 4253d2125c9dbac695c93f42c0f59fd040e413fd711Evan Cheng 42606b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, 427218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue &ARMcc, SelectionDAG &DAG, DebugLoc dl) const; 428218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue getVFPCmp(SDValue LHS, SDValue RHS, 429218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SelectionDAG &DAG, DebugLoc dl) const; 430218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng 431218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const; 4325278eb802fae2ee1a7b2a428596bc364d8bcd9dbJim Grosbach 433e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *EmitAtomicCmpSwap(MachineInstr *MI, 434e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *BB, 435e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach unsigned Size) const; 436e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *EmitAtomicBinary(MachineInstr *MI, 437e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *BB, 438e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach unsigned Size, 439e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach unsigned BinOpcode) const; 4405278eb802fae2ee1a7b2a428596bc364d8bcd9dbJim Grosbach 441a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 442ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher 44336fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson enum NEONModImmType { 44436fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson VMOVModImm, 44536fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson VMVNModImm, 44636fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson OtherModImm 44736fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson }; 44836fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson 44936fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson 450ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher namespace ARM { 451ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher FastISel *createFastISel(FunctionLoweringInfo &funcInfo); 452ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher } 453a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 454a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 455a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#endif // ARMISELLOWERING_H 456