ARMISelLowering.h revision c73158730d43e7c8bdef32b2107566a6e78a8538
1a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===// 2a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 3a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// The LLVM Compiler Infrastructure 4a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 8a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 9a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 10a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// This file defines the interfaces that ARM uses to lower LLVM code into a 11a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// selection DAG. 12a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 13a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 14a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 15a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#ifndef ARMISELLOWERING_H 16a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#define ARMISELLOWERING_H 17a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 18f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola#include "ARMSubtarget.h" 19a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/Target/TargetLowering.h" 203144687df78731ac4ddbc716a24b951678a73f57Evan Cheng#include "llvm/Target/TargetRegisterInfo.h" 21ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher#include "llvm/CodeGen/FastISel.h" 22a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/SelectionDAG.h" 231f595bb42950088ccb8246e6b065a96027b46ec6Bob Wilson#include "llvm/CodeGen/CallingConvLower.h" 24a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include <vector> 25a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 26a8e2989ece6dc46df59b0768184028257f913843Evan Chengnamespace llvm { 27a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMConstantPoolValue; 28a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 29a8e2989ece6dc46df59b0768184028257f913843Evan Cheng namespace ARMISD { 30a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // ARM Specific DAG Nodes 31a8e2989ece6dc46df59b0768184028257f913843Evan Cheng enum NodeType { 326aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach // Start the numbering where the builtin ops and target ops leave off. 330ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bddDan Gohman FIRST_NUMBER = ISD::BUILTIN_OP_END, 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 35a8e2989ece6dc46df59b0768184028257f913843Evan Cheng Wrapper, // Wrapper - A wrapper node for TargetConstantPool, 36a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // TargetExternalSymbol, and TargetGlobalAddress. 3753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng WrapperDYN, // WrapperDYN - A wrapper node for TargetGlobalAddress in 3853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng // DYN mode. 395de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng WrapperPIC, // WrapperPIC - A wrapper node for TargetGlobalAddress in 405de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // PIC mode. 41a8e2989ece6dc46df59b0768184028257f913843Evan Cheng WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable 426aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 43a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL, // Function call. 44277f0741c5ea123b30360c382a153df238c31caeEvan Cheng CALL_PRED, // Function call that's predicable. 45a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL_NOLINK, // Function call with branch not branch-and-link. 46a8e2989ece6dc46df59b0768184028257f913843Evan Cheng tCALL, // Thumb function call. 47a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BRCOND, // Conditional branch. 48a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BR_JT, // Jumptable branch. 495657c01949dca6c012ac60d242d1a8d2ffdf5603Evan Cheng BR2_JT, // Jumptable branch (2 level - jumptable entry is a jump). 50a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RET_FLAG, // Return with a flag operand. 51a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 52a8e2989ece6dc46df59b0768184028257f913843Evan Cheng PIC_ADD, // Add with a PC operand and a PIC label. 53a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 54a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMP, // ARM compare instructions. 55c0309b48b560f119982c02a81416c8c1fd208648David Goodwin CMPZ, // ARM compare that sets only Z flag. 56a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFP, // ARM VFP compare instruction, sets FPSCR. 57a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR. 58a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FMSTAT, // ARM fmstat instruction. 59a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMOV, // ARM conditional move instructions. 606aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 61218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng BCC_i64, 62218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng 633482c8003ad0c88469b7333aaf658036e3fd0468Jim Grosbach RBIT, // ARM bitreverse instruction 643482c8003ad0c88469b7333aaf658036e3fd0468Jim Grosbach 6576a312b7d1c2b41394696510506967cd0794b831Bob Wilson FTOSI, // FP to sint within a FP register. 6676a312b7d1c2b41394696510506967cd0794b831Bob Wilson FTOUI, // FP to uint within a FP register. 6776a312b7d1c2b41394696510506967cd0794b831Bob Wilson SITOF, // sint to FP within a FP register. 6876a312b7d1c2b41394696510506967cd0794b831Bob Wilson UITOF, // uint to FP within a FP register. 6976a312b7d1c2b41394696510506967cd0794b831Bob Wilson 70a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRL_FLAG, // V,Flag = srl_flag X -> srl X, 1 + save carry out. 71a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRA_FLAG, // V,Flag = sra_flag X -> sra X, 1 + save carry out. 72a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. 736aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 74e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach VMOVRRD, // double to two gprs. 75e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach VMOVDRR, // Two gprs to double. 7664f4fa5e0eb505eec3a72041bec6b3a7f7739dedLauro Ramos Venancio 77e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_SETJMP, // SjLj exception handling setjmp. 78e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_LONGJMP, // SjLj exception handling longjmp. 79e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_DISPATCHSETUP, // SjLj exception handling dispatch setup. 800e0da734bbdfa1d3f55cd04db31d83b97e4556f7Jim Grosbach 8151e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen TC_RETURN, // Tail call return pseudo. 8251e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen 835bafff36c798608a189c517d37527e4a38863071Bob Wilson THREAD_POINTER, 845bafff36c798608a189c517d37527e4a38863071Bob Wilson 85861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng DYN_ALLOC, // Dynamic allocation on the stack. 86861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng 87f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson MEMBARRIER, // Memory barrier (DMB) 88f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson MEMBARRIER_MCR, // Memory barrier (MCR) 89dfed19fe2c34c1209108afa58e8ab014ffd894e2Evan Cheng 90dfed19fe2c34c1209108afa58e8ab014ffd894e2Evan Cheng PRELOAD, // Preload 91d1fb583128c6682bb8a7c74eafa810a9270cc8dfNate Begeman 925bafff36c798608a189c517d37527e4a38863071Bob Wilson VCEQ, // Vector compare equal. 93c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCEQZ, // Vector compare equal to zero. 945bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGE, // Vector compare greater than or equal. 95c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCGEZ, // Vector compare greater than or equal to zero. 96c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCLEZ, // Vector compare less than or equal to zero. 975bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGEU, // Vector compare unsigned greater than or equal. 985bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGT, // Vector compare greater than. 99c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCGTZ, // Vector compare greater than zero. 100c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCLTZ, // Vector compare less than zero. 1015bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGTU, // Vector compare unsigned greater than. 1025bafff36c798608a189c517d37527e4a38863071Bob Wilson VTST, // Vector test bits. 1035bafff36c798608a189c517d37527e4a38863071Bob Wilson 1045bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift by immediate: 1055bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHL, // ...left 1065bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRs, // ...right (signed) 1075bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRu, // ...right (unsigned) 1085bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLs, // ...left long (signed) 1095bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLu, // ...left long (unsigned) 1105bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLi, // ...left long (with maximum shift count) 1115bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRN, // ...right narrow 1125bafff36c798608a189c517d37527e4a38863071Bob Wilson 1135bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector rounding shift by immediate: 1145bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRs, // ...right (signed) 1155bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRu, // ...right (unsigned) 1165bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRN, // ...right narrow 1175bafff36c798608a189c517d37527e4a38863071Bob Wilson 1185bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating shift by immediate: 1195bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLs, // ...left (signed) 1205bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLu, // ...left (unsigned) 1215bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLsu, // ...left (signed to unsigned) 1225bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNs, // ...right narrow (signed) 1235bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNu, // ...right narrow (unsigned) 1245bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNsu, // ...right narrow (signed to unsigned) 1255bafff36c798608a189c517d37527e4a38863071Bob Wilson 1265bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating rounding shift by immediate: 1275bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNs, // ...right narrow (signed) 1285bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNu, // ...right narrow (unsigned) 1295bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNsu, // ...right narrow (signed to unsigned) 1305bafff36c798608a189c517d37527e4a38863071Bob Wilson 1315bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift and insert: 1325bafff36c798608a189c517d37527e4a38863071Bob Wilson VSLI, // ...left 1335bafff36c798608a189c517d37527e4a38863071Bob Wilson VSRI, // ...right 1345bafff36c798608a189c517d37527e4a38863071Bob Wilson 1355bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector get lane (VMOV scalar to ARM core register) 1365bafff36c798608a189c517d37527e4a38863071Bob Wilson // (These are used for 8- and 16-bit element types only.) 1375bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEu, // zero-extend vector extract element 1385bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEs, // sign-extend vector extract element 1395bafff36c798608a189c517d37527e4a38863071Bob Wilson 1407e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson // Vector move immediate and move negated immediate: 141cba270d042862bca213b812656a2181b0de0578eBob Wilson VMOVIMM, 1427e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson VMVNIMM, 1437e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson 1447e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson // Vector duplicate: 145c1d287b4b73487b6ab094a253a7357addc1d8b84Bob Wilson VDUP, 1460ce371082565330672c276f76297f46b362d74b7Bob Wilson VDUPLANE, 147a599bff101095e528198ae85739fe8b97ffba82bBob Wilson 148d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson // Vector shuffles: 149de95c1b88be44d4af916af8fba9d7940b7e98e32Bob Wilson VEXT, // extract 150d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV64, // reverse elements within 64-bit doublewords 151d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV32, // reverse elements within 32-bit words 1521c8e581832440a114c9587d41473d107de4cac74Anton Korobeynikov VREV16, // reverse elements within 16-bit halfwords 153c692cb77aaa8b16bcc7fe0c70d47adce94c43911Bob Wilson VZIP, // zip (interleave) 154c692cb77aaa8b16bcc7fe0c70d47adce94c43911Bob Wilson VUZP, // unzip (deinterleave) 1559f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson VTRN, // transpose 15669a05a7b9205fd4628ed614d1845f3879f6be949Bill Wendling VTBL1, // 1-register shuffle with mask 15769a05a7b9205fd4628ed614d1845f3879f6be949Bill Wendling VTBL2, // 2-register shuffle with mask 1589f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson 159d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson // Vector multiply long: 160d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson VMULLs, // ...signed 161d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson VMULLu, // ...unsigned 162d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson 16340cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // Operands of the standard BUILD_VECTOR node are not legalized, which 16440cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // is fine if BUILD_VECTORs are always lowered to shuffles or other 16540cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // operations, but for ARM some BUILD_VECTORs are legal as-is and their 16640cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // operands need to be legalized. Define an ARM-specific version of 16740cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // BUILD_VECTOR for this purpose. 16840cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson BUILD_VECTOR, 16940cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson 1709f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson // Floating-point max and min: 1719f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson FMAX, 172469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach FMIN, 173469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach 174469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach // Bit-field insert 175d966817f3cb87897cbec29c967b974924fe939baOwen Anderson BFI, 176d966817f3cb87897cbec29c967b974924fe939baOwen Anderson 177d966817f3cb87897cbec29c967b974924fe939baOwen Anderson // Vector OR with immediate 178080c09229739ec2b13f7bccc361994a8d26b4ed2Owen Anderson VORRIMM, 179080c09229739ec2b13f7bccc361994a8d26b4ed2Owen Anderson // Vector AND with NOT of immediate 180b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VBICIMM, 181b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson 182c0e6d780cd7a0935f545a0ec0a9ad4a6ae8db2a9Cameron Zwarich // Vector bitwise select 183c0e6d780cd7a0935f545a0ec0a9ad4a6ae8db2a9Cameron Zwarich VBSL, 184c0e6d780cd7a0935f545a0ec0a9ad4a6ae8db2a9Cameron Zwarich 185b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson // Vector load N-element structure to all lanes: 186b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE, 187b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD3DUP, 1881c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4DUP, 1891c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson 1901c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson // NEON loads with post-increment base updates: 1911c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD1_UPD, 1921c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD2_UPD, 1931c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD3_UPD, 1941c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4_UPD, 1951c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD2LN_UPD, 1961c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD3LN_UPD, 1971c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4LN_UPD, 1981c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD2DUP_UPD, 1991c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD3DUP_UPD, 2001c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4DUP_UPD, 2011c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson 2021c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson // NEON stores with post-increment base updates: 2031c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST1_UPD, 2041c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST2_UPD, 2051c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST3_UPD, 2061c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST4_UPD, 2071c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST2LN_UPD, 2081c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST3LN_UPD, 2091c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST4LN_UPD 210a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 211a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 212a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 2135bafff36c798608a189c517d37527e4a38863071Bob Wilson /// Define some predicates that are used for node matching. 2145bafff36c798608a189c517d37527e4a38863071Bob Wilson namespace ARM { 21539382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// getVFPf32Imm / getVFPf64Imm - If the given fp immediate can be 21639382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// materialized with a VMOV.f32 / VMOV.f64 (i.e. fconsts / fconstd) 21739382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// instruction, returns its 8-bit integer representation. Otherwise, 21839382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// returns -1. 21939382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng int getVFPf32Imm(const APFloat &FPImm); 22039382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng int getVFPf64Imm(const APFloat &FPImm); 221469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach bool isBitFieldInvertedMask(unsigned v); 2225bafff36c798608a189c517d37527e4a38863071Bob Wilson } 2235bafff36c798608a189c517d37527e4a38863071Bob Wilson 224261f2a2337990bc7cc3d9e20d3338de54b26c74cBob Wilson //===--------------------------------------------------------------------===// 22580dae195c75a3ef38854645ae3cf41f8ae835644Dale Johannesen // ARMTargetLowering - ARM Implementation of the TargetLowering interface 2266aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 227a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMTargetLowering : public TargetLowering { 228a8e2989ece6dc46df59b0768184028257f913843Evan Cheng public: 22961e729e2e9517ab2d8887bab86fb377900fa1081Dan Gohman explicit ARMTargetLowering(TargetMachine &TM); 230a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 231e1102caf86c8e09387ac7ee83aae4e69d2d35fc4Jim Grosbach virtual unsigned getJumpTableEncoding(void) const; 232e1102caf86c8e09387ac7ee83aae4e69d2d35fc4Jim Grosbach 233d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 2341607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 2351607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// ReplaceNodeResults - Replace the results of node with an illegal result 2361607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// type with new values built out of custom code. 2371607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// 2381607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 239d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 2401607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 241a8e2989ece6dc46df59b0768184028257f913843Evan Cheng virtual const char *getTargetNodeName(unsigned Opcode) const; 242a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 243af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman virtual MachineBasicBlock * 244af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman EmitInstrWithCustomInserter(MachineInstr *MI, 245af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman MachineBasicBlock *MBB) const; 246a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 24731959b19a72608051888160514977875a8027dfcEvan Cheng virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 24831959b19a72608051888160514977875a8027dfcEvan Cheng 24931959b19a72608051888160514977875a8027dfcEvan Cheng bool isDesirableToTransformToIntegerOp(unsigned Opc, EVT VT) const; 25031959b19a72608051888160514977875a8027dfcEvan Cheng 251af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// allowsUnalignedMemoryAccesses - Returns true if the target allows 252af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// unaligned memory accesses. of the specified type. 253af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// FIXME: Add getOptimalMemOpType to implement memcpy with NEON? 254af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling virtual bool allowsUnalignedMemoryAccesses(EVT VT) const; 255af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 256c9addb74883fef318140272768422656a694341fChris Lattner /// isLegalAddressingMode - Return true if the addressing mode represented 257c9addb74883fef318140272768422656a694341fChris Lattner /// by AM is legal for this target, for a load/store of the specified type. 258c9addb74883fef318140272768422656a694341fChris Lattner virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const; 259e6c835f42418c0fae6b63908d3c576a26d64cab2Evan Cheng bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const; 2606aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 26177e4751011da2d6afa930ab91f7baee39e7c7e89Evan Cheng /// isLegalICmpImmediate - Return true if the specified immediate is legal 26218f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// icmp immediate, that is the target has icmp instructions which can 26318f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// compare a register against the immediate without having to materialize 26418f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// the immediate into a register. 26506b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng virtual bool isLegalICmpImmediate(int64_t Imm) const; 26677e4751011da2d6afa930ab91f7baee39e7c7e89Evan Cheng 267a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPreIndexedAddressParts - returns true by value, base pointer and 268a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if the node's address 269a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// can be legally represented as pre-indexed load / store address. 270475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 271475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue &Offset, 272a8e2989ece6dc46df59b0768184028257f913843Evan Cheng ISD::MemIndexedMode &AM, 27373e0914848662404cf2aa18eb049ff5aae543388Dan Gohman SelectionDAG &DAG) const; 274a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 275a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPostIndexedAddressParts - returns true by value, base pointer and 276a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if this node can be 277a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// combined with a load / store to form a post-indexed load / store. 278a8e2989ece6dc46df59b0768184028257f913843Evan Cheng virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, 279475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue &Base, SDValue &Offset, 280a8e2989ece6dc46df59b0768184028257f913843Evan Cheng ISD::MemIndexedMode &AM, 28173e0914848662404cf2aa18eb049ff5aae543388Dan Gohman SelectionDAG &DAG) const; 282a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 283475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual void computeMaskedBitsForTargetNode(const SDValue Op, 284977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3Dan Gohman const APInt &Mask, 2856aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach APInt &KnownZero, 286fd29e0eb060ea8b4d490860329234d2ae5f5952eDan Gohman APInt &KnownOne, 287ea859be53ca13a1547c4675549946b74dc3c6f41Dan Gohman const SelectionDAG &DAG, 288a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned Depth) const; 289af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 290af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 29155d42003368c57d3a41c5f464d39b8440050d558Evan Cheng virtual bool ExpandInlineAsm(CallInst *CI) const; 29255d42003368c57d3a41c5f464d39b8440050d558Evan Cheng 2934234f57fa02b1f04a9f52a7b3c2aa22d32ac521cChris Lattner ConstraintType getConstraintType(const std::string &Constraint) const; 29444ab89eb376af838d1123293a79975aede501464John Thompson 29544ab89eb376af838d1123293a79975aede501464John Thompson /// Examine constraint string and operand type and determine a weight value. 29644ab89eb376af838d1123293a79975aede501464John Thompson /// The operand object must already have been set up with the operand type. 29744ab89eb376af838d1123293a79975aede501464John Thompson ConstraintWeight getSingleConstraintMatchWeight( 29844ab89eb376af838d1123293a79975aede501464John Thompson AsmOperandInfo &info, const char *constraint) const; 29944ab89eb376af838d1123293a79975aede501464John Thompson 3006aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach std::pair<unsigned, const TargetRegisterClass*> 301a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegForInlineAsmConstraint(const std::string &Constraint, 302e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT) const; 303a8e2989ece6dc46df59b0768184028257f913843Evan Cheng std::vector<unsigned> 304a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegClassForInlineAsmConstraint(const std::string &Constraint, 305e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT) const; 306f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 307bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 308bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// vector. If it is invalid, don't add anything to Ops. If hasMemory is 309bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// true it means one of the asm constraint of the inline asm instruction 310bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// being processed is 'm'. 311bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson virtual void LowerAsmOperandForConstraint(SDValue Op, 312bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson char ConstraintLetter, 313bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson std::vector<SDValue> &Ops, 314bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson SelectionDAG &DAG) const; 3156aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 316419e4f92635cfaa409282691437aff99062e4e0bDan Gohman const ARMSubtarget* getSubtarget() const { 317707e0184233f27e0e9f9aee0309f2daab8cfe7f8Dan Gohman return Subtarget; 318f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola } 319f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 32006b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng /// getRegClassFor - Return the register class that should be used for the 32106b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng /// specified value type. 32206b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng virtual TargetRegisterClass *getRegClassFor(EVT VT) const; 32306b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng 324b4202b84d7e54efe5e144885c7da63e6cc465f80Bill Wendling /// getFunctionAlignment - Return the Log2 alignment of this function. 32520c568f366be211323eeaf0e45ef053278ec9ddcBill Wendling virtual unsigned getFunctionAlignment(const Function *F) const; 32620c568f366be211323eeaf0e45ef053278ec9ddcBill Wendling 327cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov /// getMaximalGlobalOffset - Returns the maximal possible offset which can 328cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov /// be used for loads / stores from the global. 329cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov virtual unsigned getMaximalGlobalOffset() const; 330cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov 331ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher /// createFastISel - This method returns a target specific FastISel object, 332ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher /// or null if the target does not support "fast" ISel. 333ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher virtual FastISel *createFastISel(FunctionLoweringInfo &funcInfo) const; 334ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher 3351cc3984148be113c6e5e470f23c9ddbd37679c5fEvan Cheng Sched::Preference getSchedulingPreference(SDNode *N) const; 3361cc3984148be113c6e5e470f23c9ddbd37679c5fEvan Cheng 337d0ac234b1b3a88946ad8bb52677764f3e3eeb8b3Anton Korobeynikov bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const; 33848e19352840a5f7012493ead894e81a2dbec1778Anton Korobeynikov bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; 33939382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng 34039382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// isFPImmLegal - Returns true if the target can instruction select the 34139382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// specified FP immediate natively. If false, the legalizer will 34239382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// materialize the FP immediate as a load from a constant pool. 34339382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 34439382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng 34565ffec49f73d1f8856211b107712c58cc9636b78Bob Wilson virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info, 34665ffec49f73d1f8856211b107712c58cc9636b78Bob Wilson const CallInst &I, 34765ffec49f73d1f8856211b107712c58cc9636b78Bob Wilson unsigned Intrinsic) const; 348d70f57b254114841892425a40944268d38ae0bcdEvan Cheng protected: 3494f6b4674be5473319ac5e70c76fd5cb964da2128Evan Cheng std::pair<const TargetRegisterClass*, uint8_t> 3504f6b4674be5473319ac5e70c76fd5cb964da2128Evan Cheng findRepresentativeClass(EVT VT) const; 351d70f57b254114841892425a40944268d38ae0bcdEvan Cheng 352a8e2989ece6dc46df59b0768184028257f913843Evan Cheng private: 353a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can 354a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// make the right decision when generating code for different targets. 355a8e2989ece6dc46df59b0768184028257f913843Evan Cheng const ARMSubtarget *Subtarget; 356a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 3573144687df78731ac4ddbc716a24b951678a73f57Evan Cheng const TargetRegisterInfo *RegInfo; 3583144687df78731ac4ddbc716a24b951678a73f57Evan Cheng 3593ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1Evan Cheng const InstrItineraryData *Itins; 3603ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1Evan Cheng 361d2559bf3f30cc7400483825414489ec0fb36481aBob Wilson /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created. 362a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// 363a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned ARMPCLabelIndex; 364a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 365e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addTypeForNEON(EVT VT, EVT PromotedLdStVT, EVT PromotedBitwiseVT); 366e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addDRTypeForNEON(EVT VT); 367e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addQRTypeForNEON(EVT VT); 3685bafff36c798608a189c517d37527e4a38863071Bob Wilson 3695bafff36c798608a189c517d37527e4a38863071Bob Wilson typedef SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPassVector; 37098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman void PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, 3715bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue Chain, SDValue &Arg, 3725bafff36c798608a189c517d37527e4a38863071Bob Wilson RegsToPassVector &RegsToPass, 3735bafff36c798608a189c517d37527e4a38863071Bob Wilson CCValAssign &VA, CCValAssign &NextVA, 3745bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue &StackPtr, 3755bafff36c798608a189c517d37527e4a38863071Bob Wilson SmallVector<SDValue, 8> &MemOpChains, 376d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman ISD::ArgFlagsTy Flags) const; 3775bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, 378d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue &Root, SelectionDAG &DAG, 379d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman DebugLoc dl) const; 3805bafff36c798608a189c517d37527e4a38863071Bob Wilson 38118f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, 38218f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach bool isVarArg) const; 38398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, 38498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 38598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const CCValAssign &VA, 386d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman ISD::ArgFlagsTy Flags) const; 38723ff7cff52702a8bff904d8ab4c9ca67cc19d6caJim Grosbach SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const; 3885eb195153950bc7ebfc30649494a78b2096b5ef8Jim Grosbach SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const; 389e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach SDValue LowerEH_SJLJ_DISPATCHSETUP(SDValue Op, SelectionDAG &DAG) const; 390a87ded2695e5bce30dbd0d2d2ac10c571bf1d161Jim Grosbach SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, 391d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman const ARMSubtarget *Subtarget) const; 392d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 393d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const; 394d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const; 395d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 396475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, 397d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 398475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA, 399d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 400d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG) const; 401d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 402de2b151dbf125af49717807b9cfc1f6f7a5b9ea6Bill Wendling SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 403d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 404d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 405515fe3a58877c745a922252a4492e866a2f1e42eEvan Cheng SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const; 4062457f2c66184e978d4ed8fa9e2128effff26cb0bEvan Cheng SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; 407d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 408d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const; 409d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const; 410d1fb583128c6682bb8a7c74eafa810a9270cc8dfNate Begeman SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const; 41111a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, 41211a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson const ARMSubtarget *ST) const; 41311a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson 41411a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const; 415475871a144eb604ddaf37503397ba0941442e5fbDan Gohman 41698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 41765c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 41898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 41998ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 420d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SmallVectorImpl<SDValue> &InVals) const; 42198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 42298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 42398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerFormalArguments(SDValue Chain, 42465c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 42598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 42698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 427d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SmallVectorImpl<SDValue> &InVals) const; 42898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 429c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG, 430c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings DebugLoc dl, SDValue &Chain, unsigned ArgOffset) 431c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings const; 432c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings 433c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings void computeRegArea(CCState &CCInfo, MachineFunction &MF, 434c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings unsigned &VARegSize, unsigned &VARegSaveSize) const; 435c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings 43698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 437022d9e1cef7586a80a96446ae8691a37def9bbf4Evan Cheng LowerCall(SDValue Chain, SDValue Callee, 43865c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 4390c439eb2c8397996cbccaf2798e598052d9982c8Evan Cheng bool &isTailCall, 44098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 441c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 44298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 44398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 444d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SmallVectorImpl<SDValue> &InVals) const; 44598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 446f222e595c0137b8a9571408257f7000c2fb95473Stuart Hastings /// HandleByVal - Target-specific cleanup for ByVal support. 447c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings virtual void HandleByVal(CCState *, unsigned &) const; 448f222e595c0137b8a9571408257f7000c2fb95473Stuart Hastings 44951e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// IsEligibleForTailCallOptimization - Check whether the call is eligible 45051e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// for tail call optimization. Targets which want to do tail call 45151e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// optimization should implement this function. 45251e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool IsEligibleForTailCallOptimization(SDValue Callee, 45351e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen CallingConv::ID CalleeCC, 45451e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isVarArg, 45551e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isCalleeStructRet, 45651e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isCallerStructRet, 45751e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen const SmallVectorImpl<ISD::OutputArg> &Outs, 458c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 45951e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen const SmallVectorImpl<ISD::InputArg> &Ins, 46051e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen SelectionDAG& DAG) const; 46198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 46298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerReturn(SDValue Chain, 46365c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 46498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 465c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 466d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman DebugLoc dl, SelectionDAG &DAG) const; 46706b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng 4683d2125c9dbac695c93f42c0f59fd040e413fd711Evan Cheng virtual bool isUsedByReturnOnly(SDNode *N) const; 4693d2125c9dbac695c93f42c0f59fd040e413fd711Evan Cheng 470485fafc8406db8552ba5e3ff871a6ee32694ad90Evan Cheng virtual bool mayBeEmittedAsTailCall(CallInst *CI) const; 471485fafc8406db8552ba5e3ff871a6ee32694ad90Evan Cheng 47206b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, 473218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue &ARMcc, SelectionDAG &DAG, DebugLoc dl) const; 474218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue getVFPCmp(SDValue LHS, SDValue RHS, 475218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SelectionDAG &DAG, DebugLoc dl) const; 47679f56c9618e60c390932a6866929b82c9a6d6f96Bob Wilson SDValue duplicateCmp(SDValue Cmp, SelectionDAG &DAG) const; 477218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng 478218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const; 4795278eb802fae2ee1a7b2a428596bc364d8bcd9dbJim Grosbach 480e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *EmitAtomicCmpSwap(MachineInstr *MI, 481e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *BB, 482e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach unsigned Size) const; 483e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *EmitAtomicBinary(MachineInstr *MI, 484e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach MachineBasicBlock *BB, 485e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach unsigned Size, 486e801dc4a7b89f68f40ff2753de988c482d4d117fJim Grosbach unsigned BinOpcode) const; 4875278eb802fae2ee1a7b2a428596bc364d8bcd9dbJim Grosbach 488a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 489ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher 49036fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson enum NEONModImmType { 49136fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson VMOVModImm, 49236fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson VMVNModImm, 49336fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson OtherModImm 49436fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson }; 49536fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson 49636fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson 497ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher namespace ARM { 498ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher FastISel *createFastISel(FunctionLoweringInfo &funcInfo); 499ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher } 500a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 501a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 502a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#endif // ARMISELLOWERING_H 503