Name | Date | Size | |
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.. | 17-Jul-2012 | 4 KiB | |
Alpha.h | 17-Jul-2012 | 1.3 KiB | |
Alpha.td | 17-Jul-2012 | 2.4 KiB | |
AlphaAsmPrinter.cpp | 17-Jul-2012 | 5.4 KiB | |
AlphaBranchSelector.cpp | 17-Jul-2012 | 1.9 KiB | |
AlphaCallingConv.td | 17-Jul-2012 | 1.7 KiB | |
AlphaFrameLowering.cpp | 17-Jul-2012 | 4.9 KiB | |
AlphaFrameLowering.h | 17-Jul-2012 | 1.2 KiB | |
AlphaInstrFormats.td | 17-Jul-2012 | 6.7 KiB | |
AlphaInstrInfo.cpp | 17-Jul-2012 | 12.8 KiB | |
AlphaInstrInfo.h | 17-Jul-2012 | 3.5 KiB | |
AlphaInstrInfo.td | 17-Jul-2012 | 56.8 KiB | |
AlphaISelDAGToDAG.cpp | 17-Jul-2012 | 15.4 KiB | |
AlphaISelLowering.cpp | 17-Jul-2012 | 36.9 KiB | |
AlphaISelLowering.h | 17-Jul-2012 | 5.2 KiB | |
AlphaLLRP.cpp | 17-Jul-2012 | 5.6 KiB | |
AlphaMachineFunctionInfo.h | 17-Jul-2012 | 2.2 KiB | |
AlphaRegisterInfo.cpp | 17-Jul-2012 | 6.3 KiB | |
AlphaRegisterInfo.h | 17-Jul-2012 | 1.6 KiB | |
AlphaRegisterInfo.td | 17-Jul-2012 | 4.8 KiB | |
AlphaRelocations.h | 17-Jul-2012 | 780 | |
AlphaSchedule.td | 17-Jul-2012 | 3 KiB | |
AlphaSelectionDAGInfo.cpp | 17-Jul-2012 | 749 | |
AlphaSelectionDAGInfo.h | 17-Jul-2012 | 832 | |
AlphaSubtarget.cpp | 17-Jul-2012 | 1.1 KiB | |
AlphaSubtarget.h | 17-Jul-2012 | 1.3 KiB | |
AlphaTargetMachine.cpp | 17-Jul-2012 | 1.8 KiB | |
AlphaTargetMachine.h | 17-Jul-2012 | 2.1 KiB | |
CMakeLists.txt | 17-Jul-2012 | 945 | |
Makefile | 17-Jul-2012 | 700 | |
MCTargetDesc/ | 17-Jul-2012 | 4 KiB | |
README.txt | 17-Jul-2012 | 1,023 | |
TargetInfo/ | 17-Jul-2012 | 4 KiB |
README.txt
1*** 2 3add gcc builtins for alpha instructions 4 5 6*** 7 8custom expand byteswap into nifty 9extract/insert/mask byte/word/longword/quadword low/high 10sequences 11 12*** 13 14see if any of the extract/insert/mask operations can be added 15 16*** 17 18match more interesting things for cmovlbc cmovlbs (move if low bit clear/set) 19 20*** 21 22lower srem and urem 23 24remq(i,j): i - (j * divq(i,j)) if j != 0 25remqu(i,j): i - (j * divqu(i,j)) if j != 0 26reml(i,j): i - (j * divl(i,j)) if j != 0 27remlu(i,j): i - (j * divlu(i,j)) if j != 0 28 29*** 30 31add crazy vector instructions (MVI): 32 33(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word 34PKWB, UNPKBW pack/unpack word to byte 35PKLB UNPKBL pack/unpack long to byte 36PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b)) 37 38cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions) 39 40this has some good examples for other operations that can be synthesised well 41from these rather meager vector ops (such as saturating add). 42http://www.alphalinux.org/docs/MVI-full.html 43