Lines Matching defs:rPC
61 rPC edi interpreted program counter, used for fetching instructions
70 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit
76 #define rPC %esi
132 movl rPC,offThread_pc(\_reg)
138 movl offThread_pc(rFP),rPC
156 movl rPC, (-sizeofStackSaveArea + offStackSaveArea_currentPc)(rFP)
169 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC.
172 movzwl (rPC),rINST
180 movzbl (rPC),\_reg
184 * Fetch the opcode byte at _count words offset from rPC and zero-extend
188 movzbl \_count*2(rPC),\_reg
192 * Fetch the nth instruction word from rPC into rINSTw. Does not advance
193 * rPC, and _count is in words
196 movzwl \_count*2(rPC),rINST
204 movzwl (rPC,\_reg,2),rINST
208 * Advance rPC by instruction count
211 leal 2*\_count(rPC),rPC
215 * Advance rPC by branch offset in register
218 leal (rPC,\_reg,2),rPC
232 movzbl 1(rPC),rINST
338 movw 2(rPC),rINSTw # rINSTw <= BBBB
350 movzwl 4(rPC),%ecx # ecx<- BBBB
351 movzwl 2(rPC),%eax # eax<- AAAA
379 movzwl 2(rPC),%ecx # ecx<- BBBB
394 movzwl 4(rPC),%ecx # ecx<- BBBB
395 movzwl 2(rPC),%eax # eax<- AAAA
427 movw 2(rPC),rINSTw # rINSTw <= BBBB
441 movzwl 4(rPC),%ecx # ecx<- BBBB
442 movzwl 2(rPC),%eax # eax<- AAAA
570 movswl 2(rPC),%ecx # ecx<- ssssBBBB
580 movl 2(rPC),%eax # grab all 32 bits at once
591 movzwl 2(rPC),%eax # eax<- 0000BBBB
602 movswl 2(rPC),%eax # eax<- ssssBBBB
616 movl 2(rPC),%eax # eax<- BBBBbbbb
630 movl 2(rPC),%eax # eax<- lsw
632 movl 6(rPC),rINST # rINST<- msw
644 movzwl 2(rPC),%eax # eax<- 0000BBBB
659 movzwl 2(rPC),%eax # eax<- BBBB
676 movzwl 2(rPC),%ecx # ecx<- BBBB
696 movl 2(rPC),%eax # eax<- BBBBBBBB
713 movl 2(rPC),%ecx # ecx<- BBBBBBBB
733 movzwl 2(rPC),%eax # eax<- BBBB
751 movzwl 2(rPC),%ecx # ecx<- BBBB
826 movzwl 2(rPC),%eax # eax<- BBBB
877 movzwl 2(rPC),%eax # eax<- BBBB
909 movzwl 2(rPC),rIBASE # rIBASE<- CCCC
1007 movzwl 2(rPC),%eax # eax<- BBBB
1050 movzwl 2(rPC),%eax
1076 movzwl 2(rPC),%eax # eax<- CCCC
1096 movzwl 2(rPC),%eax # eax<- CCCC
1139 movzwl 2(rPC),%ecx # ecx<- BBBB
1189 movzwl 4(rPC),%ecx # ecx<- FEDC or CCCC
1270 movzwl 2(rPC),%ecx # ecx<- BBBB
1320 movzwl 4(rPC),%ecx # ecx<- FEDC or CCCC
1393 movl 2(rPC),%ecx # ecx<- BBBBbbbb
1394 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
1450 movswl 2(rPC),%eax # eax<- ssssAAAA
1466 movl 2(rPC),%eax # eax<- AAAAAAAA
1485 movl 2(rPC),%ecx # ecx<- BBBBbbbb
1487 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
1511 movl 2(rPC),%ecx # ecx<- BBBBbbbb
1513 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
1529 movzbl 3(rPC),%eax # eax<- CC
1530 movzbl 2(rPC),%ecx # ecx<- BB
1563 movzbl 3(rPC),%eax # eax<- CC
1564 movzbl 2(rPC),%ecx # ecx<- BB
1597 movzbl 3(rPC),%eax # eax<- CC
1598 movzbl 2(rPC),%ecx # ecx<- BB
1630 movzbl 3(rPC),%eax # eax<- CC
1631 movzbl 2(rPC),%ecx # ecx<- BB
1667 movzbl 2(rPC),%ecx # ecx<- BB
1669 movzbl 3(rPC),rIBASE # rIBASE- CC
1720 movswl 2(rPC),%eax # Get signed branch offset
1748 movswl 2(rPC),%eax # Get signed branch offset
1776 movswl 2(rPC),%eax # Get signed branch offset
1804 movswl 2(rPC),%eax # Get signed branch offset
1832 movswl 2(rPC),%eax # Get signed branch offset
1860 movswl 2(rPC),%eax # Get signed branch offset
1884 movswl 2(rPC),%eax # fetch signed displacement
1908 movswl 2(rPC),%eax # fetch signed displacement
1932 movswl 2(rPC),%eax # fetch signed displacement
1956 movswl 2(rPC),%eax # fetch signed displacement
1980 movswl 2(rPC),%eax # fetch signed displacement
2004 movswl 2(rPC),%eax # fetch signed displacement
2063 movzbl 2(rPC),%eax # eax<- BB
2064 movzbl 3(rPC),%ecx # ecx<- CC
2088 movzbl 2(rPC),%eax # eax<- BB
2089 movzbl 3(rPC),%ecx # ecx<- CC
2117 movzbl 2(rPC),%eax # eax<- BB
2118 movzbl 3(rPC),%ecx # ecx<- CC
2145 movzbl 2(rPC),%eax # eax<- BB
2146 movzbl 3(rPC),%ecx # ecx<- CC
2173 movzbl 2(rPC),%eax # eax<- BB
2174 movzbl 3(rPC),%ecx # ecx<- CC
2201 movzbl 2(rPC),%eax # eax<- BB
2202 movzbl 3(rPC),%ecx # ecx<- CC
2229 movzbl 2(rPC),%eax # eax<- BB
2230 movzbl 3(rPC),%ecx # ecx<- CC
2256 movzbl 2(rPC),%eax # eax<- BB
2257 movzbl 3(rPC),%ecx # ecx<- CC
2282 movzbl 2(rPC),%eax # eax<- BB
2283 movzbl 3(rPC),%ecx # ecx<- CC
2310 movzbl 2(rPC),%eax # eax<- BB
2311 movzbl 3(rPC),%ecx # ecx<- CC
2380 movzbl 2(rPC),%eax # eax<- BB
2381 movzbl 3(rPC),%ecx # ecx<- CC
2409 movzbl 2(rPC),%eax # eax<- BB
2410 movzbl 3(rPC),%ecx # ecx<- CC
2438 movzbl 2(rPC),%eax # eax<- BB
2439 movzbl 3(rPC),%ecx # ecx<- CC
2467 movzbl 2(rPC),%eax # eax<- BB
2468 movzbl 3(rPC),%ecx # ecx<- CC
2497 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2547 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2563 movl rPC,OUT_ARG0(%esp) # pass in method->clazz
2602 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2655 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2708 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2761 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2814 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2867 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2917 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
2972 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
3033 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
3087 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
3141 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
3195 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
3246 movzwl 2(rPC),%eax # eax<- field ref BBBB
3264 movzwl 2(rPC),%eax # eax<- field ref BBBB
3286 movzwl 2(rPC),%eax # eax<- field ref BBBB
3306 movzwl 2(rPC),%eax # eax<- field ref BBBB
3330 movzwl 2(rPC),%eax # eax<- field ref BBBB
3348 movzwl 2(rPC),%eax # eax<- field ref BBBB
3373 movzwl 2(rPC),%eax # eax<- field ref BBBB
3391 movzwl 2(rPC),%eax # eax<- field ref BBBB
3416 movzwl 2(rPC),%eax # eax<- field ref BBBB
3434 movzwl 2(rPC),%eax # eax<- field ref BBBB
3459 movzwl 2(rPC),%eax # eax<- field ref BBBB
3477 movzwl 2(rPC),%eax # eax<- field ref BBBB
3502 movzwl 2(rPC),%eax # eax<- field ref BBBB
3520 movzwl 2(rPC),%eax # eax<- field ref BBBB
3544 movzwl 2(rPC),%eax # eax<- field ref BBBB
3562 movzwl 2(rPC),%eax # eax<- field ref BBBB
3585 movzwl 2(rPC),%eax # eax<- field ref BBBB
3605 movzwl 2(rPC),%eax # eax<- field ref BBBB
3626 movzwl 2(rPC),%eax # eax<- field ref BBBB
3650 movzwl 2(rPC),%eax # eax<- field ref BBBB
3674 movzwl 2(rPC),%eax # eax<- field ref BBBB
3692 movzwl 2(rPC),%eax # eax<- field ref BBBB
3717 movzwl 2(rPC),%eax # eax<- field ref BBBB
3735 movzwl 2(rPC),%eax # eax<- field ref BBBB
3760 movzwl 2(rPC),%eax # eax<- field ref BBBB
3778 movzwl 2(rPC),%eax # eax<- field ref BBBB
3803 movzwl 2(rPC),%eax # eax<- field ref BBBB
3821 movzwl 2(rPC),%eax # eax<- field ref BBBB
3847 movzwl 2(rPC),%ecx # ecx<- BBBB
3870 movzwl 4(rPC),%ecx # ecx<- GFED or CCCC
3894 movzwl 2(rPC),%eax # eax<- BBBB
3900 movzwl 4(rPC),rINST # rINST<- GFED or CCCC
3932 movzwl 2(rPC),%ecx # ecx<- BBBB
3966 movzwl 2(rPC),%eax # eax<- BBBB
3970 movzwl 4(rPC),rIBASE # rIBASE<- GFED or CCCC
3993 movzwl 2(rPC),%eax # reference (BBBB or CCCC)
4015 movzwl 2(rPC),%eax # eax<- BBBB
4024 movzwl 2(rPC),%eax
4045 movzwl 4(rPC),%eax # eax<- FEDC or CCCC
4059 movzwl 2(rPC),%eax # eax<- BBBB
4087 movzwl 2(rPC),%ecx # ecx<- BBBB
4110 movzwl 4(rPC),%ecx # ecx<- GFED or CCCC
4136 movzwl 2(rPC),%eax # eax<- BBBB
4142 movzwl 4(rPC),rINST # rINST<- GFED or CCCC
4174 movzwl 2(rPC),%ecx # ecx<- BBBB
4210 movzwl 2(rPC),%eax # eax<- BBBB
4214 movzwl 4(rPC),rIBASE # rIBASE<- GFED or CCCC
4237 movzwl 2(rPC),%eax # reference (BBBB or CCCC)
4261 movzwl 2(rPC),%eax # eax<- BBBB
4270 movzwl 2(rPC),%eax
4293 movzwl 4(rPC),%eax # eax<- FEDC or CCCC
4307 movzwl 2(rPC),%eax # eax<- BBBB
4457 SET_VREG_WORD rIBASE rINST 1 # v[A+1]<- rIBASE/rPC
4927 movzbl 2(rPC),%eax # eax<- BB
4928 movzbl 3(rPC),%ecx # ecx<- CC
4951 movzbl 2(rPC),%eax # eax<- BB
4952 movzbl 3(rPC),%ecx # ecx<- CC
4968 movzbl 2(rPC),%eax # eax<- BB
4969 movzbl 3(rPC),%ecx # ecx<- CC
4989 movzbl 2(rPC),%eax # eax<- BB
4990 movzbl 3(rPC),%ecx # ecx<- CC
5027 movzbl 2(rPC),%eax # eax<- BB
5028 movzbl 3(rPC),%ecx # ecx<- CC
5069 movzbl 2(rPC),%eax # eax<- BB
5070 movzbl 3(rPC),%ecx # ecx<- CC
5093 movzbl 2(rPC),%eax # eax<- BB
5094 movzbl 3(rPC),%ecx # ecx<- CC
5117 movzbl 2(rPC),%eax # eax<- BB
5118 movzbl 3(rPC),%ecx # ecx<- CC
5136 movzbl 2(rPC),%eax # eax<- BB
5137 movzbl 3(rPC),%ecx # ecx<- CC
5156 movzbl 2(rPC),%eax # eax<- BB
5157 movzbl 3(rPC),%ecx # ecx<- CC
5176 movzbl 2(rPC),%eax # eax<- BB
5177 movzbl 3(rPC),%ecx # ecx<- CC
5196 movzbl 2(rPC),%eax # eax<- BB
5197 movzbl 3(rPC),%ecx # ecx<- CC
5220 movzbl 2(rPC),%eax # eax<- BB
5221 movzbl 3(rPC),%ecx # ecx<- CC
5245 * for use as the vB pointer and esi (rPC) for use
5249 movzbl 2(rPC),%eax # eax<- B
5250 movzbl 3(rPC),%ecx # ecx<- C
5279 movzbl 3(rPC),%eax # eax<- CC
5280 movzbl 2(rPC),%ecx # ecx<- BB
5328 movzbl 3(rPC),%eax # eax<- CC
5329 movzbl 2(rPC),%ecx # ecx<- BB
5382 movzbl 2(rPC),%eax # eax<- BB
5383 movzbl 3(rPC),%ecx # ecx<- CC
5406 movzbl 2(rPC),%eax # eax<- BB
5407 movzbl 3(rPC),%ecx # ecx<- CC
5430 movzbl 2(rPC),%eax # eax<- BB
5431 movzbl 3(rPC),%ecx # ecx<- CC
5460 movzbl 2(rPC),%eax # eax<- BB
5461 movzbl 3(rPC),%ecx # ecx<- CC
5495 movzbl 2(rPC),%eax # eax<- BB
5496 movzbl 3(rPC),%ecx # ecx<- CC
5530 movzbl 2(rPC),%eax # eax<- BB
5531 movzbl 3(rPC),%ecx # ecx<- CC
5560 movzbl 2(rPC),%eax # eax<- CC
5561 movzbl 3(rPC),%ecx # ecx<- BB
5580 movzbl 2(rPC),%eax # eax<- CC
5581 movzbl 3(rPC),%ecx # ecx<- BB
5600 movzbl 2(rPC),%eax # eax<- CC
5601 movzbl 3(rPC),%ecx # ecx<- BB
5620 movzbl 2(rPC),%eax # eax<- CC
5621 movzbl 3(rPC),%ecx # ecx<- BB
5634 movzbl 3(rPC),%ecx # ecx<- BB
5635 movzbl 2(rPC),%eax # eax<- CC
5660 movzbl 2(rPC),%eax # eax<- CC
5661 movzbl 3(rPC),%ecx # ecx<- BB
5680 movzbl 2(rPC),%eax # eax<- CC
5681 movzbl 3(rPC),%ecx # ecx<- BB
5700 movzbl 2(rPC),%eax # eax<- CC
5701 movzbl 3(rPC),%ecx # ecx<- BB
5720 movzbl 2(rPC),%eax # eax<- CC
5721 movzbl 3(rPC),%ecx # ecx<- BB
5734 movzbl 3(rPC),%ecx # ecx<- BB
5735 movzbl 2(rPC),%eax # eax<- CC
6615 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6641 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6658 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6682 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6721 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6763 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6789 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6815 movswl 2(rPC),%ecx # ecx<- ssssCCCC
6839 movzbl 2(rPC),%eax # eax<- BB
6840 movsbl 3(rPC),%ecx # ecx<- ssssssCC
6864 movzbl 2(rPC),%eax # eax<- BB
6865 movsbl 3(rPC),%ecx # ecx<- ssssssCC
6878 movzbl 2(rPC),%eax # eax<- BB
6879 movsbl 3(rPC),%ecx # ecx<- ssssssCC
6898 movzbl 2(rPC),%eax # eax<- BB
6899 movsbl 3(rPC),%ecx # ecx<- ssssssCC
6934 movzbl 2(rPC),%eax # eax<- BB
6935 movsbl 3(rPC),%ecx # ecx<- ssssssCC
6976 movzbl 2(rPC),%eax # eax<- BB
6977 movsbl 3(rPC),%ecx # ecx<- ssssssCC
7001 movzbl 2(rPC),%eax # eax<- BB
7002 movsbl 3(rPC),%ecx # ecx<- ssssssCC
7026 movzbl 2(rPC),%eax # eax<- BB
7027 movsbl 3(rPC),%ecx # ecx<- ssssssCC
7051 movzbl 2(rPC),%eax # eax<- BB
7052 movsbl 3(rPC),%ecx # ecx<- ssssssCC
7076 movzbl 2(rPC),%eax # eax<- BB
7077 movsbl 3(rPC),%ecx # ecx<- ssssssCC
7101 movzbl 2(rPC),%eax # eax<- BB
7102 movsbl 3(rPC),%ecx # ecx<- ssssssCC
7123 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
7177 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
7229 movzwl 2(rPC),%eax # eax<- field ref BBBB
7247 movzwl 2(rPC),%eax # eax<- field ref BBBB
7272 movzwl 2(rPC),%eax # eax<- field ref BBBB
7290 movzwl 2(rPC),%eax # eax<- field ref BBBB
7316 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
7414 movl rPC,OUT_ARG0(%esp)
7418 movzbl 1(rPC),rINST
7433 movzwl 2(rPC),%eax # eax<- BBBB
7458 movzwl 2(rPC),%eax # eax<- BBBB
7480 movzwl 4(rPC),rIBASE
7551 movzwl 2(rPC),%eax # eax<- field byte offset
7569 movzwl 2(rPC),%eax # eax<- field byte offset
7591 movzwl 2(rPC),%eax # eax<- field byte offset
7612 movzwl 2(rPC),%eax # eax<- field byte offset
7628 movzwl 2(rPC),%eax # eax<- field byte offset
7651 movzwl 2(rPC),%eax # eax<- field byte offset
7676 movzwl 4(rPC),%eax # eax<- FEDC or CCCC
7677 movzwl 2(rPC),%ecx # ecx<- BBBB
7701 movzwl 4(rPC),%eax # eax<- FEDC or CCCC
7702 movzwl 2(rPC),%ecx # ecx<- BBBB
7727 movzwl 4(rPC),%eax # eax<- GFED or CCCC
7737 movzwl 2(rPC),%eax # eax<- BBBB
7755 movzwl 4(rPC),%eax # eax<- GFED or CCCC
7765 movzwl 2(rPC),%eax # eax<- BBBB
7784 movzwl 2(rPC),rIBASE # rIBASE<- 0000CCCC
7844 movzwl 2(rPC),%eax # eax<- field ref BBBB
7862 movzwl 2(rPC),%eax # eax<- field ref BBBB
7885 movzwl 2(rPC),%eax # eax<- field ref BBBB
7909 movzwl 2(rPC),%eax # eax<- field ref BBBB
7954 movl rPC, OUT_ARG0(%esp)
7980 movl rPC, OUT_ARG0(%esp)
8006 movl rPC, OUT_ARG0(%esp)
8032 movl rPC, OUT_ARG0(%esp)
8058 movl rPC, OUT_ARG0(%esp)
8084 movl rPC, OUT_ARG0(%esp)
8110 movl rPC, OUT_ARG0(%esp)
8136 movl rPC, OUT_ARG0(%esp)
8162 movl rPC, OUT_ARG0(%esp)
8188 movl rPC, OUT_ARG0(%esp)
8214 movl rPC, OUT_ARG0(%esp)
8240 movl rPC, OUT_ARG0(%esp)
8266 movl rPC, OUT_ARG0(%esp)
8292 movl rPC, OUT_ARG0(%esp)
8318 movl rPC, OUT_ARG0(%esp)
8344 movl rPC, OUT_ARG0(%esp)
8370 movl rPC, OUT_ARG0(%esp)
8396 movl rPC, OUT_ARG0(%esp)
8422 movl rPC, OUT_ARG0(%esp)
8448 movl rPC, OUT_ARG0(%esp)
8474 movl rPC, OUT_ARG0(%esp)
8500 movl rPC, OUT_ARG0(%esp)
8526 movl rPC, OUT_ARG0(%esp)
8552 movl rPC, OUT_ARG0(%esp)
8578 movl rPC, OUT_ARG0(%esp)
8604 movl rPC, OUT_ARG0(%esp)
8630 movl rPC, OUT_ARG0(%esp)
8656 movl rPC, OUT_ARG0(%esp)
8682 movl rPC, OUT_ARG0(%esp)
8708 movl rPC, OUT_ARG0(%esp)
8734 movl rPC, OUT_ARG0(%esp)
8760 movl rPC, OUT_ARG0(%esp)
8786 movl rPC, OUT_ARG0(%esp)
8812 movl rPC, OUT_ARG0(%esp)
8838 movl rPC, OUT_ARG0(%esp)
8864 movl rPC, OUT_ARG0(%esp)
8890 movl rPC, OUT_ARG0(%esp)
8916 movl rPC, OUT_ARG0(%esp)
8942 movl rPC, OUT_ARG0(%esp)
8968 movl rPC, OUT_ARG0(%esp)
8994 movl rPC, OUT_ARG0(%esp)
9020 movl rPC, OUT_ARG0(%esp)
9046 movl rPC, OUT_ARG0(%esp)
9072 movl rPC, OUT_ARG0(%esp)
9098 movl rPC, OUT_ARG0(%esp)
9124 movl rPC, OUT_ARG0(%esp)
9150 movl rPC, OUT_ARG0(%esp)
9176 movl rPC, OUT_ARG0(%esp)
9202 movl rPC, OUT_ARG0(%esp)
9228 movl rPC, OUT_ARG0(%esp)
9254 movl rPC, OUT_ARG0(%esp)
9280 movl rPC, OUT_ARG0(%esp)
9306 movl rPC, OUT_ARG0(%esp)
9332 movl rPC, OUT_ARG0(%esp)
9358 movl rPC, OUT_ARG0(%esp)
9384 movl rPC, OUT_ARG0(%esp)
9410 movl rPC, OUT_ARG0(%esp)
9436 movl rPC, OUT_ARG0(%esp)
9462 movl rPC, OUT_ARG0(%esp)
9488 movl rPC, OUT_ARG0(%esp)
9514 movl rPC, OUT_ARG0(%esp)
9540 movl rPC, OUT_ARG0(%esp)
9566 movl rPC, OUT_ARG0(%esp)
9592 movl rPC, OUT_ARG0(%esp)
9618 movl rPC, OUT_ARG0(%esp)
9644 movl rPC, OUT_ARG0(%esp)
9670 movl rPC, OUT_ARG0(%esp)
9696 movl rPC, OUT_ARG0(%esp)
9722 movl rPC, OUT_ARG0(%esp)
9748 movl rPC, OUT_ARG0(%esp)
9774 movl rPC, OUT_ARG0(%esp)
9800 movl rPC, OUT_ARG0(%esp)
9826 movl rPC, OUT_ARG0(%esp)
9852 movl rPC, OUT_ARG0(%esp)
9878 movl rPC, OUT_ARG0(%esp)
9904 movl rPC, OUT_ARG0(%esp)
9930 movl rPC, OUT_ARG0(%esp)
9956 movl rPC, OUT_ARG0(%esp)
9982 movl rPC, OUT_ARG0(%esp)
10008 movl rPC, OUT_ARG0(%esp)
10034 movl rPC, OUT_ARG0(%esp)
10060 movl rPC, OUT_ARG0(%esp)
10086 movl rPC, OUT_ARG0(%esp)
10112 movl rPC, OUT_ARG0(%esp)
10138 movl rPC, OUT_ARG0(%esp)
10164 movl rPC, OUT_ARG0(%esp)
10190 movl rPC, OUT_ARG0(%esp)
10216 movl rPC, OUT_ARG0(%esp)
10242 movl rPC, OUT_ARG0(%esp)
10268 movl rPC, OUT_ARG0(%esp)
10294 movl rPC, OUT_ARG0(%esp)
10320 movl rPC, OUT_ARG0(%esp)
10346 movl rPC, OUT_ARG0(%esp)
10372 movl rPC, OUT_ARG0(%esp)
10398 movl rPC, OUT_ARG0(%esp)
10424 movl rPC, OUT_ARG0(%esp)
10450 movl rPC, OUT_ARG0(%esp)
10476 movl rPC, OUT_ARG0(%esp)
10502 movl rPC, OUT_ARG0(%esp)
10528 movl rPC, OUT_ARG0(%esp)
10554 movl rPC, OUT_ARG0(%esp)
10580 movl rPC, OUT_ARG0(%esp)
10606 movl rPC, OUT_ARG0(%esp)
10632 movl rPC, OUT_ARG0(%esp)
10658 movl rPC, OUT_ARG0(%esp)
10684 movl rPC, OUT_ARG0(%esp)
10710 movl rPC, OUT_ARG0(%esp)
10736 movl rPC, OUT_ARG0(%esp)
10762 movl rPC, OUT_ARG0(%esp)
10788 movl rPC, OUT_ARG0(%esp)
10814 movl rPC, OUT_ARG0(%esp)
10840 movl rPC, OUT_ARG0(%esp)
10866 movl rPC, OUT_ARG0(%esp)
10892 movl rPC, OUT_ARG0(%esp)
10918 movl rPC, OUT_ARG0(%esp)
10944 movl rPC, OUT_ARG0(%esp)
10970 movl rPC, OUT_ARG0(%esp)
10996 movl rPC, OUT_ARG0(%esp)
11022 movl rPC, OUT_ARG0(%esp)
11048 movl rPC, OUT_ARG0(%esp)
11074 movl rPC, OUT_ARG0(%esp)
11100 movl rPC, OUT_ARG0(%esp)
11126 movl rPC, OUT_ARG0(%esp)
11152 movl rPC, OUT_ARG0(%esp)
11178 movl rPC, OUT_ARG0(%esp)
11204 movl rPC, OUT_ARG0(%esp)
11230 movl rPC, OUT_ARG0(%esp)
11256 movl rPC, OUT_ARG0(%esp)
11282 movl rPC, OUT_ARG0(%esp)
11308 movl rPC, OUT_ARG0(%esp)
11334 movl rPC, OUT_ARG0(%esp)
11360 movl rPC, OUT_ARG0(%esp)
11386 movl rPC, OUT_ARG0(%esp)
11412 movl rPC, OUT_ARG0(%esp)
11438 movl rPC, OUT_ARG0(%esp)
11464 movl rPC, OUT_ARG0(%esp)
11490 movl rPC, OUT_ARG0(%esp)
11516 movl rPC, OUT_ARG0(%esp)
11542 movl rPC, OUT_ARG0(%esp)
11568 movl rPC, OUT_ARG0(%esp)
11594 movl rPC, OUT_ARG0(%esp)
11620 movl rPC, OUT_ARG0(%esp)
11646 movl rPC, OUT_ARG0(%esp)
11672 movl rPC, OUT_ARG0(%esp)
11698 movl rPC, OUT_ARG0(%esp)
11724 movl rPC, OUT_ARG0(%esp)
11750 movl rPC, OUT_ARG0(%esp)
11776 movl rPC, OUT_ARG0(%esp)
11802 movl rPC, OUT_ARG0(%esp)
11828 movl rPC, OUT_ARG0(%esp)
11854 movl rPC, OUT_ARG0(%esp)
11880 movl rPC, OUT_ARG0(%esp)
11906 movl rPC, OUT_ARG0(%esp)
11932 movl rPC, OUT_ARG0(%esp)
11958 movl rPC, OUT_ARG0(%esp)
11984 movl rPC, OUT_ARG0(%esp)
12010 movl rPC, OUT_ARG0(%esp)
12036 movl rPC, OUT_ARG0(%esp)
12062 movl rPC, OUT_ARG0(%esp)
12088 movl rPC, OUT_ARG0(%esp)
12114 movl rPC, OUT_ARG0(%esp)
12140 movl rPC, OUT_ARG0(%esp)
12166 movl rPC, OUT_ARG0(%esp)
12192 movl rPC, OUT_ARG0(%esp)
12218 movl rPC, OUT_ARG0(%esp)
12244 movl rPC, OUT_ARG0(%esp)
12270 movl rPC, OUT_ARG0(%esp)
12296 movl rPC, OUT_ARG0(%esp)
12322 movl rPC, OUT_ARG0(%esp)
12348 movl rPC, OUT_ARG0(%esp)
12374 movl rPC, OUT_ARG0(%esp)
12400 movl rPC, OUT_ARG0(%esp)
12426 movl rPC, OUT_ARG0(%esp)
12452 movl rPC, OUT_ARG0(%esp)
12478 movl rPC, OUT_ARG0(%esp)
12504 movl rPC, OUT_ARG0(%esp)
12530 movl rPC, OUT_ARG0(%esp)
12556 movl rPC, OUT_ARG0(%esp)
12582 movl rPC, OUT_ARG0(%esp)
12608 movl rPC, OUT_ARG0(%esp)
12634 movl rPC, OUT_ARG0(%esp)
12660 movl rPC, OUT_ARG0(%esp)
12686 movl rPC, OUT_ARG0(%esp)
12712 movl rPC, OUT_ARG0(%esp)
12738 movl rPC, OUT_ARG0(%esp)
12764 movl rPC, OUT_ARG0(%esp)
12790 movl rPC, OUT_ARG0(%esp)
12816 movl rPC, OUT_ARG0(%esp)
12842 movl rPC, OUT_ARG0(%esp)
12868 movl rPC, OUT_ARG0(%esp)
12894 movl rPC, OUT_ARG0(%esp)
12920 movl rPC, OUT_ARG0(%esp)
12946 movl rPC, OUT_ARG0(%esp)
12972 movl rPC, OUT_ARG0(%esp)
12998 movl rPC, OUT_ARG0(%esp)
13024 movl rPC, OUT_ARG0(%esp)
13050 movl rPC, OUT_ARG0(%esp)
13076 movl rPC, OUT_ARG0(%esp)
13102 movl rPC, OUT_ARG0(%esp)
13128 movl rPC, OUT_ARG0(%esp)
13154 movl rPC, OUT_ARG0(%esp)
13180 movl rPC, OUT_ARG0(%esp)
13206 movl rPC, OUT_ARG0(%esp)
13232 movl rPC, OUT_ARG0(%esp)
13258 movl rPC, OUT_ARG0(%esp)
13284 movl rPC, OUT_ARG0(%esp)
13310 movl rPC, OUT_ARG0(%esp)
13336 movl rPC, OUT_ARG0(%esp)
13362 movl rPC, OUT_ARG0(%esp)
13388 movl rPC, OUT_ARG0(%esp)
13414 movl rPC, OUT_ARG0(%esp)
13440 movl rPC, OUT_ARG0(%esp)
13466 movl rPC, OUT_ARG0(%esp)
13492 movl rPC, OUT_ARG0(%esp)
13518 movl rPC, OUT_ARG0(%esp)
13544 movl rPC, OUT_ARG0(%esp)
13570 movl rPC, OUT_ARG0(%esp)
13596 movl rPC, OUT_ARG0(%esp)
13622 movl rPC, OUT_ARG0(%esp)
13648 movl rPC, OUT_ARG0(%esp)
13674 movl rPC, OUT_ARG0(%esp)
13700 movl rPC, OUT_ARG0(%esp)
13726 movl rPC, OUT_ARG0(%esp)
13752 movl rPC, OUT_ARG0(%esp)
13778 movl rPC, OUT_ARG0(%esp)
13804 movl rPC, OUT_ARG0(%esp)
13830 movl rPC, OUT_ARG0(%esp)
13856 movl rPC, OUT_ARG0(%esp)
13882 movl rPC, OUT_ARG0(%esp)
13908 movl rPC, OUT_ARG0(%esp)
13934 movl rPC, OUT_ARG0(%esp)
13960 movl rPC, OUT_ARG0(%esp)
13986 movl rPC, OUT_ARG0(%esp)
14012 movl rPC, OUT_ARG0(%esp)
14038 movl rPC, OUT_ARG0(%esp)
14064 movl rPC, OUT_ARG0(%esp)
14090 movl rPC, OUT_ARG0(%esp)
14116 movl rPC, OUT_ARG0(%esp)
14142 movl rPC, OUT_ARG0(%esp)
14168 movl rPC, OUT_ARG0(%esp)
14194 movl rPC, OUT_ARG0(%esp)
14220 movl rPC, OUT_ARG0(%esp)
14246 movl rPC, OUT_ARG0(%esp)
14272 movl rPC, OUT_ARG0(%esp)
14298 movl rPC, OUT_ARG0(%esp)
14324 movl rPC, OUT_ARG0(%esp)
14350 movl rPC, OUT_ARG0(%esp)
14376 movl rPC, OUT_ARG0(%esp)
14402 movl rPC, OUT_ARG0(%esp)
14428 movl rPC, OUT_ARG0(%esp)
14454 movl rPC, OUT_ARG0(%esp)
14480 movl rPC, OUT_ARG0(%esp)
14506 movl rPC, OUT_ARG0(%esp)
14532 movl rPC, OUT_ARG0(%esp)
14558 movl rPC, OUT_ARG0(%esp)
14584 movl rPC, OUT_ARG0(%esp)
15163 movl offThread_pc(%ecx),rPC
15170 /* Normal case: start executing the instruction at rPC */
15239 * should be reached via a direct jump and rPC set beforehand.
15247 * the interpreter and code cache. rPC must be set on entry.
15251 movl rPC, OUT_ARG0(%esp)
15265 * rPC <= Dalvik PC of this instruction
15286 * chain to it. rPC must be set on entry.
15293 movl rPC,OUT_ARG0(%esp)
15311 * rPC set on entry.
15319 movl rPC,OUT_ARG0(%esp)
15345 * (TOS)->rPC.
15350 movl (rINST),rPC
15352 movl rPC,OUT_ARG0(%esp)
15380 movl rPC, %eax
15382 xorl rPC, %eax
15400 movl rPC,OUT_ARG0(%esp)
15409 # On entry, eax<- jitState, rPC valid
15440 movzbl 1(rPC),rINST # rINST<- AA
15441 movzwl 4(rPC), %ecx # %ecx<- CCCC
15478 movzbl 1(rPC),rINST # rINST<- BA
15482 movzwl 4(rPC), %ecx # %ecx<- GFED
15563 movl rPC, offStackSaveArea_savedPc(%edx) # newSaveArea->savedPc<- rPC
15581 movl offMethod_insns(%eax), rPC # rPC<- methodToCall->insns
15598 movl rPC, offThread_pc(%ecx) # update interpSave.pc
15645 movl rPC, offThread_pc(%ecx)
15691 movl offStackSaveArea_savedPc(%eax),rPC # pc<- saveArea->savedPC
15708 movl rPC, offThread_pc(%ecx) # update interpSave.pc
15727 movl rPC,offThread_pc(%ecx) # export state to self
15740 movl offThread_pc(%eax),rPC
15815 movl rPC,offThread_pc(%ecx)