Lines Matching defs:Is64Bit

92                                        bool Is64Bit) {
132 const uint16_t *CS = Is64Bit ? CallerSavedRegs64Bit : CallerSavedRegs32Bit;
148 bool Is64Bit, bool UseLEA,
154 Opc = getLEArOpcode(Is64Bit);
157 ? getSUBriOpcode(Is64Bit, Offset)
158 : getADDriOpcode(Is64Bit, Offset);
165 if (ThisVal == (Is64Bit ? 8 : 4)) {
168 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
169 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
172 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
173 : (Is64Bit ? X86::POP64r : X86::POP32r);
388 unsigned RegCount, bool Is64Bit) {
407 const unsigned *CURegs = (Is64Bit ? CU64BitRegs : CU32BitRegs);
468 bool Is64Bit) {
475 const unsigned *CURegs = (Is64Bit ? CU64BitRegs : CU32BitRegs);
501 bool Is64Bit = STI.is64Bit();
507 unsigned OffsetSize = (Is64Bit ? 8 : 4);
509 unsigned PushInstr = (Is64Bit ? X86::PUSH64r : X86::PUSH32r);
511 unsigned MoveInstr = (Is64Bit ? X86::MOV64rr : X86::MOV32rr);
512 unsigned MoveInstrSize = (Is64Bit ? 3 : 2);
513 unsigned SubtractInstrIdx = (Is64Bit ? 3 : 2);
515 unsigned StackDivide = (Is64Bit ? 8 : 4);
580 uint32_t RegEnc = encodeCompactUnwindRegistersWithFrame(SavedRegs, Is64Bit);
618 Is64Bit);
646 bool Is64Bit = STI.is64Bit();
676 if (Is64Bit && !Fn->hasFnAttr(Attribute::NoRedZone) &&
694 TII.get(getSUBriOpcode(Is64Bit, -TailCallReturnAddrDelta)),
735 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
764 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
789 TII.get(Is64Bit ? X86::AND64ri32 : X86::AND32ri), StackPtr)
851 if (Is64Bit) {
869 assert(!Is64Bit && "EAX is livein in x64 case!");
877 if (Is64Bit) {
892 TII.get(Is64Bit ? X86::W64ALLOCA : X86::CALLpcrel32))
901 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
913 emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,
957 bool Is64Bit = STI.is64Bit();
1007 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), FramePtr);
1039 emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, UseLEA, TII,
1045 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
1049 unsigned Opc = Is64Bit ? X86::LEA64r : X86::LEA32r;
1056 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), StackPtr)
1061 emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, UseLEA, TII, *RegInfo);
1070 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
1096 emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, UseLEA, TII, *RegInfo);
1140 emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, UseLEA, TII, *RegInfo);
1329 GetScratchRegister(bool Is64Bit, const MachineFunction &MF, bool Primary) {
1330 if (Is64Bit)
1358 bool Is64Bit = STI.is64Bit();
1363 unsigned ScratchReg = GetScratchRegister(Is64Bit, MF, true);
1379 if (Is64Bit)
1407 if (Is64Bit) {
1461 ScratchReg2 = GetScratchRegister(Is64Bit, MF, true);
1465 ScratchReg2 = GetScratchRegister(Is64Bit, MF, false);
1498 if (Is64Bit) {
1519 if (Is64Bit)