Lines Matching refs:rs
242 void move(RegisterID rd, RegisterID rs)
245 emitInst(0x00000021 | (rd << OP_SH_RD) | (rs << OP_SH_RS));
268 void addiu(RegisterID rt, RegisterID rs, int imm)
270 emitInst(0x24000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
274 void addu(RegisterID rd, RegisterID rs, RegisterID rt)
276 emitInst(0x00000021 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
280 void subu(RegisterID rd, RegisterID rs, RegisterID rt)
282 emitInst(0x00000023 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
286 void mult(RegisterID rs, RegisterID rt)
288 emitInst(0x00000018 | (rs << OP_SH_RS) | (rt << OP_SH_RT));
291 void div(RegisterID rs, RegisterID rt)
293 emitInst(0x0000001a | (rs << OP_SH_RS) | (rt << OP_SH_RT));
306 void mul(RegisterID rd, RegisterID rs, RegisterID rt)
309 emitInst(0x70000002 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
312 mult(rs, rt);
317 void andInsn(RegisterID rd, RegisterID rs, RegisterID rt)
319 emitInst(0x00000024 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
323 void andi(RegisterID rt, RegisterID rs, int imm)
325 emitInst(0x30000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
329 void nor(RegisterID rd, RegisterID rs, RegisterID rt)
331 emitInst(0x00000027 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
335 void orInsn(RegisterID rd, RegisterID rs, RegisterID rt)
337 emitInst(0x00000025 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
341 void ori(RegisterID rt, RegisterID rs, int imm)
343 emitInst(0x34000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
347 void xorInsn(RegisterID rd, RegisterID rs, RegisterID rt)
349 emitInst(0x00000026 | (rd << OP_SH_RD) | (rs << OP_SH_RS)
353 void xori(RegisterID rt, RegisterID rs, int imm)
355 emitInst(0x38000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
359 void slt(RegisterID rd, RegisterID rs, RegisterID rt)
361 emitInst(0x0000002a | (rd << OP_SH_RD) | (rs << OP_SH_RS)
365 void sltu(RegisterID rd, RegisterID rs, RegisterID rt)
367 emitInst(0x0000002b | (rd << OP_SH_RD) | (rs << OP_SH_RS)
371 void sltiu(RegisterID rt, RegisterID rs, int imm)
373 emitInst(0x2c000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
383 void sllv(RegisterID rd, RegisterID rt, int rs)
386 | (rs << OP_SH_RS));
395 void srav(RegisterID rd, RegisterID rt, RegisterID rs)
398 | (rs << OP_SH_RS));
407 void srlv(RegisterID rd, RegisterID rt, RegisterID rs)
410 | (rs << OP_SH_RS));
413 void lbu(RegisterID rt, RegisterID rs, int offset)
415 emitInst(0x90000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
420 void lw(RegisterID rt, RegisterID rs, int offset)
422 emitInst(0x8c000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
427 void lwl(RegisterID rt, RegisterID rs, int offset)
429 emitInst(0x88000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
434 void lwr(RegisterID rt, RegisterID rs, int offset)
436 emitInst(0x98000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
441 void lhu(RegisterID rt, RegisterID rs, int offset)
443 emitInst(0x94000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
448 void sw(RegisterID rt, RegisterID rs, int offset)
450 emitInst(0xac000000 | (rt << OP_SH_RT) | (rs << OP_SH_RS)
454 void jr(RegisterID rs)
456 emitInst(0x00000008 | (rs << OP_SH_RS));
459 void jalr(RegisterID rs)
461 emitInst(0x0000f809 | (rs << OP_SH_RS));
475 void bgez(RegisterID rs, int imm)
477 emitInst(0x04010000 | (rs << OP_SH_RS) | (imm & 0xffff));
480 void bltz(RegisterID rs, int imm)
482 emitInst(0x04000000 | (rs << OP_SH_RS) | (imm & 0xffff));
485 void beq(RegisterID rs, RegisterID rt, int imm)
487 emitInst(0x10000000 | (rs << OP_SH_RS) | (rt << OP_SH_RT) | (imm & 0xffff));
490 void bne(RegisterID rs, RegisterID rt, int imm)
492 emitInst(0x14000000 | (rs << OP_SH_RS) | (rt << OP_SH_RT) | (imm & 0xffff));
539 void lwc1(FPRegisterID ft, RegisterID rs, int offset)
541 emitInst(0xc4000000 | (ft << OP_SH_FT) | (rs << OP_SH_RS)
546 void ldc1(FPRegisterID ft, RegisterID rs, int offset)
548 emitInst(0xd4000000 | (ft << OP_SH_FT) | (rs << OP_SH_RS)
552 void swc1(FPRegisterID ft, RegisterID rs, int offset)
554 emitInst(0xe4000000 | (ft << OP_SH_FT) | (rs << OP_SH_RS)
558 void sdc1(FPRegisterID ft, RegisterID rs, int offset)
560 emitInst(0xf4000000 | (ft << OP_SH_FT) | (rs << OP_SH_RS)