/external/llvm/lib/CodeGen/ |
H A D | MachineCopyPropagation.cpp | 67 const DestList& Defs = SI->second; local 68 for (DestList::const_iterator I = Defs.begin(), E = Defs.end(); 81 const DestList& Defs = SI->second; local 82 for (DestList::const_iterator I = Defs.begin(), E = Defs.end(); 236 SmallVector<unsigned, 2> Defs; local 253 Defs.push_back(Reg); 295 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 296 unsigned Reg = Defs[ [all...] |
H A D | MachineInstrBundle.cpp | 120 SmallVector<MachineOperand*, 4> Defs; local 127 Defs.push_back(&MO); 152 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 153 MachineOperand &MO = *Defs[i]; 181 Defs.clear();
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H A D | LiveVariables.cpp | 445 SmallVector<unsigned, 4> &Defs) { 484 Defs.push_back(Reg); // Remember this def. 488 SmallVector<unsigned, 4> &Defs) { 489 while (!Defs.empty()) { 490 unsigned Reg = Defs.back(); 491 Defs.pop_back(); 538 SmallVector<unsigned, 4> Defs; local 543 HandlePhysRegDef(*II, 0, Defs); 605 HandlePhysRegDef(MOReg, MI, Defs); 607 UpdatePhysRegDefs(MI, Defs); 444 HandlePhysRegDef(unsigned Reg, MachineInstr *MI, SmallVector<unsigned, 4> &Defs) argument 487 UpdatePhysRegDefs(MachineInstr *MI, SmallVector<unsigned, 4> &Defs) argument [all...] |
H A D | BranchFolding.cpp | 1473 SmallSet<unsigned,4> &Defs) { 1557 Defs.insert(Reg); 1559 Defs.insert(*AS); 1588 SmallSet<unsigned, 4> Uses, Defs; 1590 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs); 1643 if (Defs.count(Reg) && !MO.isDead()) { 1659 if (Defs.count(Reg)) { 1469 findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet<unsigned,4> &Uses, SmallSet<unsigned,4> &Defs) argument
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H A D | LiveDebugVariables.cpp | 624 SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs; local 629 Defs.push_back(std::make_pair(I.start(), I.value())); 632 for (unsigned i = 0; i != Defs.size(); ++i) { 633 SlotIndex Idx = Defs[i].first; 634 unsigned LocNo = Defs[i].second; 643 addDefsFromCopies(LI, LocNo, Kills, Defs, MRI, LIS);
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H A D | MachineLICM.cpp | 844 SmallVector<unsigned, 4> Defs; 855 Defs.push_back(Reg); 867 while (!Defs.empty()) { 868 unsigned Reg = Defs.pop_back_val(); 1338 SmallVector<unsigned, 2> Defs; local 1350 Defs.push_back(i); 1354 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1355 unsigned Idx = Defs[i]; 1363 MRI->setRegClass(Dup->getOperand(Defs[j]).getReg(), OrigRCs[j]); 1368 for (unsigned i = 0, e = Defs [all...] |
H A D | IfConversion.cpp | 955 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are 974 SmallVector<unsigned, 4> Defs; local 983 Defs.push_back(Reg); 990 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 991 unsigned Reg = Defs[i]; 1324 SmallVector<unsigned, 4> Defs; local 1333 Defs.push_back(Reg); 1343 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1344 unsigned Reg = Defs[i];
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H A D | TwoAddressInstructionPass.cpp | 937 SmallSet<unsigned, 2> Defs; local 946 Defs.insert(MOReg); 957 while (To->isCopy() && Defs.count(To->getOperand(1).getReg())) { 958 Defs.insert(To->getOperand(0).getReg()); 989 if (!MO.isDead() && Defs.count(MOReg)) 995 if (Defs.count(MOReg)) 1084 SmallSet<unsigned, 2> Defs; local 1100 Defs.insert(MOReg); 1130 if (Defs.count(MOReg)) 1150 Defs 1650 SmallPtrSet<MachineInstr*, 8> Defs; local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 46 SmallSet<unsigned, 4> &Defs, 57 SmallSet<unsigned, 4> &Defs, 86 Defs.insert(Reg); 89 Defs.insert(*Subreg); 110 SmallSet<unsigned, 4> &Defs, 125 if (Uses.count(DstReg) || Defs.count(SrcReg)) 167 SmallSet<unsigned, 4> Defs; local 180 Defs.clear(); 182 TrackDefUses(MI, Defs, Uses, TRI); 219 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Use 56 TrackDefUses(MachineInstr *MI, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses, const TargetRegisterInfo *TRI) argument 108 MoveCopyOutOfITBlock(MachineInstr *MI, ARMCC::CondCodes CC, ARMCC::CondCodes OCC, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses) argument [all...] |
/external/llvm/utils/TableGen/ |
H A D | InstrInfoEmitter.cpp | 194 std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs"); local 195 if (!Defs.empty()) { 196 unsigned &IL = EmittedLists[Defs]; 197 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); 347 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
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/external/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAGInstrs.h | 213 /// Defs, Uses - Remember where defs and uses of each register are as we 217 Reg2SUnitsMap Defs; member in class:llvm::ScheduleDAGInstrs 224 /// unknown store, as we iterate. As with Defs and Uses, this is here
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/external/llvm/include/llvm/TableGen/ |
H A D | Record.h | 1537 std::map<std::string, Record*> Classes, Defs; member in class:RecordKeeper 1544 for (std::map<std::string, Record*>::iterator I = Defs.begin(), 1545 E = Defs.end(); I != E; ++I) 1550 const std::map<std::string, Record*> &getDefs() const { return Defs; } 1557 std::map<std::string, Record*>::const_iterator I = Defs.find(Name); 1558 return I == Defs.end() ? 0 : I->second; 1566 Defs.insert(std::make_pair(R->getNameInitAsString(), R)); 1578 assert(Defs.count(Name) && "Def does not exist!"); 1579 Defs.erase(Name);
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/external/llvm/lib/TableGen/ |
H A D | Record.cpp | 1868 std::vector<Record*> Defs; local 1871 Defs.push_back(DI->getDef()); 1877 return Defs; 1987 errs() << "Defs:\n"; 2006 OS << "------------- Defs -----------------\n"; 2007 const std::map<std::string, Record*> &Defs = RK.getDefs(); local 2008 for (std::map<std::string, Record*>::const_iterator I = Defs.begin(), 2009 E = Defs.end(); I != E; ++I) 2024 std::vector<Record*> Defs; local 2028 Defs [all...] |