Searched defs:Disp (Results 1 - 14 of 14) sorted by relevance

/external/llvm/lib/Target/MSP430/InstPrinter/
H A DMSP430InstPrinter.cpp63 const MCOperand &Disp = MI->getOperand(OpNo+1); local
76 if (Disp.isExpr())
77 O << *Disp.getExpr();
79 assert(Disp.isImm() && "Expected immediate in displacement field");
80 O << Disp.getImm();
/external/llvm/lib/Target/MSP430/
H A DMSP430AsmPrinter.cpp114 const MachineOperand &Disp = MI->getOperand(OpNum+1); local
119 if (Disp.isImm() && !Base.getReg())
H A DMSP430ISelDAGToDAG.cpp46 int16_t Disp; member in struct:__anon7609::MSP430ISelAddressMode
55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0),
71 errs() << " Disp " << Disp << '\n';
123 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
149 AM.Disp += G->getOffset();
154 AM.Disp += CP->getOffset();
191 AM.Disp += Val;
234 AM.Disp += Offset;
249 SDValue &Base, SDValue &Disp) {
248 SelectAddr(SDValue N, SDValue &Base, SDValue &Disp) argument
[all...]
/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp86 bool SelectAddrRegImm(SDValue N, SDValue &Disp, SDValue &Base);
148 SelectAddrRegImm(SDValue N, SDValue &Base, SDValue &Disp) { argument
150 if (SelectAddrRegReg(N, Base, Disp))
156 Disp = CurDAG->getTargetConstant(imm, MVT::i32);
167 Disp = CurDAG->getTargetConstant(Imm, CN->getValueType(0));
172 Disp = CurDAG->getTargetConstant(0, TM.getTargetLowering()->getPointerTy());
/external/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h171 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, argument
173 switch (Disp.getType()) {
177 return addImm(Disp.getImm() + off);
179 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off);
/external/llvm/lib/Target/X86/
H A DX86InstrBuilder.h35 /// with BP or SP and Disp being offsetted accordingly. The displacement may
50 int Disp; member in struct:llvm::X86AddressMode
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) {
76 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags));
78 MO.push_back(MachineOperand::CreateImm(Disp));
135 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags);
137 MIB.addImm(AM.Disp);
H A DX86FastISel.cpp394 uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue(); local
396 if (isInt<32>(Disp)) {
397 AM.Disp = (uint32_t)Disp;
408 uint64_t Disp = (int32_t)AM.Disp; local
419 Disp += SL->getElementOffset(cast<ConstantInt>(Op)->getZExtValue());
429 Disp += CI->getSExtValue() * S;
441 Disp
[all...]
H A DX86ISelDAGToDAG.cpp64 int32_t Disp; member in struct:__anon7700::X86ISelAddressMode
75 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0),
117 dbgs() << " Disp " << Disp << '\n'
202 SDValue &Scale, SDValue &Index, SDValue &Disp,
205 SDValue &Scale, SDValue &Index, SDValue &Disp,
208 SDValue &Scale, SDValue &Index, SDValue &Disp,
212 SDValue &Index, SDValue &Disp,
218 SDValue &Index, SDValue &Disp,
231 SDValue &Disp, SDValu
229 getAddressOperands(X86ISelAddressMode &AM, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment) argument
1013 uint64_t Disp = AddVal->getSExtValue() << Val; local
1079 uint64_t Disp = AddVal->getSExtValue() * CN->getZExtValue(); local
1273 SelectAddr(SDNode *Parent, SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment) argument
1316 SelectScalarSSELoad(SDNode *Root, SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment, SDValue &PatternNodeWithChain) argument
1357 SelectLEAAddr(SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment) argument
1419 SelectTLSADDRAddr(SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment) argument
1443 TryFoldLoad(SDNode *P, SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment) argument
2475 SDValue Base, Scale, Index, Disp, Segment; local
[all...]
H A DX86ISelLowering.cpp9961 SDValue Addr, Disp; local
9965 Disp = DAG.getNode(ISD::SUB, dl, MVT::i32, FPtr, Addr);
9990 OutChains[3] = DAG.getStore(Root, dl, Disp, Addr,
10610 DAG.getTargetConstant(0, MVT::i32), // Disp
10666 DAG.getTargetConstant(0, MVT::i32), // Disp
11818 MachineOperand &Disp = MI->getOperand(4); local
11925 .addDisp(Disp, UseFPOffset ? 4 : 0)
11950 .addDisp(Disp, 16)
11977 .addDisp(Disp, UseFPOffset ? 4 : 0)
11997 .addDisp(Disp,
[all...]
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp93 void EmitImmediate(const MCOperand &Disp, SMLoc Loc,
301 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); local
328 EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind),
352 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups);
360 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
366 if (Disp.isImm() && isDisp8(Disp.getImm())) {
368 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups);
374 EmitImmediate(Disp, M
[all...]
/external/llvm/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp251 bool SelectDForm2Addr(SDNode *Op, SDValue N, SDValue &Disp,
255 bool DFormAddressPredicate(SDNode *Op, SDValue N, SDValue &Disp,
370 SPUDAGToDAGISel::SelectDForm2Addr(SDNode *Op, SDValue N, SDValue &Disp, argument
374 return DFormAddressPredicate(Op, N, Disp, Base, minDForm2Offset,
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp105 bool SelectAddrImm(SDValue N, SDValue &Disp, argument
107 return PPCLowering.SelectAddressRegImm(N, Disp, Base, *CurDAG);
134 bool SelectAddrImmShift(SDValue N, SDValue &Disp, SDValue &Base) { argument
135 return PPCLowering.SelectAddressRegImmShift(N, Disp, Base, *CurDAG);
H A DPPCISelLowering.cpp884 bool PPCTargetLowering::SelectAddressRegImm(SDValue N, SDValue &Disp, argument
890 if (SelectAddressRegReg(N, Disp, Base, DAG))
896 Disp = DAG.getTargetConstant((int)imm & 0xFFFF, MVT::i32);
907 Disp = N.getOperand(1).getOperand(0); // The global address.
908 assert(Disp.getOpcode() == ISD::TargetGlobalAddress ||
909 Disp.getOpcode() == ISD::TargetConstantPool ||
910 Disp.getOpcode() == ISD::TargetJumpTable);
927 Disp = DAG.getTargetConstant((int)imm & 0xFFFF, MVT::i32);
938 Disp = DAG.getTargetConstant(Imm, CN->getValueType(0));
950 Disp
997 SelectAddressRegImmShift(SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG) const argument
[all...]
/external/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp175 const MCExpr *Disp; member in struct:__anon7662::X86Operand::__anon7663::__anon7667
217 return Mem.Disp;
420 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, argument
424 Res->Mem.Disp = Disp;
433 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp, argument
446 Res->Mem.Disp = Disp;
462 isa<MCConstantExpr>(Op.Mem.Disp) &&
463 cast<MCConstantExpr>(Op.Mem.Disp)
607 const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext()); local
632 const MCExpr *Disp = MCConstantExpr::Create(Val, getContext()); local
718 const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext()); local
792 const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext()); local
[all...]

Completed in 261 milliseconds