| /dalvik/libdex/ |
| H A D | InstrUtils.cpp | 473 #define FETCH(_offset) (insns[(_offset)]) macro
519 pDec->vA = (s2) FETCH(1); // sign-extend 16-bit value
525 pDec->vB = FETCH(1);
530 pDec->vB = (s2) FETCH(1); // sign-extend 16-bit value
539 pDec->vB = FETCH(1);
543 pDec->vB = FETCH(1) & 0xff;
544 pDec->vC = FETCH(1) >> 8;
548 pDec->vB = FETCH(1) & 0xff;
549 pDec->vC = (s1) (FETCH(1) >> 8); // sign-extend 8-bit value
555 pDec->vC = (s2) FETCH(
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| H A D | header.S | 147 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] define
152 * "_count" as you would for FETCH, and an additional 0/1 indicating which
|
| /dalvik/vm/mterp/c/ |
| H A D | header.cpp | 262 #define FETCH(_offset) (pc[(_offset)]) macro
|
| /dalvik/vm/mterp/out/ |
| H A D | InterpAsm-armv5te-vfp.S | 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] define
159 * "_count" as you would for FETCH, and an additional 0/1 indicating which
401 FETCH(r1, 1) @ r1<- BBBB
415 FETCH(r1, 2) @ r1<- BBBB
416 FETCH(r0, 1) @ r0<- AAAA
446 FETCH(r3, 1) @ r3<- BBBB
462 FETCH(r3, 2) @ r3<- BBBB
463 FETCH(r2, 1) @ r2<- AAAA
496 FETCH(r1, 1) @ r1<- BBBB
512 FETCH(r
[all...] |
| H A D | InterpAsm-armv5te.S | 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] define
159 * "_count" as you would for FETCH, and an additional 0/1 indicating which
401 FETCH(r1, 1) @ r1<- BBBB
415 FETCH(r1, 2) @ r1<- BBBB
416 FETCH(r0, 1) @ r0<- AAAA
446 FETCH(r3, 1) @ r3<- BBBB
462 FETCH(r3, 2) @ r3<- BBBB
463 FETCH(r2, 1) @ r2<- AAAA
496 FETCH(r1, 1) @ r1<- BBBB
512 FETCH(r
[all...] |
| H A D | InterpAsm-armv7-a-neon.S | 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] define
159 * "_count" as you would for FETCH, and an additional 0/1 indicating which
414 FETCH(r1, 1) @ r1<- BBBB
428 FETCH(r1, 2) @ r1<- BBBB
429 FETCH(r0, 1) @ r0<- AAAA
458 FETCH(r3, 1) @ r3<- BBBB
474 FETCH(r3, 2) @ r3<- BBBB
475 FETCH(r2, 1) @ r2<- AAAA
508 FETCH(r1, 1) @ r1<- BBBB
524 FETCH(r
[all...] |
| H A D | InterpAsm-armv7-a.S | 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] define
159 * "_count" as you would for FETCH, and an additional 0/1 indicating which
414 FETCH(r1, 1) @ r1<- BBBB
428 FETCH(r1, 2) @ r1<- BBBB
429 FETCH(r0, 1) @ r0<- AAAA
458 FETCH(r3, 1) @ r3<- BBBB
474 FETCH(r3, 2) @ r3<- BBBB
475 FETCH(r2, 1) @ r2<- AAAA
508 FETCH(r1, 1) @ r1<- BBBB
524 FETCH(r
[all...] |
| H A D | InterpC-armv5te-vfp.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |
| H A D | InterpC-armv5te.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |
| H A D | InterpC-armv7-a-neon.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |
| H A D | InterpC-armv7-a.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |
| H A D | InterpC-allstubs.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |
| H A D | InterpC-portable.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
409 inst = FETCH(0); \
532 regs = FETCH(1); \
556 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
572 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
596 srcRegs = FETCH(1); \
631 srcRegs = FETCH(1); \
644 vsrc2 = FETCH(1); \
676 litInfo = FETCH(1); \
710 litInfo = FETCH(
[all...] |
| H A D | InterpC-x86-atom.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |
| H A D | InterpC-x86.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(
[all...] |