/external/llvm/include/llvm/CodeGen/ |
H A D | FunctionLoweringInfo.h | 106 APInt KnownOne, KnownZero; member in struct:llvm::FunctionLoweringInfo::LiveOutInfo 107 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 171 const APInt &KnownZero, const APInt &KnownOne) { 173 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 179 LOI.KnownOne = KnownOne; 170 AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, const APInt &KnownZero, const APInt &KnownOne) argument
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombine.h | 295 APInt &KnownOne, unsigned Depth = 0) const { 296 return llvm::ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth); 323 APInt& KnownZero, APInt& KnownOne, 326 APInt& KnownZero, APInt& KnownOne, 294 ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne, unsigned Depth = 0) const argument
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H A D | InstCombineSimplifyDemanded.cpp | 54 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0); 58 KnownZero, KnownOne, 0); 69 APInt &KnownZero, APInt &KnownOne, 72 KnownZero, KnownOne, Depth); 85 /// returns false after analyzing the expression and setting KnownOne and known 89 /// the expression. KnownOne and KnownZero always follow the invariant that 90 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that 91 /// the bits in KnownOne and KnownZero may only be accurate for those bits set 93 /// and KnownOne must all be the same. 101 APInt &KnownZero, APInt &KnownOne, 68 SimplifyDemandedBits(Use &U, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) argument 100 SimplifyDemandedUseBits(Value *V, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) argument [all...] |
H A D | InstCombineCompares.cpp | 152 const APInt& KnownOne, 154 assert(KnownZero.getBitWidth() == KnownOne.getBitWidth() && 157 "KnownZero, KnownOne and Min, Max must have equal bitwidth."); 158 APInt UnknownBits = ~(KnownZero|KnownOne); 162 Min = KnownOne; 163 Max = KnownOne|UnknownBits; 176 const APInt &KnownOne, 178 assert(KnownZero.getBitWidth() == KnownOne.getBitWidth() && 181 "Ty, KnownZero, KnownOne and Min, Max must have equal bitwidth."); 182 APInt UnknownBits = ~(KnownZero|KnownOne); 151 ComputeSignedMinMaxValuesFromKnownBits(const APInt& KnownZero, const APInt& KnownOne, APInt& Min, APInt& Max) argument 175 ComputeUnsignedMinMaxValuesFromKnownBits(const APInt &KnownZero, const APInt &KnownOne, APInt &Min, APInt &Max) argument [all...] |
/external/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 47 APInt &KnownZero, APInt &KnownOne, 96 KnownOne |= KnownOne2 & Mask; 107 KnownOne |= LHSKnownOne & Mask; 111 if (!KnownZero.isNegative() && !KnownOne.isNegative()) { 119 KnownOne |= APInt::getSignBit(BitWidth); 126 KnownOne |= APInt::getSignBit(BitWidth); 133 APInt &KnownZero, APInt &KnownOne, 137 ComputeMaskedBits(Op1, KnownZero, KnownOne, TD, Depth+1); 139 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 152 bool isKnownNegativeOp1 = KnownOne 46 ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, const TargetData *TD, unsigned Depth) argument 132 ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, const TargetData *TD, unsigned Depth) argument 228 ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne, const TargetData *TD, unsigned Depth) argument 780 ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, const TargetData *TD, unsigned Depth) argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 836 APInt &KnownOne, 840 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 846 DAG.ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 848 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 852 KnownOne &= KnownOne2; 834 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGISel.cpp | 512 APInt KnownOne; local 541 CurDAG->ComputeMaskedBits(Src, KnownZero, KnownOne); 542 FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne); 1444 APInt KnownZero, KnownOne; local 1445 CurDAG->ComputeMaskedBits(LHS, KnownZero, KnownOne); 1448 if ((NeededMask & KnownOne) == NeededMask)
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H A D | LegalizeIntegerTypes.cpp | 1364 APInt KnownZero, KnownOne; local 1365 DAG.ComputeMaskedBits(N->getOperand(1), KnownZero, KnownOne); 1368 if (((KnownZero|KnownOne) & HighBitMask) == 0) 1377 if (KnownOne.intersects(HighBitMask)) {
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H A D | TargetLowering.cpp | 1206 /// analyze the expression and return a mask of KnownOne and KnownZero bits for 1212 APInt &KnownOne, 1222 KnownZero = KnownOne = APInt(BitWidth, 0); 1227 // If not at the root, Just compute the KnownZero/KnownOne bits to 1229 TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1248 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1249 KnownZero = ~KnownOne; 1270 KnownOne, TLO, Depth+1)) 1272 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1280 if ((NewMask & ~KnownZero2 & KnownOne) 1209 SimplifyDemandedBits(SDValue Op, const APInt &DemandedMask, APInt &KnownZero, APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth) const argument 1863 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument 1918 APInt KnownZero, KnownOne; local [all...] |
H A D | DAGCombiner.cpp | 680 APInt KnownZero, KnownOne; local 681 if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO)) 3833 APInt KnownZero, KnownOne; local 3834 DAG.ComputeMaskedBits(N0.getOperand(0), KnownZero, KnownOne); 3836 // If any of the input bits are KnownOne, then the input couldn't be all 3838 if (KnownOne.getBoolValue()) return DAG.getConstant(0, VT); 4425 APInt KnownOne; local 4428 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne); 4449 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne);
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H A D | SelectionDAG.cpp | 1630 APInt KnownZero, KnownOne; local 1631 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1632 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1637 /// known to be either zero or one and return them in the KnownZero/KnownOne 1641 APInt &KnownOne, unsigned Depth) const { 1644 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1653 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1654 KnownZero = ~KnownOne; 1658 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1660 assert((KnownZero & KnownOne) 1640 ComputeMaskedBits(SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth) const argument 2197 APInt KnownZero, KnownOne; local 2222 APInt KnownZero, KnownOne; local 2274 APInt KnownZero, KnownOne; local 6008 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 899 APInt KnownZero, KnownOne; local 900 DAG.ComputeMaskedBits(X, KnownZero, KnownOne);
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H A D | X86ISelLowering.cpp | 12779 APInt &KnownOne, 12791 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 13569 APInt KnownZero, KnownOne; local 13573 TLI.SimplifyDemandedBits(Cond, DemandedMask, KnownZero, KnownOne, TLO)) 14792 APInt KnownZero, KnownOne; local 14797 TLI.SimplifyDemandedBits(Op1, DemandedMask, KnownZero, KnownOne, TLO)) 12777 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1363 APInt KnownZero, KnownOne; local 1366 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1386 APInt KnownZero, KnownOne; local 1389 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1402 APInt KnownZero, KnownOne; local 1405 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1525 APInt &KnownOne, 1528 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 1523 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 3162 APInt &KnownOne, 3170 // KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0); 3160 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth ) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5511 APInt &KnownOne, 5514 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 5509 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8388 APInt KnownZero, KnownOne; local 8389 DAG.ComputeMaskedBits(SDValue(N,0), KnownZero, KnownOne); local 8908 APInt &KnownOne, 8911 KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); 8916 DAG.ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 8917 if (KnownZero == 0 && KnownOne == 0) return; 8922 KnownOne &= KnownOneRHS; 8906 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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