Searched defs:ShiftAmount (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 390 SDValue ShiftAmount = DAG.getConstant(NumBits, local
393 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
547 SDValue ShiftAmount = DAG.getConstant(NumBits, local
549 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 606 static bool Is_PostInc_S4_Offset(SDNode * S, int ShiftAmount) { argument
613 if (ShiftAmount > 0) {
614 m = v % ShiftAmount;
615 v = v >> ShiftAmount;
648 // ShiftAmount = number of left-shifted bits in the Hexagon instruction.
649 int ShiftAmount = VT.getSizeInBits() / 16; local
650 if (isLegal && Is_PostInc_S4_Offset(Offset.getNode(), ShiftAmount)) {
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 608 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); local
615 if (Opc == ISD::SRL && ShiftAmount) {
619 ShiftAmount -= 1;
622 while (ShiftAmount--)
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 102 unsigned &ShiftAmount);
3439 const MCExpr *ShiftAmount; local
3441 if (getParser().ParseExpression(ShiftAmount)) {
3445 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount);
3518 const MCExpr *ShiftAmount; local
3520 if (getParser().ParseExpression(ShiftAmount)) {
3524 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount);
3579 const MCExpr *ShiftAmount; local
3581 if (getParser().ParseExpression(ShiftAmount)) {
3585 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(ShiftAmount);
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