Searched defs:isReg (Results 1 - 12 of 12) sorted by relevance

/external/llvm/include/llvm/MC/
H A DMachineLocation.h51 bool isReg() const { return IsRegister; } function in class:llvm::MachineLocation
H A DMCInst.h56 bool isReg() const { return Kind == kRegister; } function in class:llvm::MCOperand
64 assert(isReg() && "This is not a register operand!");
70 assert(isReg() && "This is not a register operand!");
/external/llvm/include/llvm/CodeGen/
H A DMachineOperand.h203 /// isReg - Tests if this is a MO_Register operand.
204 bool isReg() const { return OpKind == MO_Register; } function in class:llvm::MachineOperand
238 assert(isReg() && "This is not a register operand!");
243 assert(isReg() && "Wrong MachineOperand accessor");
248 assert(isReg() && "Wrong MachineOperand accessor");
253 assert(isReg() && "Wrong MachineOperand accessor");
258 assert(isReg() && "Wrong MachineOperand accessor");
263 assert(isReg() && "Wrong MachineOperand accessor");
268 assert(isReg() && "Wrong MachineOperand accessor");
273 assert(isReg()
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp135 bool isReg() const { return Kind == CV_Register; } function in class:__anon7582::CountValue
140 assert(isReg() && "Wrong CountValue accessor");
158 if (isReg()) { OS << PrintReg(getReg()); }
350 assert(InitialValue->isReg() && "Expecting register for init value");
392 if (MO.isReg() && MO.isDef() &&
479 if (TripCount->isReg()) {
629 if (MII->getOperand(1).isReg()) {
/external/llvm/lib/Target/MBlaze/AsmParser/
H A DMBlazeAsmParser.cpp173 bool isReg() const { return Kind == Register; } function in struct:__anon7591::MBlazeOperand
362 if (!Base.isReg()) {
367 if (!Offset.isReg() && !Offset.isImm()) {
373 if (Offset.isReg())
/external/llvm/utils/TableGen/
H A DCodeGenInstruction.h300 bool isReg() const { return Kind == K_Reg; } function in struct:llvm::CodeGenInstAlias::ResultOperand
305 Record *getRegister() const { assert(isReg()); return R; }
H A DFixedLenDecoderEmitter.cpp1391 bool isReg = false; local
1396 isReg = true;
1402 if (!isReg && String && String->getValue() != "")
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp405 if (MO.isReg()) {
556 if (MCOp1.isImm() && MCOp2.isReg() &&
717 if (!MO.isReg()) {
797 if (!MO.isReg()) {
952 bool isReg = MO.getReg() != 0; local
955 if (isReg) {
961 return Binary | (isAdd << 12) | (isReg << 13);
1007 if (!MO.isReg()) {
1079 if (!MO.isReg()) {
/external/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp339 bool isReg() const { return Kind == Register; } function in struct:__anon7662::X86Operand
1101 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) {
1114 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) {
1141 if (isSrcOp(*Op1) && Op2->isReg()) {
1171 if (isDstOp(*Op2) && Op1->isReg()) {
/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp849 bool isReg() const { return Kind == k_Register; } function in class:__anon7537::ARMOperand
2511 if (!PrevOp->isReg())
4772 static_cast<ARMOperand*>(Operands[3])->isReg() &&
4773 static_cast<ARMOperand*>(Operands[4])->isReg() &&
4783 static_cast<ARMOperand*>(Operands[3])->isReg() &&
4784 static_cast<ARMOperand*>(Operands[4])->isReg() &&
4787 ((Mnemonic == "add" &&static_cast<ARMOperand*>(Operands[5])->isReg()) ||
4797 static_cast<ARMOperand*>(Operands[3])->isReg() &&
4798 static_cast<ARMOperand*>(Operands[4])->isReg() &&
4829 static_cast<ARMOperand*>(Operands[3])->isReg()
[all...]
/external/valgrind/main/VEX/priv/
H A Dguest_amd64_toIR.c6514 Bool isReg = epartIsReg(modrm); local
6607 if (isReg) {
6645 ( isReg ? nameMMXReg(eregLO3ofRM(modrm)) : dis_buf ),
7569 Bool isReg; local
7583 isReg = epartIsReg(modrm);
7584 if (isReg) {
7596 ( isReg ? nameIRegE(sz, pfx, modrm) : dis_buf ),
H A Dguest_x86_toIR.c5425 Bool isReg = epartIsReg(modrm); local
5518 if (isReg) {
5556 ( isReg ? nameMMXReg(eregOfRM(modrm)) : dis_buf ),
6323 Bool isReg; local
6339 isReg = epartIsReg(modrm);
6340 if (isReg) {
6352 ( isReg ? nameIReg(sz, eregOfRM(modrm)) : dis_buf ),

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