Searched defs:shift_op (Results 1 - 3 of 3) sorted by relevance

/external/v8/src/arm/
H A Dassembler-arm.cc183 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) { argument
185 ASSERT(shift_op != ROR || shift_imm != 0); // use RRX if you mean it
188 shift_op_ = shift_op;
190 if (shift_op == RRX) {
199 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) { argument
200 ASSERT(shift_op != RRX);
203 shift_op_ = shift_op;
225 ShiftOp shift_op, int shift_imm, AddrMode am) {
229 shift_op_ = shift_op;
224 MemOperand(Register rn, Register rm, ShiftOp shift_op, int shift_imm, AddrMode am) argument
H A Dassembler-arm.h413 // rm <shift_op> shift_imm
414 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
416 // rm <shift_op> rs
417 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
437 ShiftOp shift_op() const { return shift_op_; } function in class:v8::internal::BASE_EMBEDDED
466 // [rn +/- rm <shift_op> shift_imm] Offset/NegOffset
467 // [rn +/- rm <shift_op> shift_imm]! PreIndex/NegPreIndex
468 // [rn], +/- rm <shift_op> shift_imm PostIndex/NegPostIndex
470 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
/external/valgrind/main/VEX/priv/
H A Dguest_arm_toIR.c3174 IROp shift_op, add_op; local
3188 shift_op = U ? Iop_ShrN8x16 : Iop_SarN8x16;
3192 shift_op = U ? Iop_ShrN16x8 : Iop_SarN16x8;
3196 shift_op = U ? Iop_ShrN32x4 : Iop_SarN32x4;
3207 shift_op = U ? Iop_ShrN8x8 : Iop_SarN8x8;
3211 shift_op = U ? Iop_ShrN16x4 : Iop_SarN16x4;
3215 shift_op = U ? Iop_ShrN32x2 : Iop_SarN32x2;
3226 assign(cc, binop(shift_op,
3245 binop(shift_op,
3248 binop(shift_op,
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