/dalvik/dx/src/com/android/dx/ssa/ |
H A D | EscapeAnalysis.java | 71 * @param reg the SSA register that defines the object 75 EscapeSet(int reg, int size, EscapeState escState) { argument 77 regSet.set(reg); 122 * @param reg {@code non-null;} register being looked up 125 private int findSetIndex(RegisterSpec reg) { argument 129 if (e.regSet.get(reg.getReg())) {
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/dalvik/vm/arch/arm/ |
H A D | CallEABI.S | 143 * r6 <-- sp after reg save 155 .setfp fp, sp, #FP_STACK_OFFSET @ point fp at first saved reg 277 sub sp, fp, #FP_STACK_OFFSET @ restore sp to post-reg-save offset
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/dalvik/vm/compiler/codegen/arm/ |
H A D | Assemble.cpp | 2358 static int selfVerificationMemRegLoad(int* sp, int reg) argument 2360 return *(sp + reg); 2364 static s8 selfVerificationMemRegLoadDouble(int* sp, int reg) argument 2366 return *((s8*)(sp + reg)); 2370 static void selfVerificationMemRegStore(int* sp, int data, int reg) argument 2372 *(sp + reg) = data; 2376 static void selfVerificationMemRegStoreDouble(int* sp, s8 data, int reg) argument 2378 *((s8*)(sp + reg)) = data;
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H A D | ArmLIR.h | 79 * code that reg locations always describe doubles as a pair of singles. 103 int reg; // Reg number member in struct:RegisterInfo 106 int partner; // If pair, other reg of pair 713 kFmtDfp, /* Double FP reg */ 714 kFmtSfp, /* Single FP reg */
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/dalvik/dx/src/com/android/dx/cf/code/ |
H A D | Ropper.java | 433 int reg = getNormalRegCount(); 434 return RegisterSpec.make((reg < 1) ? 1 : reg, Type.OBJECT);
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/dalvik/vm/compiler/codegen/arm/Thumb/ |
H A D | Factory.cpp | 884 ArmConditionCode cond, int reg, 890 newLIR2(cUnit, kThumbCmpRR, reg, tReg); 893 newLIR2(cUnit, kThumbCmpRI8, reg, checkValue); 883 genCmpImmBranch(CompilationUnit *cUnit, ArmConditionCode cond, int reg, int checkValue) argument
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/dalvik/vm/ |
H A D | Debugger.cpp | 209 static ObjectId registerObject(const Object* obj, RegistryType type, bool reg) argument 220 if (!reg) 1381 static void variableTableCb (void *cnxt, u2 reg, u4 startAddress, argument 1387 reg = (u2) tweakSlot(reg, name); 1391 name, descriptor, reg); 1400 expandBufAdd4BE(pContext->pReply, reg);
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/dalvik/vm/analysis/ |
H A D | CodeVerify.cpp | 1592 //ALOGD("check-reg v%u = %d", vsrc, checkType); 1656 LOG_VFY("VFY: uninitialized ref not expected as reg check"); 2196 static RegType adjustForRightShift(RegisterLine* registerLine, int reg, argument 2199 RegType srcType = getRegisterType(registerLine, reg); 2844 LOG_VFY_METH(meth, "Invalid reg type for array index (%d)", 4304 /* resClass can be null if the reg type is Zero */ 4642 LOG_VFY("VFY: invalid reg type %d on aput instr (need %d)", 4652 /* resClass can be null if the reg type is Zero */ 4915 LOG_VFY("VFY: invalid reg type %d on iput instr (need %d)", 5181 LOG_VFY("VFY: invalid reg typ 5854 int reg = RESULT_REGISTER(insnRegCount); local 6064 logLocalsCb(void *cnxt, u2 reg, u4 startAddress, u4 endAddress, const char *name, const char *descriptor, const char *signature) argument [all...] |
/dalvik/dexdump/ |
H A D | DexDump.cpp | 627 static void dumpLocalsCb(void *cnxt, u2 reg, u4 startAddress, argument 631 printf(" 0x%04x - 0x%04x reg=%d %s %s %s\n", 632 startAddress, endAddress, reg, name, descriptor,
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/dalvik/vm/mterp/out/ |
H A D | InterpAsm-x86.S | 60 nick reg purpose 65 rINSTbh bh high byte of inst word, usually contains src/tgt reg names 111 #define SPILL(reg) movl reg##,reg##_SPILL(%ebp) 112 #define UNSPILL(reg) movl reg##_SPILL(%ebp),reg 113 #define SPILL_TMP1(reg) movl reg,TMP_SPILL [all...] |
H A D | InterpAsm-armv5te-vfp.S | 63 reg nick purpose 3630 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 8040 mov r1, r1, lsr #4 @ r1<- next reg in low 4 8124 mov r1, r1, lsr #4 @ r1<- next reg in low 4 16793 fmrx r2, fpscr @ get VFP reg 16797 fmxr fpscr, r2 @ set VFP reg
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H A D | InterpAsm-armv7-a-neon.S | 63 reg nick purpose 3627 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 7994 mov r1, r1, lsr #4 @ r1<- next reg in low 4 8078 mov r1, r1, lsr #4 @ r1<- next reg in low 4 16730 fmrx r2, fpscr @ get VFP reg 16734 fmxr fpscr, r2 @ set VFP reg
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H A D | InterpAsm-armv7-a.S | 63 reg nick purpose 3627 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 7994 mov r1, r1, lsr #4 @ r1<- next reg in low 4 8078 mov r1, r1, lsr #4 @ r1<- next reg in low 4 16730 fmrx r2, fpscr @ get VFP reg 16734 fmxr fpscr, r2 @ set VFP reg
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H A D | InterpAsm-armv5te.S | 63 reg nick purpose 3656 /* we ignore the high word, making this equivalent to a 32-bit reg move */ 8362 mov r1, r1, lsr #4 @ r1<- next reg in low 4 8446 mov r1, r1, lsr #4 @ r1<- next reg in low 4 17251 fmrx r2, fpscr @ get VFP reg 17255 fmxr fpscr, r2 @ set VFP reg
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H A D | InterpAsm-x86-atom.S | 15785 shr $4, %edx # %edx<- put next reg in low 4 15903 shr $4, %edx # %edx<- put next reg in low 4
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/dalvik/vm/mterp/armv5te/ |
H A D | footer.S | 1150 fmrx r2, fpscr @ get VFP reg 1154 fmxr fpscr, r2 @ set VFP reg
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