Searched refs:Imm (Results 26 - 50 of 62) sorted by relevance

123

/external/llvm/lib/Target/CellSPU/
H A DSPUISelLowering.h178 virtual bool isLegalICmpImmediate(int64_t Imm) const;
H A DSPUISelDAGToDAG.cpp71 \arg Imm The returned 16-bit value, if returning true
78 isIntS16Immediate(ConstantSDNode *CN, short &Imm) argument
81 Imm = (short) CN->getZExtValue();
97 isFPS16Immediate(ConstantFPSDNode *FPN, short &Imm) argument
103 Imm = (short) val;
167 inline SDValue getI32Imm(uint32_t Imm) { argument
168 return CurDAG->getTargetConstant(Imm, MVT::i32);
172 inline SDValue getSmallIPtrImm(unsigned Imm) { argument
173 return CurDAG->getTargetConstant(Imm, SPUtli.getPointerTy());
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h158 virtual bool isLegalICmpImmediate(int64_t Imm) const;
/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelLowering.h181 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
/external/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp98 inline SDValue getImm(const SDNode *Node, unsigned Imm) { argument
99 return CurDAG->getTargetConstant(Imm, Node->getValueType(0));
484 int64_t Imm = CN->getSExtValue(); local
487 AnalyzeImm.Analyze(Imm, Size, false);
H A DMipsFrameLowering.cpp99 static void expandLargeImm(unsigned Reg, int64_t Imm, bool IsN64, argument
108 AnalyzeImm.Analyze(Imm, IsN64 ? 64 : 32, false /* LastInstrIsADDiu */);
H A DMipsISelLowering.h184 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
/external/llvm/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp54 inline SDValue getI32Imm(unsigned Imm) { argument
55 return CurDAG->getTargetConstant(Imm, MVT::i32);
/external/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp501 unsigned Imm = MI->getOperand(2).getImm(); local
505 if (Imm & 3 || Imm > 1020)
520 .addImm(Imm / 4); // The tADDrSPi has an implied scale by four.
630 unsigned Imm = MI->getOperand(2).getImm(); local
632 if (Imm > Limit)
H A DARMISelDAGToDAG.cpp88 inline SDValue getI32Imm(unsigned Imm) { argument
89 return CurDAG->getTargetConstant(Imm, MVT::i32);
183 inline bool is_so_imm(unsigned Imm) const {
184 return ARM_AM::getSOImmVal(Imm) != -1;
187 inline bool is_so_imm_not(unsigned Imm) const {
188 return ARM_AM::getSOImmVal(~Imm) != -1;
191 inline bool is_t2_so_imm(unsigned Imm) const {
192 return ARM_AM::getT2SOImmVal(Imm) != -1;
195 inline bool is_t2_so_imm_not(unsigned Imm) const {
196 return ARM_AM::getT2SOImmVal(~Imm) !
291 isInt32Immediate(SDNode *N, unsigned &Imm) argument
301 isInt32Immediate(SDValue N, unsigned &Imm) argument
308 isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) argument
[all...]
H A DARMISelLowering.cpp3692 unsigned OpCmode, Imm; local
3709 Imm = SplatBits;
3719 Imm = SplatBits;
3725 Imm = SplatBits >> 8;
3739 Imm = SplatBits;
3745 Imm = SplatBits >> 8;
3751 Imm = SplatBits >> 16;
3757 Imm = SplatBits >> 24;
3768 Imm = SplatBits >> 8;
3777 Imm
3874 isVEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseVEXT, unsigned &Imm) argument
4386 unsigned Imm, WhichResult; local
4550 unsigned Imm; local
7848 unsigned Imm = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); local
9261 isFPImmLegal(const APFloat &Imm, EVT VT) const argument
[all...]
/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp359 } Imm; member in union:__anon7537::ARMOperand::__anon7538
384 unsigned Imm; member in struct:__anon7537::ARMOperand::__anon7538::__anon7553
398 unsigned Imm; member in struct:__anon7537::ARMOperand::__anon7538::__anon7556
444 Imm = o.Imm;
517 return Imm.Val;
1456 ShifterImm.Imm));
1478 Inst.addOperand(MCOperand::CreateImm(RotImm.Imm >> 3));
1569 unsigned Imm = CE->getValue(); local
1570 Inst.addOperand(MCOperand::CreateImm((Imm
1634 int32_t Imm = Memory.OffsetImm->getValue(); local
1889 int Imm = CE->getValue(); local
1900 int Imm = CE->getValue(); local
1920 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm, local
2028 unsigned Imm = 0; local
2130 CreateShifterImm(bool isASR, unsigned Imm, SMLoc S, SMLoc E) argument
2140 CreateRotImm(unsigned Imm, SMLoc S, SMLoc E) argument
2514 int64_t Imm = 0; local
[all...]
/external/valgrind/main/VEX/priv/
H A Dhost_x86_defs.c246 op->Xrmi.Imm.imm32 = imm32;
265 vex_printf("$0x%x", op->Xrmi.Imm.imm32);
317 op->Xri.Imm.imm32 = imm32;
330 vex_printf("$0x%x", op->Xri.Imm.imm32);
1698 X86RI_Imm( i->Xin.Alu32R.src->Xrmi.Imm.imm32 ),
2019 p = emit32(p, i->Xin.Alu32R.src->Xrmi.Imm.imm32);
2051 if (fits8bits(i->Xin.Alu32R.src->Xrmi.Imm.imm32)) {
2054 *p++ = toUChar(0xFF & i->Xin.Alu32R.src->Xrmi.Imm.imm32);
2058 p = emit32(p, i->Xin.Alu32R.src->Xrmi.Imm.imm32);
2089 && !fits8bits(i->Xin.Alu32R.src->Xrmi.Imm
[all...]
H A Dhost_x86_defs.h160 } Imm; member in union:__anon11945::__anon11946
194 } Imm; member in union:__anon11951::__anon11952
H A Dhost_amd64_defs.c301 op->Armi.Imm.imm32 = imm32;
320 vex_printf("$0x%x", op->Armi.Imm.imm32);
381 op->Ari.Imm.imm32 = imm32;
394 vex_printf("$0x%x", op->Ari.Imm.imm32);
2392 if (0 == (i->Ain.Alu64R.src->Armi.Imm.imm32 & ~0xFFFFF)) {
2405 p = emit32(p, i->Ain.Alu64R.src->Armi.Imm.imm32);
2410 p = emit32(p, i->Ain.Alu64R.src->Armi.Imm.imm32);
2451 if (fits8bits(i->Ain.Alu64R.src->Armi.Imm.imm32)) {
2455 *p++ = toUChar(0xFF & i->Ain.Alu64R.src->Armi.Imm.imm32);
2460 p = emit32(p, i->Ain.Alu64R.src->Armi.Imm
[all...]
H A Dhost_amd64_defs.h176 } Imm; member in union:__anon11660::__anon11661
211 } Imm; member in union:__anon11666::__anon11667
H A Dhost_ppc_defs.h245 } Imm; member in union:__anon11832::__anon11833
273 ULong Imm; member in union:__anon11837::__anon11838
H A Dhost_ppc_isel.c1029 Int simm32 = (Int)ri->Pri.Imm;
2143 vassert(ri->Prh.Imm.syned == syned);
2145 vassert(ri->Prh.Imm.imm16 != 0x8000);
2257 vassert(ri->Prh.Imm.imm16 >= 1 && ri->Prh.Imm.imm16 <= 31);
2258 vassert(!ri->Prh.Imm.syned);
2302 vassert(ri->Prh.Imm.imm16 >= 1 && ri->Prh.Imm.imm16 <= 63);
2303 vassert(!ri->Prh.Imm.syned);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.h586 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
674 void addLegalFPImmediate(const APFloat& Imm) { argument
675 LegalFPImmediates.push_back(Imm);
H A DX86CodeEmitter.cpp811 intptr_t Imm = (intptr_t)MO.getImm();
812 Imm = Imm - MCE.getCurrentPCValue() - 4;
813 emitConstant(Imm, X86II::getSizeOfImm(Desc->TSFlags));
H A DX86FrameLowering.cpp58 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) { argument
60 if (isInt<8>(Imm))
64 if (isInt<8>(Imm))
70 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) { argument
72 if (isInt<8>(Imm))
76 if (isInt<8>(Imm))
H A DX86ISelDAGToDAG.cpp264 inline SDValue getI8Imm(unsigned Imm) { argument
265 return CurDAG->getTargetConstant(Imm, MVT::i8);
270 inline SDValue getI32Imm(unsigned Imm) { argument
271 return CurDAG->getTargetConstant(Imm, MVT::i32);
332 if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(Op1))
333 if (Imm->getAPIntValue().isSignedIntN(8))
2357 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i8); local
2378 return CurDAG->getMachineNode(X86::TEST8ri, dl, MVT::i32, Subreg, Imm);
2418 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i16); local
2426 return CurDAG->getMachineNode(X86::TEST16ri, dl, MVT::i32, Subreg, Imm);
2434 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i32); local
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp2571 SDValue Imm = RecordedNodes[RecNo].first;
2573 if (Imm->getOpcode() == ISD::Constant) {
2574 int64_t Val = cast<ConstantSDNode>(Imm)->getZExtValue();
2575 Imm = CurDAG->getTargetConstant(Val, Imm.getValueType());
2576 } else if (Imm->getOpcode() == ISD::ConstantFP) {
2577 const ConstantFP *Val=cast<ConstantFPSDNode>(Imm)->getConstantFPValue();
2578 Imm = CurDAG->getTargetConstantFP(*Val, Imm.getValueType());
2581 RecordedNodes.push_back(std::make_pair(Imm, RecordedNode
[all...]
/external/llvm/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp3179 int64_t Imm = ExtractImmediate(G, SE); local
3180 if (G->isZero() || Imm == 0)
3183 F.AM.BaseOffs = (uint64_t)F.AM.BaseOffs + Imm;
3365 int64_t Imm; member in struct:__anon7787::WorkItem
3369 : LUIdx(LI), Imm(I), OrigReg(R) {}
3379 << " , add offset " << Imm; local
3398 int64_t Imm = ExtractImmediate(Reg, SE); local
3403 Pair.first->second.insert(std::make_pair(Imm, *I));
3452 int64_t Imm = (uint64_t)JImm - M->first; local
3456 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)))
3473 int64_t Imm = WI.Imm; local
[all...]
/external/ppp/pppd/plugins/radius/etc/
H A Ddictionary.ascend262 VALUE Ascend-Token-Immediate Tok-Imm-No 0
263 VALUE Ascend-Token-Immediate Tok-Imm-Yes 1

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