| /dalvik/vm/compiler/codegen/arm/FP/ |
| H A D | ThumbPortableFP.cpp | 19 RegLocation rlDest, RegLocation rlSrc1,
23 RegLocation rlDest, RegLocation rlSrc1,
36 RegLocation rlDest, RegLocation rlSrc1,
39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
43 RegLocation rlDest, RegLocation rlSrc1,
46 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
55 RegLocation rlSrc1, RegLocation rlSrc2)
64 loadValueDirectFixed(cUnit, rlSrc1, r0);
70 loadValueDirectFixed(cUnit, rlSrc1, r0);
76 loadValueDirectWideFixed(cUnit, rlSrc1, r
35 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
42 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
54 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
[all...] |
| H A D | Thumb2VFP.cpp | 18 RegLocation rlDest, RegLocation rlSrc1,
48 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1,
54 rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
57 newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg,
64 RegLocation rlDest, RegLocation rlSrc1,
90 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
97 rlSrc1 = loadValueWide(cUnit, rlSrc1, kFPReg);
98 assert(rlSrc1
17 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
63 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
211 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
[all...] |
| H A D | ThumbVFP.cpp | 65 RegLocation rlDest, RegLocation rlSrc1,
94 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
100 loadValueAddressDirect(cUnit, rlSrc1, r1);
111 RegLocation rlDest, RegLocation rlSrc1,
136 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
143 loadValueAddressDirect(cUnit, rlSrc1, r1);
227 RegLocation rlSrc1, RegLocation rlSrc2)
251 loadValueAddressDirect(cUnit, rlSrc1, r0);
64 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
110 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
226 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
|
| /dalvik/vm/compiler/codegen/arm/ |
| H A D | Codegen.h | 39 RegLocation rlDest, RegLocation rlSrc1,
43 RegLocation rlDest, RegLocation rlSrc1,
|
| H A D | CodegenDriver.cpp | 82 RegLocation rlDest, RegLocation rlSrc1,
110 genNegFloat(cUnit, rlDest, rlSrc1);
117 loadValueDirectFixed(cUnit, rlSrc1, r0);
128 RegLocation rlDest, RegLocation rlSrc1,
156 genNegDouble(cUnit, rlDest, rlSrc1);
164 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
633 RegLocation rlDest, RegLocation rlSrc1,
642 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
666 RegLocation rlDest, RegLocation rlSrc1,
697 genMulLong(cUnit, rlDest, rlSrc1, rlSrc
81 genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
127 genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
632 genShiftOpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlShift) argument
665 genArithOpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
766 genArithOpInt(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
893 RegLocation rlSrc1; local
2606 RegLocation rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0); local
2672 RegLocation rlSrc1; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| H A D | Gen.cpp | 109 RegLocation rlSrc1, RegLocation rlSrc2)
112 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
126 RegLocation rlSrc1, RegLocation rlSrc2)
129 if (partialOverlap(rlSrc1.sRegLow,rlSrc2.sRegLow) ||
130 partialOverlap(rlSrc1.sRegLow,rlDest.sRegLow) ||
134 } else if (rlDest.sRegLow == rlSrc1.sRegLow) {
143 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
145 opRegReg(cUnit, firstOp, rlSrc1.lowReg, rlResult.lowReg);
146 opRegReg(cUnit, secondOp, rlSrc1
108 genMulLong(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
124 genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, OpKind secondOp, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
204 genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
252 RegLocation rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0); local
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| H A D | Gen.cpp | 103 RegLocation rlSrc1, RegLocation rlSrc2)
110 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg);
114 newLIR4(cUnit, kThumb2Umull, resLo, resHi, rlSrc2.lowReg, rlSrc1.lowReg);
115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1);
127 RegLocation rlSrc1, RegLocation rlSrc2)
130 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
133 opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc1
102 genMulLong(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
125 genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, OpKind secondOp, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
370 genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument
431 RegLocation rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0); local
[all...] |