| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineScheduler.h | 45 const MachineDominatorTree *MDT; member in struct:llvm::MachineSchedContext
50 MachineSchedContext(): MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {}
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| H A D | ScheduleDAGInstrs.h | 39 const MachineDominatorTree &MDT; member in class:llvm::LoopDependencies
48 MLI(mli), MDT(mdt) {}
61 const MachineDomTreeNode *Node = MDT.getNode(Header);
170 const MachineDominatorTree &MDT; member in class:llvm::ScheduleDAGInstrs
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| H A D | DFAPacketizer.h | 107 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
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| /external/llvm/lib/CodeGen/ |
| H A D | DFAPacketizer.cpp | 109 MachineDominatorTree &MDT, bool IsPostRA);
116 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
118 ScheduleDAGInstrs(MF, MLI, MDT, IsPostRA) {
128 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
132 SchedulerImpl = new DefaultVLIWScheduler(MF, MLI, MDT, IsPostRA);
115 DefaultVLIWScheduler( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, bool IsPostRA) argument
127 VLIWPacketizerList( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, bool IsPostRA) argument
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| H A D | UnreachableBlockElim.cpp | 128 MachineDominatorTree *MDT = getAnalysisIfAvailable<MachineDominatorTree>(); local
149 if (MDT && MDT->getNode(BB)) MDT->eraseNode(BB);
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| H A D | LiveDebugVariables.cpp | 224 /// @param MDT Dominator tree.
228 LiveIntervals &LIS, MachineDominatorTree &MDT,
247 LiveIntervals &LIS, MachineDominatorTree &MDT,
286 MachineDominatorTree *MDT; member in class:__anon7356::LDVImpl
488 LiveIntervals &LIS, MachineDominatorTree &MDT,
537 MDT.getNode(MBB)->getChildren();
622 MachineDominatorTree &MDT,
642 extendDef(Idx, LocNo, LI, VNI, &Kills, LIS, MDT, UVS);
645 extendDef(Idx, LocNo, 0, 0, 0, LIS, MDT, UVS);
659 userValues[i]->computeIntervals(MF->getRegInfo(), *LIS, *MDT, UV
485 extendDef(SlotIndex Idx, unsigned LocNo, LiveInterval *LI, const VNInfo *VNI, SmallVectorImpl<SlotIndex> *Kills, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument
620 computeIntervals(MachineRegisterInfo &MRI, LiveIntervals &LIS, MachineDominatorTree &MDT, UserValueScopes &UVS) argument
[all...] |
| H A D | PostRASchedulerList.cpp | 135 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
198 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
202 : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=*/true), Topo(SUnits), AA(AA),
253 MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>(); local
286 SchedulePostRATDList Scheduler(Fn, MLI, MDT, AA, RegClassInfo, AntiDepMode,
197 SchedulePostRATDList( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, AliasAnalysis *AA, const RegisterClassInfo &RCI, TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs) argument
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| H A D | SplitKit.cpp | 331 MDT(mdt),
676 assert(MDT.dominates(DefMBB, MBB) && "MBB must be dominated by the def.");
680 MachineDomTreeNode *DefDomNode = MDT[DefMBB];
715 MachineDomTreeNode *IDom = MDT[Loop->getHeader()]->getIDom();
718 if (!IDom || !MDT.dominates(DefDomNode, IDom))
776 MDT.findNearestCommonDominator(Dom.first, ValMBB);
912 LRC.addLiveInBlock(LI, MDT[MBB], End);
915 LRC.addLiveInBlock(LI, MDT[MBB]);
927 LRCalc[0].calculateValues(LIS.getSlotIndexes(), &MDT,
930 LRCalc[1].calculateValues(LIS.getSlotIndexes(), &MDT,
[all...] |
| H A D | MachineBasicBlock.cpp | 695 if (MachineDominatorTree *MDT =
698 MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ);
706 if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) {
713 MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this);
719 MDT->changeImmediateDominator(SucccDTNode, NewDTNode);
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| H A D | MachineScheduler.cpp | 145 MDT = &getAnalysis<MachineDominatorTree>();
295 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS),
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| H A D | SplitKit.h | 215 MachineDominatorTree &MDT; member in class:llvm::SplitEditor
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| H A D | InlineSpiller.cpp | 60 MachineDominatorTree &MDT; member in class:__anon7352::InlineSpiller
145 MDT(pass.getAnalysis<MachineDominatorTree>()),
442 MDT.dominates(SV.SpillMBB, DepSV.SpillMBB))) {
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| H A D | ScheduleDAGInstrs.cpp | 40 : ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()),
43 LoopRegs(MLI, MDT), FirstDbgValue(0) {
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