Searched refs:NumOps (Results 1 - 25 of 46) sorted by relevance

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/external/llvm/include/llvm/
H A DConstant.h47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) argument
48 : User(ty, vty, Ops, NumOps) {}
H A DInlineAsm.h221 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { argument
222 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
224 return Kind | (NumOps << 3);
H A DUser.h52 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps) argument
53 : Value(ty, vty), OperandList(OpList), NumOperands(NumOps) {}
H A DGlobalValue.h60 GlobalValue(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps, argument
62 : Constant(ty, vty, Ops, NumOps), Linkage(linkage),
H A DInstruction.h355 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
357 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
H A DInstrTypes.h38 Use *Ops, unsigned NumOps,
40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {}
43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd)
44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {}
37 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, Instruction *InsertBefore = 0) argument
42 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd) argument
/external/llvm/lib/Target/X86/
H A DX86CodeEmitter.cpp159 unsigned NumOps = Desc.getNumOperands(); local
160 if (NumOps) {
161 bool isTwoAddr = NumOps > 1 &&
166 for (unsigned e = NumOps; i != e; ++i) {
184 for (unsigned e = NumOps; i != e; ++i) {
196 for (; i != NumOps; ++i) {
213 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e)))
230 for (unsigned e = NumOps; i != e; ++i) {
718 unsigned NumOps = Desc->getNumOperands();
720 if (NumOps >
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H A DX86FloatingPoint.cpp983 unsigned NumOps = MI->getDesc().getNumOperands();
984 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) &&
988 unsigned Reg = getFPReg(MI->getOperand(NumOps-1));
1020 MI->RemoveOperand(NumOps-1); // Remove explicit ST(0) operand
1048 unsigned NumOps = MI->getDesc().getNumOperands();
1049 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!");
1470 unsigned NumOps = 0;
1472 i != e && MI->getOperand(i).isImm(); i += 1 + NumOps) {
1474 NumOps
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/external/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h523 const SDUse *Ops, unsigned NumOps);
525 const SDValue *Ops, unsigned NumOps);
528 const SDValue *Ops, unsigned NumOps);
530 const SDValue *Ops, unsigned NumOps);
532 const SDValue *Ops, unsigned NumOps);
633 const SDValue *Ops, unsigned NumOps,
639 const SDValue *Ops, unsigned NumOps,
645 const SDValue *Ops, unsigned NumOps,
649 SDValue getMergeValues(const SDValue *Ops, unsigned NumOps, DebugLoc dl);
720 const SDValue *Ops, unsigned NumOps);
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H A DSelectionDAGNodes.h678 unsigned NumOps)
681 OperandList(NumOps ? new SDUse[NumOps] : 0),
683 NumOperands(NumOps), NumValues(VTs.NumVTs),
685 for (unsigned i = 0; i != NumOps; ++i) {
896 unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO);
1080 const SDValue *Ops, unsigned NumOps,
1082 : MemSDNode(Opc, dl, VTs, Ops, NumOps, MemoryVT, MMO) {
1537 unsigned NumOps, ISD::CvtCode Code)
1538 : SDNode(ISD::CONVERT_RNDSAT, dl, getSDVTList(VT), Ops, NumOps),
1079 MemIntrinsicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO) argument
1536 CvtRndSatSDNode(EVT VT, DebugLoc dl, const SDValue *Ops, unsigned NumOps, ISD::CvtCode Code) argument
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H A DSelectionDAGISel.h278 const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo);
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp122 unsigned NumOps = Outs.size(); local
123 for (unsigned i = 0; i != NumOps; ++i) {
141 unsigned NumOps = ArgVTs.size(); local
142 for (unsigned i = 0; i != NumOps; ++i) {
/external/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp139 unsigned NumOps = Outs.size(); local
149 for (; i != NumOps; ++i) {
167 unsigned NumOps = ArgVTs.size(); local
168 for (unsigned i = 0; i != NumOps; ++i) {
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp338 const SDValue *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
348 const SDUse *Ops, unsigned NumOps) {
349 for (; NumOps; --NumOps, ++Ops) {
754 const SDValue *Ops,unsigned NumOps,
760 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
4018 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, argument
4020 if (NumOps
337 AddNodeIDOperands(FoldingSetNodeID &ID, const SDValue *Ops, unsigned NumOps) argument
347 AddNodeIDOperands(FoldingSetNodeID &ID, const SDUse *Ops, unsigned NumOps) argument
753 FindModifiedNodeSlot(SDNode *N, const SDValue *Ops,unsigned NumOps, void *&InsertPos) argument
4032 getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument
4044 getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument
4067 getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachineMemOperand *MMO) argument
4402 getNode(unsigned Opcode, DebugLoc DL, EVT VT, const SDUse *Ops, unsigned NumOps) argument
4418 getNode(unsigned Opcode, DebugLoc DL, EVT VT, const SDValue *Ops, unsigned NumOps) argument
4473 getNode(unsigned Opcode, DebugLoc DL, const std::vector<EVT> &ResultTys, const SDValue *Ops, unsigned NumOps) argument
4480 getNode(unsigned Opcode, DebugLoc DL, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps) argument
4488 getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, const SDValue *Ops, unsigned NumOps) argument
4754 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) argument
4833 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, const SDValue *Ops, unsigned NumOps) argument
4840 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, const SDValue *Ops, unsigned NumOps) argument
4853 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps) argument
4860 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps) argument
4901 SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument
4936 MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument
5051 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, const SDValue *Ops, unsigned NumOps) argument
5089 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, const SDValue *Ops, unsigned NumOps) argument
5115 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps) argument
5123 getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps) argument
5131 getMachineNode(unsigned Opcode, DebugLoc dl, const std::vector<EVT> &ResultTys, const SDValue *Ops, unsigned NumOps) argument
5139 getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument
5202 getNodeIfExists(unsigned Opcode, SDVTList VTList, const SDValue *Ops, unsigned NumOps) argument
5702 MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT memvt, MachineMemOperand *mmo) argument
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H A DLegalizeTypes.cpp415 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i)
1019 unsigned NumOps = N->getNumOperands(); local
1021 if (NumOps == 0) {
1023 } else if (NumOps == 1) {
1026 } else if (NumOps == 2) {
1030 SmallVector<SDValue, 8> Ops(NumOps);
1031 for (unsigned i = 0; i < NumOps; ++i)
1034 return MakeLibCall(LC, N->getValueType(0), &Ops[0], NumOps, isSigned, dl);
1040 const SDValue *Ops, unsigned NumOps,
1039 MakeLibCall(RTLIB::Libcall LC, EVT RetVT, const SDValue *Ops, unsigned NumOps, bool isSigned, DebugLoc dl) argument
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H A DInstrEmitter.cpp572 unsigned NumOps = Node->getNumOperands();
573 assert((NumOps & 1) == 1 &&
576 for (unsigned i = 1; i != NumOps; ++i) {
844 unsigned NumOps = Node->getNumOperands();
845 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
846 --NumOps; // Ignore the glue operand.
864 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
H A DScheduleDAGFast.cpp482 unsigned NumOps = Node->getNumOperands(); local
483 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
484 --NumOps; // Ignore the glue operand.
486 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp719 unsigned NumOps = MI.getNumOperands(); local
721 bool isTwoAddr = NumOps > 1 &&
726 for (; i != NumOps; ++i) {
744 for (; i != NumOps; ++i) {
756 for (; i != NumOps; ++i) {
773 if (NumOps > e && MI.getOperand(e).isReg() &&
792 for (unsigned e = NumOps; i != e; ++i) {
962 unsigned NumOps = Desc.getNumOperands(); local
964 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1)
966 else if (NumOps >
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/external/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp657 unsigned NumOps = MCID.getNumOperands(); local
658 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
659 if (HasCC && MI->getOperand(NumOps-1).isDead())
683 unsigned NumOps = MCID.getNumOperands(); local
685 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
748 unsigned NumOps = MCID.getNumOperands(); local
749 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
750 if (HasCC && MI->getOperand(NumOps-1).isDead())
774 unsigned NumOps = MCID.getNumOperands(); local
776 if (i < NumOps
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/external/llvm/lib/VMCore/
H A DInstruction.cpp23 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument
25 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
37 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument
39 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
H A DInstructions.cpp143 unsigned NumOps = e + e / 2; local
144 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common.
149 ReservedSpace = NumOps;
3191 unsigned NumOps = getNumOperands(); local
3195 if (2 + (idx + 1) * 2 != NumOps) {
3196 OL[2 + idx * 2] = OL[NumOps - 2];
3197 OL[2 + idx * 2 + 1] = OL[NumOps - 1];
3201 OL[NumOps-2].set(0);
3202 OL[NumOps
3211 unsigned NumOps = e*3; local
3254 unsigned NumOps = e*2; local
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/external/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp369 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]]; local
370 assert(NumOps <= Inst->Operands.size() &&
373 Inst->Operands.begin()+NumOps);
678 unsigned NumOps = 0; local
682 ++NumOps;
686 return NumOps;
690 unsigned NumOps = 0; local
702 ++NumOps;
707 return NumOps;
H A DCodeGenInstruction.cpp71 unsigned NumOps = 1; local
92 NumOps = NumArgs;
117 OperandType, MIOperandNo, NumOps,
119 MIOperandNo += NumOps;
H A DDAGISelMatcherEmitter.cpp646 unsigned NumOps = P.getNumOperands(); local
649 ++NumOps; // Get the chained node too.
652 OS << " Result.resize(NextRes+" << NumOps << ");\n"; local
667 for (unsigned i = 0; i != NumOps; ++i)
/external/llvm/lib/Transforms/Scalar/
H A DReassociate.cpp945 unsigned NumOps = Ops.size();
948 IterateOptimization |= Ops.size() != NumOps;
953 unsigned NumOps = Ops.size();
956 IterateOptimization |= Ops.size() != NumOps;

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