Searched refs:SDNode (Results 1 - 25 of 71) sorted by relevance

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/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h77 bool IgnoreNodeResults(SDNode *N) const {
116 SmallVector<SDNode*, 128> Worklist;
131 void NoteDeletion(SDNode *Old, SDNode *New) {
139 SDNode *AnalyzeNewNode(SDNode *N);
141 void ExpungeNode(SDNode *N);
149 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
150 bool CustomWidenLowerNode(SDNode *N, EVT VT);
155 SDValue DisintegrateMERGE_VALUES(SDNode *
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H A DSDNodeOrdering.h1 //===-- llvm/CodeGen/SDNodeOrdering.h - SDNode Ordering ---------*- C++ -*-===//
21 class SDNode;
24 /// SDNode that roughly corresponds to the ordering of the original LLVM
29 DenseMap<const SDNode*, unsigned> OrderMap;
36 void add(const SDNode *Node, unsigned O) {
39 void remove(const SDNode *Node) {
40 DenseMap<const SDNode*, unsigned>::iterator Itr = OrderMap.find(Node);
47 unsigned getOrder(const SDNode *Node) {
H A DInstrEmitter.h41 void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
48 unsigned getDstOfOnlyCopyToRegUse(SDNode *Node,
51 void CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
88 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
95 void EmitCopyToRegClassNode(SDNode *Node,
100 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
106 static unsigned CountResults(SDNode *Node);
112 static unsigned CountOperands(SDNode *Node);
121 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
140 void EmitMachineNode(SDNode *Nod
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H A DSelectionDAGPrinter.cpp44 return ((const SDNode *) Node)->getNumValues();
48 return ((const SDNode *) Node)->getValueType(i).getEVTString();
53 return itostr(I - SDNodeIterator::begin((SDNode *) Node));
69 SDNode *TargetNode = *I;
83 static bool hasNodeAddressLabel(const SDNode *Node,
103 static std::string getSimpleNodeLabel(const SDNode *Node,
112 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph);
113 static std::string getNodeAttributes(const SDNode *N,
137 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
177 void SelectionDAG::setGraphAttrs(const SDNode *
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H A DScheduleDAGSDNodes.h1 //===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===//
11 // scheduling for an SDNode-based dependency graph.
22 /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
32 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
55 static bool isPassiveNode(SDNode *Node) {
74 SUnit *newSUnit(SDNode *N);
107 virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
139 const SDNode *Node;
153 const SDNode *GetNod
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H A DSDNodeDbgValue.h24 class SDNode;
41 SDNode *Node; // valid for expressions
54 SDDbgValue(MDNode *mdP, SDNode *N, unsigned R, uint64_t off, DebugLoc dl,
83 // Returns the SDNode* for a register ref
84 SDNode *getSDNode() { assert (kind==SDNODE); return u.s.Node; }
106 // property. A SDDbgValue is invalid if the SDNode that produces the value is
H A DScheduleDAGSDNodes.cpp68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) {
110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
134 static void AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) {
136 SDNode *GlueDestNode = Glue.getNode();
179 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) {
180 SDNode *Chain = 0;
189 SmallPtrSet<SDNode*, 16> Visited;
191 DenseMap<long long, SDNode*> O2SMap; // Map from offset to SDNode
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H A DLegalizeFloatTypes.cpp45 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
107 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) {
111 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
117 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
132 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
139 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) {
151 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
163 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
174 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
216 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *
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H A DSelectionDAGDumper.cpp33 std::string SDNode::getOperationName(const SelectionDAG *G) const {
315 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
325 void SDNode::dump() const { dump(0); }
326 void SDNode::dump(const SelectionDAG *G) const {
331 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
344 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
502 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
520 const SDNode *N = I;
529 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
534 typedef SmallPtrSet<const SDNode *, 12
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H A DSelectionDAG.cpp111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
161 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
201 bool ISD::isScalarToVector(const SDNode *N) {
320 // SDNode Profile Support
363 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
365 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
472 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
479 // Handle SDNode leafs with special info.
506 static bool doNotCSE(SDNode *N) {
532 SmallVector<SDNode*, 12
6134 checkForCyclesHelper(const SDNode *N, SmallPtrSet<const SDNode*, 32> &Visited, SmallPtrSet<const SDNode*, 32> &Checked) argument
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H A DSelectionDAGISel.cpp256 SDNode *Node) const {
506 SmallPtrSet<SDNode*, 128> VisitedNodes;
507 SmallVector<SDNode*, 128> Worklist;
515 SDNode *N = Worklist.pop_back_val();
730 SDNode *Node = --ISelPosition;
737 SDNode *ResNode = Select(Node);
1505 /// SDNode.
1507 static SDNode *findGlueUse(SDNode *N) {
1509 for (SDNode
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/external/llvm/include/llvm/CodeGen/
H A DSelectionDAGISel.h78 virtual SDNode *Select(SDNode *N) = 0;
93 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
99 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
194 virtual void NodeDeleted(SDNode *N, SDNode *E) {
200 virtual void NodeUpdated(SDNode *N) {}
219 void ReplaceUses(SDNode *
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H A DSelectionDAG.h11 // SDNode class and subclasses.
40 template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> {
42 mutable ilist_half_node<SDNode> Sentinel;
44 SDNode *createSentinel() const {
45 return static_cast<SDNode*>(&Sentinel);
47 static void destroySentinel(SDNode *) {}
49 SDNode *provideInitialHead() const { return createSentinel(); }
50 SDNode *ensureHead(SDNode*) cons
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H A DSelectionDAGNodes.h10 // This file declares the SDNode class and derived classes, which are used to
44 class SDNode;
51 void checkForCycles(const SDNode *N);
67 bool isBuildVectorAllOnes(const SDNode *N);
71 bool isBuildVectorAllZeros(const SDNode *N);
76 bool isScalarToVector(const SDNode *N);
91 SDNode *Node; // The node defining the value we are using.
95 SDValue(SDNode *node, unsigned resno) : Node(node), ResNo(resno) {}
97 /// get the index which selects a specific result in the SDNode
100 /// get the SDNode whic
302 class SDNode : public FoldingSetNode, public ilist_node<SDNode> { class in namespace:llvm
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H A DAnalysis.h29 class SDNode;
92 bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
/external/llvm/lib/Target/PTX/
H A DPTXISelDAGToDAG.cpp36 SDNode *Select(SDNode *Node);
50 SDNode *SelectBRCOND(SDNode *Node);
52 SDNode *SelectREADPARAM(SDNode *Node);
53 SDNode *SelectWRITEPARAM(SDNode *Node);
54 SDNode *SelectFrameIndex(SDNode *Nod
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/external/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp52 SDNode *Select(SDNode *N);
75 bool SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset);
77 SDNode *SelectLoad(SDNode *N);
78 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, DebugLoc dl);
79 SDNode *SelectIndexedLoad(LoadSDNode *LD, DebugLoc dl);
80 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode,
82 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode,
84 SDNode *SelectBaseOffsetStor
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/external/llvm/lib/Target/CellSPU/
H A DSPUISelLowering.h64 SDValue get_vec_u18imm(SDNode *N, SelectionDAG &DAG,
66 SDValue get_vec_i16imm(SDNode *N, SelectionDAG &DAG,
68 SDValue get_vec_i10imm(SDNode *N, SelectionDAG &DAG,
70 SDValue get_vec_i8imm(SDNode *N, SelectionDAG &DAG,
72 SDValue get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
74 SDValue get_v4i32_imm(SDNode *N, SelectionDAG &DAG);
75 SDValue get_v2i64_imm(SDNode *N, SelectionDAG &DAG);
118 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
121 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
H A DSPUISelDAGToDAG.cpp176 SDNode *emitBuildVector(SDNode *bvNode) {
194 if (SDNode *N = Select(bvNode))
218 if (SDNode *N = SelectCode(Dummy.getValue().getNode()))
225 SDNode *Select(SDNode *N);
228 SDNode *SelectSHLi64(SDNode *N, EVT OpVT);
231 SDNode *SelectSRLi64(SDNode *
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/external/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp118 SDNode *Select(SDNode *N);
119 SDNode *SelectIndexedLoad(SDNode *Op);
120 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
329 SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDNode *N) {
353 SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *O
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/external/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp87 SDNode *getGlobalBaseReg();
89 std::pair<SDNode*, SDNode*> SelectMULT(SDNode *N, unsigned Opc, DebugLoc dl,
92 SDNode *Select(SDNode *N);
95 bool SelectAddr(SDNode *Parent, SDValue N, SDValue &Base, SDValue &Offset);
98 inline SDValue getImm(const SDNode *Node, unsigned Imm) {
245 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
253 SelectAddr(SDNode *Paren
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/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelDAGToDAG.cpp81 SDNode *getGlobalBaseReg();
82 SDNode *Select(SDNode *N);
100 static bool isIntS32Immediate(SDNode *N, int32_t &Imm) {
182 SDNode *MBlazeDAGToDAGISel::getGlobalBaseReg() {
189 SDNode* MBlazeDAGToDAGISel::Select(SDNode *Node) {
250 SDNode *ResNode = CurDAG->getMachineNode(MBlaze::BRLID, dl, MVT::Other,
262 SDNode *ResNode = SelectCode(Node);
/external/llvm/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp49 SDNode *Select(SDNode *N);
50 SDNode *SelectBRIND(SDNode *N);
58 inline bool immMskBitp(SDNode *inN) const {
155 SDNode *XCoreDAGToDAGISel::Select(SDNode *N) {
173 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
225 if (SDNode *ResNode = SelectBRIND(N))
260 SDNode *XCoreDAGToDAGISe
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/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h30 class SDNode;
486 virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
487 SmallVectorImpl<SDNode*> &NewNodes) const {
508 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
521 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
665 SDNode *DefNode, unsigned DefIdx,
666 SDNode *UseNode, unsigned UseIdx) const = 0;
685 SDNode *Nod
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/external/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp44 SDNode *Select(SDNode *N);
64 SDNode* getGlobalBaseReg();
68 SDNode* SparcDAGToDAGISel::getGlobalBaseReg() {
137 SDNode *SparcDAGToDAGISel::Select(SDNode *N) {
175 SDNode *Mul = CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::Glue,

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