Searched refs:imm8 (Results 1 - 25 of 25) sorted by relevance

/external/valgrind/main/none/tests/x86/
H A Dinsn_basic.def21 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
22 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
23 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
24 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
25 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
26 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
33 adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
34 adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
47 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
48 adcl eflags[0x1,0x1] : imm8[1
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H A Dgen_insn_test.pl405 elsif ($arg =~ /^(imm8|imm16|imm32)\[([^\]]+)\]$/)
/external/valgrind/main/VEX/priv/
H A Dguest_generic_x87.h108 UInt imm8, Bool isxSTRM );
H A Dguest_generic_x87.c695 imm8 is the original immediate from the instruction. isSTRM
699 If the given imm8 case can be handled, the return value is True.
708 UInt imm8, Bool isxSTRM )
710 vassert(imm8 < 0x80);
714 /* Explicitly reject any imm8 values that haven't been validated,
717 switch (imm8) {
726 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format
727 UInt agg = (imm8 >> 2) & 3; // imm8[
704 compute_PCMPxSTRx( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument
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H A Dhost_arm_defs.h153 ARMam2_RI=3, /* reg +/- imm8 */
229 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */
239 UShort imm8; member in struct:__anon11744::__anon11745::__anon11746
249 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 );
284 /* imm8 = abcdefgh, B = NOT(b);
309 UInt imm8; member in struct:__anon11753
313 extern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 );
H A Dguest_amd64_toIR.c7093 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */
8394 Int imm8, Bool all_lanes, Int sz )
8396 imm8 &= 7;
8399 if (imm8 >= 4) {
8401 imm8 -= 4;
8405 switch (imm8) {
8414 switch (imm8) {
8423 switch (imm8) {
8432 switch (imm8) {
8450 Int alen, imm8; local
8393 findSSECmpOp( Bool* needNot, IROp* op, Int imm8, Bool all_lanes, Int sz ) argument
14027 Int imm8; local
14080 Int imm8; local
14128 Int imm8; local
14183 Int imm8; local
14241 Int imm8; local
14300 Int imm8; local
14367 Int imm8; local
14452 Int imm8; local
14749 Int imm8; local
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H A Dguest_arm_toIR.c2446 IRExpr* mk_EA_reg_plusminus_imm8 ( UInt rN, UInt bU, UInt imm8, argument
2451 vassert(imm8 < 0x100);
2453 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm8);
2457 mkU32(imm8) );
2557 UInt imm1, UInt imm3, UInt imm8 )
2561 vassert(imm8 < (1<<8));
2562 UInt i_imm3_a = (imm1 << 4) | (imm3 << 1) | ((imm8 >> 7) & 1);
2563 UInt abcdefgh = imm8;
2564 UInt lbcdefgh = imm8 | 0x80;
2596 UInt imm8 local
10985 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local
11001 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local
12758 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local
13784 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local
15024 UInt imm8 = INSN0(7,0); local
15529 UInt imm8 = INSN0(7,0); local
15541 UInt imm8 = INSN0(7,0); local
15583 UInt imm8 = INSN0(7,0); local
15691 UInt imm8 = INSN0(7,0); local
16838 UInt imm8 = INSN1(7,0); local
17267 UInt imm8 = INSN1(7,0); local
17898 UInt imm8 = INSN1(7,0); local
17963 UInt imm8 = INSN1(7,0); local
18100 UInt imm8 = INSN1(7,0); local
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H A Dhost_arm_defs.c437 ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ) { argument
440 ri84->ARMri84.I84.imm8 = imm8;
442 vassert(imm8 >= 0 && imm8 <= 255);
456 vex_printf("0x%x", ROR32(ri84->ARMri84.I84.imm8,
547 ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ) {
550 i->imm8 = imm8;
556 ULong y, x = imm->imm8;
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H A Dguest_amd64_helpers.c2822 opc_and_imm contains (4th byte of opcode << 8) | the-imm8-byte so
2860 HWord imm8 = opc4_and_imm & 0xFF; local
2864 vassert((imm8 & 1) == 0); /* we support byte-size cases only */
2901 zmaskL, zmaskR, imm8, (Bool)isxSTRM
2904 // front end shouldn't pass us any imm8 variants we can't
H A Dhost_amd64_isel.c1882 /* Add64( Add64(expr1, Shl64(expr2, imm8)), simm32 ) */
1896 IRExpr* imm8 = mi.bindee[2]; local
1898 if (imm8->tag == Iex_Const
1899 && imm8->Iex.Const.con->tag == Ico_U8
1900 && imm8->Iex.Const.con->Ico.U8 < 4
1901 /* imm8 is OK, now check simm32 */
1905 UInt shift = imm8->Iex.Const.con->Ico.U8;
H A Dguest_x86_toIR.c5953 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */
7109 Int imm8, Bool all_lanes, Int sz )
7111 imm8 &= 7;
7114 if (imm8 >= 4) {
7116 imm8 -= 4;
7120 switch (imm8) {
7129 switch (imm8) {
7138 switch (imm8) {
7147 switch (imm8) {
7164 Int alen, imm8; local
7108 findSSECmpOp( Bool* needNot, IROp* op, Int imm8, Bool all_lanes, Int sz ) argument
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/external/valgrind/main/none/tests/amd64/
H A Dinsn_mmx.def72 pslld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0]
75 psllq imm8[4] mm.uq[0x0123456789abcdef] => 1.uq[0x123456789abcdef0]
78 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
81 psrad imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x00123456,0xf89abcde]
84 psraw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x0012,0x0456,0xf89a,0xfcde]
87 psrld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x00123456,0x089abcde]
90 psrlq imm8[4] mm.uq[0x0123456789abcdef] => 1.uq[0x00123456789abcde]
93 psrlw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x0012,0x0456,0x089a,0x0cde]
H A Dpcmpstr64.c182 imm8 is the original immediate from the instruction. isSTRM
186 If the given imm8 case can be handled, the return value is True.
195 UInt imm8, Bool isSTRM )
197 assert(imm8 < 0x80);
201 /* Explicitly reject any imm8 values that haven't been validated,
204 switch (imm8) {
213 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format
214 UInt agg = (imm8 >> 2) & 3; // imm8[
191 pcmpXstrX_WRK( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isSTRM ) argument
1459 pcmpXstrX_WRK( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isSTRM ) argument
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H A Dgen_insn_test.pl428 elsif ($arg =~ /^(imm8|imm16|imm32|imm64)\[([^\]]+)\]$/)
/external/v8/src/ia32/
H A Dassembler-ia32.cc585 void Assembler::mov_b(const Operand& dst, int8_t imm8) { argument
589 EMIT(imm8);
819 void Assembler::cmpb(const Operand& op, int8_t imm8) { argument
827 EMIT(imm8);
1040 void Assembler::rcl(Register dst, uint8_t imm8) { argument
1042 ASSERT(is_uint5(imm8)); // illegal shift count
1043 if (imm8 == 1) {
1049 EMIT(imm8);
1054 void Assembler::rcr(Register dst, uint8_t imm8) { argument
1056 ASSERT(is_uint5(imm8)); // illega
1068 sar(Register dst, uint8_t imm8) argument
1104 shl(Register dst, uint8_t imm8) argument
1133 shr(Register dst, uint8_t imm8) argument
1181 uint8_t imm8 = imm.x_; local
1225 test_b(const Operand& op, uint8_t imm8) argument
2272 extractps(Register dst, XMMRegister src, byte imm8) argument
2513 emit_arith_b(int op1, int op2, Register dst, int imm8) argument
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H A Ddisasm-ia32.cc583 int imm8 = -1; local
598 imm8 = 1;
600 imm8 = *(data+2);
607 if (imm8 > 0) {
608 AppendToBuffer("%d", imm8);
1101 case 0xC6: // imm8
1200 int8_t imm8 = static_cast<int8_t>(data[1]); local
1204 static_cast<int>(imm8));
1210 int8_t imm8 = static_cast<int8_t>(data[1]); local
1214 static_cast<int>(imm8));
1220 int8_t imm8 = static_cast<int8_t>(data[1]); local
1230 int8_t imm8 = static_cast<int8_t>(data[1]); local
1293 int8_t imm8 = static_cast<int8_t>(data[1]); local
1314 int8_t imm8 = static_cast<int8_t>(data[1]); local
[all...]
H A Dassembler-ia32.h693 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); }
694 void mov_b(const Operand& dst, int8_t imm8);
755 void cmpb(Register reg, int8_t imm8) { cmpb(Operand(reg), imm8); }
756 void cmpb(const Operand& op, int8_t imm8);
805 void rcl(Register dst, uint8_t imm8);
806 void rcr(Register dst, uint8_t imm8);
808 void sar(Register dst, uint8_t imm8);
816 void shl(Register dst, uint8_t imm8);
[all...]
/external/webkit/Source/JavaScriptCore/assembler/
H A DSH4Assembler.h470 void addlImm8r(int imm8, RegisterID dst) argument
472 ASSERT((imm8 <= 127) && (imm8 >= -128));
474 uint16_t opc = getOpcodeGroup3(ADDIMM_OPCODE, dst, imm8);
484 void andlImm8r(int imm8, RegisterID dst) argument
486 ASSERT((imm8 <= 255) && (imm8 >= 0));
489 uint16_t opc = getOpcodeGroup5(ANDIMM_OPCODE, imm8);
517 void orlImm8r(int imm8, RegisterID dst) argument
519 ASSERT((imm8 <
544 xorlImm8r(int imm8, RegisterID dst) argument
1024 movImm8(int imm8, RegisterID dst) argument
1152 movlImm8r(int imm8, RegisterID dst) argument
[all...]
H A DARMv7Assembler.h189 unsigned imm8 : 8;
2186 return (imm.m_value.imm3 << 12) | (rd << 8) | imm.m_value.imm8;
/external/v8/src/x64/
H A Dassembler-x64.h996 void rcl(Register dst, Immediate imm8) {
997 shift(dst, imm8, 0x2);
1000 void rol(Register dst, Immediate imm8) {
1001 shift(dst, imm8, 0x0);
1004 void rcr(Register dst, Immediate imm8) {
1005 shift(dst, imm8, 0x3);
1008 void ror(Register dst, Immediate imm8) {
1009 shift(dst, imm8, 0x1);
1313 void extractps(Register dst, XMMRegister src, byte imm8);
H A Ddisasm-x64.cc738 int imm8 = -1; local
773 imm8 = 1;
775 imm8 = *(data + 2);
786 AppendToBuffer("%d", imm8);
1028 AppendToBuffer("extractps "); // reg/m32, xmm, imm8
1034 // roundsd xmm, xmm/m64, imm8
1506 case 0xC6: // imm8
1590 // mov reg8,imm8 or mov reg32,imm32
H A Dassembler-x64.cc1005 void Assembler::cmpb_al(Immediate imm8) { argument
1006 ASSERT(is_int8(imm8.value_) || is_uint8(imm8.value_));
1009 emit(imm8.value_);
2591 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { argument
2593 ASSERT(is_uint8(imm8));
2601 emit(imm8);
/external/qemu/
H A Darm-dis.c3369 unsigned int bits = 0, imm, imm8, mod; local
3373 imm8 = (bits & 0x0ff);
3377 case 0: imm = imm8; break;
3378 case 1: imm = ((imm8<<16) | imm8); break;
3379 case 2: imm = ((imm8<<24) | (imm8 << 8)); break;
3380 case 3: imm = ((imm8<<24) | (imm8 << 16) | (imm8 <<
[all...]
/external/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.c1409 uint8_t imm8; local
1429 if (consumeByte(insn, &imm8))
1431 insn->immediates[insn->numImmediatesConsumed] = imm8;
/external/v8/src/arm/
H A Dassembler-arm.cc724 uint32_t imm8 = (imm32 << 2*rot) | (imm32 >> (32 - 2*rot));
725 if ((imm8 <= 0xff)) {
727 *immed_8 = imm8;

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