TargetInfo.cpp revision 117e3f4cd4d6ea41c3202da8729f94168c5c8239
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/Target/TargetData.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39ABIInfo::~ABIInfo() {} 40 41ASTContext &ABIInfo::getContext() const { 42 return CGT.getContext(); 43} 44 45llvm::LLVMContext &ABIInfo::getVMContext() const { 46 return CGT.getLLVMContext(); 47} 48 49const llvm::TargetData &ABIInfo::getTargetData() const { 50 return CGT.getTargetData(); 51} 52 53 54void ABIArgInfo::dump() const { 55 llvm::raw_ostream &OS = llvm::errs(); 56 OS << "(ABIArgInfo Kind="; 57 switch (TheKind) { 58 case Direct: 59 OS << "Direct Type="; 60 if (const llvm::Type *Ty = getCoerceToType()) 61 Ty->print(OS); 62 else 63 OS << "null"; 64 break; 65 case Extend: 66 OS << "Extend"; 67 break; 68 case Ignore: 69 OS << "Ignore"; 70 break; 71 case Indirect: 72 OS << "Indirect Align=" << getIndirectAlign() 73 << " Byal=" << getIndirectByVal(); 74 break; 75 case Expand: 76 OS << "Expand"; 77 break; 78 } 79 OS << ")\n"; 80} 81 82TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 83 84static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 85 86/// isEmptyField - Return true iff a the field is "empty", that is it 87/// is an unnamed bit-field or an (array of) empty record(s). 88static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 89 bool AllowArrays) { 90 if (FD->isUnnamedBitfield()) 91 return true; 92 93 QualType FT = FD->getType(); 94 95 // Constant arrays of empty records count as empty, strip them off. 96 if (AllowArrays) 97 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 98 FT = AT->getElementType(); 99 100 const RecordType *RT = FT->getAs<RecordType>(); 101 if (!RT) 102 return false; 103 104 // C++ record fields are never empty, at least in the Itanium ABI. 105 // 106 // FIXME: We should use a predicate for whether this behavior is true in the 107 // current ABI. 108 if (isa<CXXRecordDecl>(RT->getDecl())) 109 return false; 110 111 return isEmptyRecord(Context, FT, AllowArrays); 112} 113 114/// isEmptyRecord - Return true iff a structure contains only empty 115/// fields. Note that a structure with a flexible array member is not 116/// considered empty. 117static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 118 const RecordType *RT = T->getAs<RecordType>(); 119 if (!RT) 120 return 0; 121 const RecordDecl *RD = RT->getDecl(); 122 if (RD->hasFlexibleArrayMember()) 123 return false; 124 125 // If this is a C++ record, check the bases first. 126 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 127 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 128 e = CXXRD->bases_end(); i != e; ++i) 129 if (!isEmptyRecord(Context, i->getType(), true)) 130 return false; 131 132 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 133 i != e; ++i) 134 if (!isEmptyField(Context, *i, AllowArrays)) 135 return false; 136 return true; 137} 138 139/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 140/// a non-trivial destructor or a non-trivial copy constructor. 141static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 142 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 143 if (!RD) 144 return false; 145 146 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 147} 148 149/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 150/// a record type with either a non-trivial destructor or a non-trivial copy 151/// constructor. 152static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 153 const RecordType *RT = T->getAs<RecordType>(); 154 if (!RT) 155 return false; 156 157 return hasNonTrivialDestructorOrCopyConstructor(RT); 158} 159 160/// isSingleElementStruct - Determine if a structure is a "single 161/// element struct", i.e. it has exactly one non-empty field or 162/// exactly one field which is itself a single element 163/// struct. Structures with flexible array members are never 164/// considered single element structs. 165/// 166/// \return The field declaration for the single non-empty field, if 167/// it exists. 168static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 169 const RecordType *RT = T->getAsStructureType(); 170 if (!RT) 171 return 0; 172 173 const RecordDecl *RD = RT->getDecl(); 174 if (RD->hasFlexibleArrayMember()) 175 return 0; 176 177 const Type *Found = 0; 178 179 // If this is a C++ record, check the bases first. 180 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 181 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 182 e = CXXRD->bases_end(); i != e; ++i) { 183 // Ignore empty records. 184 if (isEmptyRecord(Context, i->getType(), true)) 185 continue; 186 187 // If we already found an element then this isn't a single-element struct. 188 if (Found) 189 return 0; 190 191 // If this is non-empty and not a single element struct, the composite 192 // cannot be a single element struct. 193 Found = isSingleElementStruct(i->getType(), Context); 194 if (!Found) 195 return 0; 196 } 197 } 198 199 // Check for single element. 200 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 201 i != e; ++i) { 202 const FieldDecl *FD = *i; 203 QualType FT = FD->getType(); 204 205 // Ignore empty fields. 206 if (isEmptyField(Context, FD, true)) 207 continue; 208 209 // If we already found an element then this isn't a single-element 210 // struct. 211 if (Found) 212 return 0; 213 214 // Treat single element arrays as the element. 215 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 216 if (AT->getSize().getZExtValue() != 1) 217 break; 218 FT = AT->getElementType(); 219 } 220 221 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 222 Found = FT.getTypePtr(); 223 } else { 224 Found = isSingleElementStruct(FT, Context); 225 if (!Found) 226 return 0; 227 } 228 } 229 230 return Found; 231} 232 233static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 234 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 235 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 236 !Ty->isBlockPointerType()) 237 return false; 238 239 uint64_t Size = Context.getTypeSize(Ty); 240 return Size == 32 || Size == 64; 241} 242 243/// canExpandIndirectArgument - Test whether an argument type which is to be 244/// passed indirectly (on the stack) would have the equivalent layout if it was 245/// expanded into separate arguments. If so, we prefer to do the latter to avoid 246/// inhibiting optimizations. 247/// 248// FIXME: This predicate is missing many cases, currently it just follows 249// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 250// should probably make this smarter, or better yet make the LLVM backend 251// capable of handling it. 252static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 253 // We can only expand structure types. 254 const RecordType *RT = Ty->getAs<RecordType>(); 255 if (!RT) 256 return false; 257 258 // We can only expand (C) structures. 259 // 260 // FIXME: This needs to be generalized to handle classes as well. 261 const RecordDecl *RD = RT->getDecl(); 262 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 263 return false; 264 265 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 266 i != e; ++i) { 267 const FieldDecl *FD = *i; 268 269 if (!is32Or64BitBasicType(FD->getType(), Context)) 270 return false; 271 272 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 273 // how to expand them yet, and the predicate for telling if a bitfield still 274 // counts as "basic" is more complicated than what we were doing previously. 275 if (FD->isBitField()) 276 return false; 277 } 278 279 return true; 280} 281 282namespace { 283/// DefaultABIInfo - The default implementation for ABI specific 284/// details. This implementation provides information which results in 285/// self-consistent and sensible LLVM IR generation, but does not 286/// conform to any particular ABI. 287class DefaultABIInfo : public ABIInfo { 288public: 289 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 290 291 ABIArgInfo classifyReturnType(QualType RetTy) const; 292 ABIArgInfo classifyArgumentType(QualType RetTy) const; 293 294 virtual void computeInfo(CGFunctionInfo &FI) const { 295 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 296 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 297 it != ie; ++it) 298 it->info = classifyArgumentType(it->type); 299 } 300 301 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 302 CodeGenFunction &CGF) const; 303}; 304 305class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 306public: 307 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 308 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 309}; 310 311llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 312 CodeGenFunction &CGF) const { 313 return 0; 314} 315 316ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 317 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 318 return ABIArgInfo::getIndirect(0); 319 320 // Treat an enum type as its underlying type. 321 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 322 Ty = EnumTy->getDecl()->getIntegerType(); 323 324 return (Ty->isPromotableIntegerType() ? 325 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 326} 327 328//===----------------------------------------------------------------------===// 329// X86-32 ABI Implementation 330//===----------------------------------------------------------------------===// 331 332/// X86_32ABIInfo - The X86-32 ABI information. 333class X86_32ABIInfo : public ABIInfo { 334 bool IsDarwinVectorABI; 335 bool IsSmallStructInRegABI; 336 337 static bool isRegisterSize(unsigned Size) { 338 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 339 } 340 341 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 342 343 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 344 /// such that the argument will be passed in memory. 345 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 346 347public: 348 349 ABIArgInfo classifyReturnType(QualType RetTy) const; 350 ABIArgInfo classifyArgumentType(QualType RetTy) const; 351 352 virtual void computeInfo(CGFunctionInfo &FI) const { 353 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 354 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 355 it != ie; ++it) 356 it->info = classifyArgumentType(it->type); 357 } 358 359 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 360 CodeGenFunction &CGF) const; 361 362 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 363 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 364}; 365 366class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 367public: 368 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 369 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 370 371 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 372 CodeGen::CodeGenModule &CGM) const; 373 374 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 375 // Darwin uses different dwarf register numbers for EH. 376 if (CGM.isTargetDarwin()) return 5; 377 378 return 4; 379 } 380 381 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 382 llvm::Value *Address) const; 383}; 384 385} 386 387/// shouldReturnTypeInRegister - Determine if the given type should be 388/// passed in a register (for the Darwin ABI). 389bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 390 ASTContext &Context) { 391 uint64_t Size = Context.getTypeSize(Ty); 392 393 // Type must be register sized. 394 if (!isRegisterSize(Size)) 395 return false; 396 397 if (Ty->isVectorType()) { 398 // 64- and 128- bit vectors inside structures are not returned in 399 // registers. 400 if (Size == 64 || Size == 128) 401 return false; 402 403 return true; 404 } 405 406 // If this is a builtin, pointer, enum, complex type, member pointer, or 407 // member function pointer it is ok. 408 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 409 Ty->isAnyComplexType() || Ty->isEnumeralType() || 410 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 411 return true; 412 413 // Arrays are treated like records. 414 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 415 return shouldReturnTypeInRegister(AT->getElementType(), Context); 416 417 // Otherwise, it must be a record type. 418 const RecordType *RT = Ty->getAs<RecordType>(); 419 if (!RT) return false; 420 421 // FIXME: Traverse bases here too. 422 423 // Structure types are passed in register if all fields would be 424 // passed in a register. 425 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 426 e = RT->getDecl()->field_end(); i != e; ++i) { 427 const FieldDecl *FD = *i; 428 429 // Empty fields are ignored. 430 if (isEmptyField(Context, FD, true)) 431 continue; 432 433 // Check fields recursively. 434 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 435 return false; 436 } 437 438 return true; 439} 440 441ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 442 if (RetTy->isVoidType()) 443 return ABIArgInfo::getIgnore(); 444 445 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 446 // On Darwin, some vectors are returned in registers. 447 if (IsDarwinVectorABI) { 448 uint64_t Size = getContext().getTypeSize(RetTy); 449 450 // 128-bit vectors are a special case; they are returned in 451 // registers and we need to make sure to pick a type the LLVM 452 // backend will like. 453 if (Size == 128) 454 return ABIArgInfo::getDirect(llvm::VectorType::get( 455 llvm::Type::getInt64Ty(getVMContext()), 2)); 456 457 // Always return in register if it fits in a general purpose 458 // register, or if it is 64 bits and has a single element. 459 if ((Size == 8 || Size == 16 || Size == 32) || 460 (Size == 64 && VT->getNumElements() == 1)) 461 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 462 Size)); 463 464 return ABIArgInfo::getIndirect(0); 465 } 466 467 return ABIArgInfo::getDirect(); 468 } 469 470 if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 471 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 472 // Structures with either a non-trivial destructor or a non-trivial 473 // copy constructor are always indirect. 474 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 475 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 476 477 // Structures with flexible arrays are always indirect. 478 if (RT->getDecl()->hasFlexibleArrayMember()) 479 return ABIArgInfo::getIndirect(0); 480 } 481 482 // If specified, structs and unions are always indirect. 483 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 484 return ABIArgInfo::getIndirect(0); 485 486 // Classify "single element" structs as their element type. 487 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 488 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 489 if (BT->isIntegerType()) { 490 // We need to use the size of the structure, padding 491 // bit-fields can adjust that to be larger than the single 492 // element type. 493 uint64_t Size = getContext().getTypeSize(RetTy); 494 return ABIArgInfo::getDirect( 495 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 496 } 497 498 if (BT->getKind() == BuiltinType::Float) { 499 assert(getContext().getTypeSize(RetTy) == 500 getContext().getTypeSize(SeltTy) && 501 "Unexpect single element structure size!"); 502 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 503 } 504 505 if (BT->getKind() == BuiltinType::Double) { 506 assert(getContext().getTypeSize(RetTy) == 507 getContext().getTypeSize(SeltTy) && 508 "Unexpect single element structure size!"); 509 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 510 } 511 } else if (SeltTy->isPointerType()) { 512 // FIXME: It would be really nice if this could come out as the proper 513 // pointer type. 514 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 515 return ABIArgInfo::getDirect(PtrTy); 516 } else if (SeltTy->isVectorType()) { 517 // 64- and 128-bit vectors are never returned in a 518 // register when inside a structure. 519 uint64_t Size = getContext().getTypeSize(RetTy); 520 if (Size == 64 || Size == 128) 521 return ABIArgInfo::getIndirect(0); 522 523 return classifyReturnType(QualType(SeltTy, 0)); 524 } 525 } 526 527 // Small structures which are register sized are generally returned 528 // in a register. 529 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 530 uint64_t Size = getContext().getTypeSize(RetTy); 531 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 532 } 533 534 return ABIArgInfo::getIndirect(0); 535 } 536 537 // Treat an enum type as its underlying type. 538 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 539 RetTy = EnumTy->getDecl()->getIntegerType(); 540 541 return (RetTy->isPromotableIntegerType() ? 542 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 543} 544 545ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 546 if (!ByVal) 547 return ABIArgInfo::getIndirect(0, false); 548 549 // Compute the byval alignment. We trust the back-end to honor the 550 // minimum ABI alignment for byval, to make cleaner IR. 551 const unsigned MinABIAlign = 4; 552 unsigned Align = getContext().getTypeAlign(Ty) / 8; 553 if (Align > MinABIAlign) 554 return ABIArgInfo::getIndirect(Align); 555 return ABIArgInfo::getIndirect(0); 556} 557 558ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 559 // FIXME: Set alignment on indirect arguments. 560 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 561 // Structures with flexible arrays are always indirect. 562 if (const RecordType *RT = Ty->getAs<RecordType>()) { 563 // Structures with either a non-trivial destructor or a non-trivial 564 // copy constructor are always indirect. 565 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 566 return getIndirectResult(Ty, /*ByVal=*/false); 567 568 if (RT->getDecl()->hasFlexibleArrayMember()) 569 return getIndirectResult(Ty); 570 } 571 572 // Ignore empty structs. 573 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 574 return ABIArgInfo::getIgnore(); 575 576 // Expand small (<= 128-bit) record types when we know that the stack layout 577 // of those arguments will match the struct. This is important because the 578 // LLVM backend isn't smart enough to remove byval, which inhibits many 579 // optimizations. 580 if (getContext().getTypeSize(Ty) <= 4*32 && 581 canExpandIndirectArgument(Ty, getContext())) 582 return ABIArgInfo::getExpand(); 583 584 return getIndirectResult(Ty); 585 } 586 587 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 588 Ty = EnumTy->getDecl()->getIntegerType(); 589 590 return (Ty->isPromotableIntegerType() ? 591 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 592} 593 594llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 595 CodeGenFunction &CGF) const { 596 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 597 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 598 599 CGBuilderTy &Builder = CGF.Builder; 600 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 601 "ap"); 602 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 603 llvm::Type *PTy = 604 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 605 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 606 607 uint64_t Offset = 608 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 609 llvm::Value *NextAddr = 610 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 611 "ap.next"); 612 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 613 614 return AddrTyped; 615} 616 617void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 618 llvm::GlobalValue *GV, 619 CodeGen::CodeGenModule &CGM) const { 620 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 621 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 622 // Get the LLVM function. 623 llvm::Function *Fn = cast<llvm::Function>(GV); 624 625 // Now add the 'alignstack' attribute with a value of 16. 626 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 627 } 628 } 629} 630 631bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 632 CodeGen::CodeGenFunction &CGF, 633 llvm::Value *Address) const { 634 CodeGen::CGBuilderTy &Builder = CGF.Builder; 635 llvm::LLVMContext &Context = CGF.getLLVMContext(); 636 637 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 638 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 639 640 // 0-7 are the eight integer registers; the order is different 641 // on Darwin (for EH), but the range is the same. 642 // 8 is %eip. 643 AssignToArrayRange(Builder, Address, Four8, 0, 8); 644 645 if (CGF.CGM.isTargetDarwin()) { 646 // 12-16 are st(0..4). Not sure why we stop at 4. 647 // These have size 16, which is sizeof(long double) on 648 // platforms with 8-byte alignment for that type. 649 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 650 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 651 652 } else { 653 // 9 is %eflags, which doesn't get a size on Darwin for some 654 // reason. 655 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 656 657 // 11-16 are st(0..5). Not sure why we stop at 5. 658 // These have size 12, which is sizeof(long double) on 659 // platforms with 4-byte alignment for that type. 660 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 661 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 662 } 663 664 return false; 665} 666 667//===----------------------------------------------------------------------===// 668// X86-64 ABI Implementation 669//===----------------------------------------------------------------------===// 670 671 672namespace { 673/// X86_64ABIInfo - The X86_64 ABI information. 674class X86_64ABIInfo : public ABIInfo { 675 enum Class { 676 Integer = 0, 677 SSE, 678 SSEUp, 679 X87, 680 X87Up, 681 ComplexX87, 682 NoClass, 683 Memory 684 }; 685 686 /// merge - Implement the X86_64 ABI merging algorithm. 687 /// 688 /// Merge an accumulating classification \arg Accum with a field 689 /// classification \arg Field. 690 /// 691 /// \param Accum - The accumulating classification. This should 692 /// always be either NoClass or the result of a previous merge 693 /// call. In addition, this should never be Memory (the caller 694 /// should just return Memory for the aggregate). 695 static Class merge(Class Accum, Class Field); 696 697 /// classify - Determine the x86_64 register classes in which the 698 /// given type T should be passed. 699 /// 700 /// \param Lo - The classification for the parts of the type 701 /// residing in the low word of the containing object. 702 /// 703 /// \param Hi - The classification for the parts of the type 704 /// residing in the high word of the containing object. 705 /// 706 /// \param OffsetBase - The bit offset of this type in the 707 /// containing object. Some parameters are classified different 708 /// depending on whether they straddle an eightbyte boundary. 709 /// 710 /// If a word is unused its result will be NoClass; if a type should 711 /// be passed in Memory then at least the classification of \arg Lo 712 /// will be Memory. 713 /// 714 /// The \arg Lo class will be NoClass iff the argument is ignored. 715 /// 716 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 717 /// also be ComplexX87. 718 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 719 720 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 721 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 722 unsigned IROffset, QualType SourceTy, 723 unsigned SourceOffset) const; 724 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 725 unsigned IROffset, QualType SourceTy, 726 unsigned SourceOffset) const; 727 728 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 729 /// such that the argument will be returned in memory. 730 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 731 732 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 733 /// such that the argument will be passed in memory. 734 ABIArgInfo getIndirectResult(QualType Ty) const; 735 736 ABIArgInfo classifyReturnType(QualType RetTy) const; 737 738 ABIArgInfo classifyArgumentType(QualType Ty, unsigned &neededInt, 739 unsigned &neededSSE) const; 740 741public: 742 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 743 744 virtual void computeInfo(CGFunctionInfo &FI) const; 745 746 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 747 CodeGenFunction &CGF) const; 748}; 749 750class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 751public: 752 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 753 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 754 755 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 756 return 7; 757 } 758 759 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 760 llvm::Value *Address) const { 761 CodeGen::CGBuilderTy &Builder = CGF.Builder; 762 llvm::LLVMContext &Context = CGF.getLLVMContext(); 763 764 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 765 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 766 767 // 0-15 are the 16 integer registers. 768 // 16 is %rip. 769 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 770 771 return false; 772 } 773}; 774 775} 776 777X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 778 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 779 // classified recursively so that always two fields are 780 // considered. The resulting class is calculated according to 781 // the classes of the fields in the eightbyte: 782 // 783 // (a) If both classes are equal, this is the resulting class. 784 // 785 // (b) If one of the classes is NO_CLASS, the resulting class is 786 // the other class. 787 // 788 // (c) If one of the classes is MEMORY, the result is the MEMORY 789 // class. 790 // 791 // (d) If one of the classes is INTEGER, the result is the 792 // INTEGER. 793 // 794 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 795 // MEMORY is used as class. 796 // 797 // (f) Otherwise class SSE is used. 798 799 // Accum should never be memory (we should have returned) or 800 // ComplexX87 (because this cannot be passed in a structure). 801 assert((Accum != Memory && Accum != ComplexX87) && 802 "Invalid accumulated classification during merge."); 803 if (Accum == Field || Field == NoClass) 804 return Accum; 805 if (Field == Memory) 806 return Memory; 807 if (Accum == NoClass) 808 return Field; 809 if (Accum == Integer || Field == Integer) 810 return Integer; 811 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 812 Accum == X87 || Accum == X87Up) 813 return Memory; 814 return SSE; 815} 816 817void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 818 Class &Lo, Class &Hi) const { 819 // FIXME: This code can be simplified by introducing a simple value class for 820 // Class pairs with appropriate constructor methods for the various 821 // situations. 822 823 // FIXME: Some of the split computations are wrong; unaligned vectors 824 // shouldn't be passed in registers for example, so there is no chance they 825 // can straddle an eightbyte. Verify & simplify. 826 827 Lo = Hi = NoClass; 828 829 Class &Current = OffsetBase < 64 ? Lo : Hi; 830 Current = Memory; 831 832 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 833 BuiltinType::Kind k = BT->getKind(); 834 835 if (k == BuiltinType::Void) { 836 Current = NoClass; 837 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 838 Lo = Integer; 839 Hi = Integer; 840 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 841 Current = Integer; 842 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 843 Current = SSE; 844 } else if (k == BuiltinType::LongDouble) { 845 Lo = X87; 846 Hi = X87Up; 847 } 848 // FIXME: _Decimal32 and _Decimal64 are SSE. 849 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 850 return; 851 } 852 853 if (const EnumType *ET = Ty->getAs<EnumType>()) { 854 // Classify the underlying integer type. 855 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 856 return; 857 } 858 859 if (Ty->hasPointerRepresentation()) { 860 Current = Integer; 861 return; 862 } 863 864 if (Ty->isMemberPointerType()) { 865 if (Ty->isMemberFunctionPointerType()) 866 Lo = Hi = Integer; 867 else 868 Current = Integer; 869 return; 870 } 871 872 if (const VectorType *VT = Ty->getAs<VectorType>()) { 873 uint64_t Size = getContext().getTypeSize(VT); 874 if (Size == 32) { 875 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 876 // float> as integer. 877 Current = Integer; 878 879 // If this type crosses an eightbyte boundary, it should be 880 // split. 881 uint64_t EB_Real = (OffsetBase) / 64; 882 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 883 if (EB_Real != EB_Imag) 884 Hi = Lo; 885 } else if (Size == 64) { 886 // gcc passes <1 x double> in memory. :( 887 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 888 return; 889 890 // gcc passes <1 x long long> as INTEGER. 891 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 892 Current = Integer; 893 else 894 Current = SSE; 895 896 // If this type crosses an eightbyte boundary, it should be 897 // split. 898 if (OffsetBase && OffsetBase != 64) 899 Hi = Lo; 900 } else if (Size == 128) { 901 Lo = SSE; 902 Hi = SSEUp; 903 } 904 return; 905 } 906 907 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 908 QualType ET = getContext().getCanonicalType(CT->getElementType()); 909 910 uint64_t Size = getContext().getTypeSize(Ty); 911 if (ET->isIntegralOrEnumerationType()) { 912 if (Size <= 64) 913 Current = Integer; 914 else if (Size <= 128) 915 Lo = Hi = Integer; 916 } else if (ET == getContext().FloatTy) 917 Current = SSE; 918 else if (ET == getContext().DoubleTy) 919 Lo = Hi = SSE; 920 else if (ET == getContext().LongDoubleTy) 921 Current = ComplexX87; 922 923 // If this complex type crosses an eightbyte boundary then it 924 // should be split. 925 uint64_t EB_Real = (OffsetBase) / 64; 926 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 927 if (Hi == NoClass && EB_Real != EB_Imag) 928 Hi = Lo; 929 930 return; 931 } 932 933 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 934 // Arrays are treated like structures. 935 936 uint64_t Size = getContext().getTypeSize(Ty); 937 938 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 939 // than two eightbytes, ..., it has class MEMORY. 940 if (Size > 128) 941 return; 942 943 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 944 // fields, it has class MEMORY. 945 // 946 // Only need to check alignment of array base. 947 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 948 return; 949 950 // Otherwise implement simplified merge. We could be smarter about 951 // this, but it isn't worth it and would be harder to verify. 952 Current = NoClass; 953 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 954 uint64_t ArraySize = AT->getSize().getZExtValue(); 955 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 956 Class FieldLo, FieldHi; 957 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 958 Lo = merge(Lo, FieldLo); 959 Hi = merge(Hi, FieldHi); 960 if (Lo == Memory || Hi == Memory) 961 break; 962 } 963 964 // Do post merger cleanup (see below). Only case we worry about is Memory. 965 if (Hi == Memory) 966 Lo = Memory; 967 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 968 return; 969 } 970 971 if (const RecordType *RT = Ty->getAs<RecordType>()) { 972 uint64_t Size = getContext().getTypeSize(Ty); 973 974 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 975 // than two eightbytes, ..., it has class MEMORY. 976 if (Size > 128) 977 return; 978 979 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 980 // copy constructor or a non-trivial destructor, it is passed by invisible 981 // reference. 982 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 983 return; 984 985 const RecordDecl *RD = RT->getDecl(); 986 987 // Assume variable sized types are passed in memory. 988 if (RD->hasFlexibleArrayMember()) 989 return; 990 991 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 992 993 // Reset Lo class, this will be recomputed. 994 Current = NoClass; 995 996 // If this is a C++ record, classify the bases first. 997 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 998 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 999 e = CXXRD->bases_end(); i != e; ++i) { 1000 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1001 "Unexpected base class!"); 1002 const CXXRecordDecl *Base = 1003 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1004 1005 // Classify this field. 1006 // 1007 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1008 // single eightbyte, each is classified separately. Each eightbyte gets 1009 // initialized to class NO_CLASS. 1010 Class FieldLo, FieldHi; 1011 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 1012 classify(i->getType(), Offset, FieldLo, FieldHi); 1013 Lo = merge(Lo, FieldLo); 1014 Hi = merge(Hi, FieldHi); 1015 if (Lo == Memory || Hi == Memory) 1016 break; 1017 } 1018 } 1019 1020 // Classify the fields one at a time, merging the results. 1021 unsigned idx = 0; 1022 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1023 i != e; ++i, ++idx) { 1024 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1025 bool BitField = i->isBitField(); 1026 1027 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1028 // fields, it has class MEMORY. 1029 // 1030 // Note, skip this test for bit-fields, see below. 1031 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1032 Lo = Memory; 1033 return; 1034 } 1035 1036 // Classify this field. 1037 // 1038 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1039 // exceeds a single eightbyte, each is classified 1040 // separately. Each eightbyte gets initialized to class 1041 // NO_CLASS. 1042 Class FieldLo, FieldHi; 1043 1044 // Bit-fields require special handling, they do not force the 1045 // structure to be passed in memory even if unaligned, and 1046 // therefore they can straddle an eightbyte. 1047 if (BitField) { 1048 // Ignore padding bit-fields. 1049 if (i->isUnnamedBitfield()) 1050 continue; 1051 1052 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1053 uint64_t Size = 1054 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1055 1056 uint64_t EB_Lo = Offset / 64; 1057 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1058 FieldLo = FieldHi = NoClass; 1059 if (EB_Lo) { 1060 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1061 FieldLo = NoClass; 1062 FieldHi = Integer; 1063 } else { 1064 FieldLo = Integer; 1065 FieldHi = EB_Hi ? Integer : NoClass; 1066 } 1067 } else 1068 classify(i->getType(), Offset, FieldLo, FieldHi); 1069 Lo = merge(Lo, FieldLo); 1070 Hi = merge(Hi, FieldHi); 1071 if (Lo == Memory || Hi == Memory) 1072 break; 1073 } 1074 1075 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1076 // 1077 // (a) If one of the classes is MEMORY, the whole argument is 1078 // passed in memory. 1079 // 1080 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1081 1082 // The first of these conditions is guaranteed by how we implement 1083 // the merge (just bail). 1084 // 1085 // The second condition occurs in the case of unions; for example 1086 // union { _Complex double; unsigned; }. 1087 if (Hi == Memory) 1088 Lo = Memory; 1089 if (Hi == SSEUp && Lo != SSE) 1090 Hi = SSE; 1091 } 1092} 1093 1094ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1095 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1096 // place naturally. 1097 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1098 // Treat an enum type as its underlying type. 1099 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1100 Ty = EnumTy->getDecl()->getIntegerType(); 1101 1102 return (Ty->isPromotableIntegerType() ? 1103 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1104 } 1105 1106 return ABIArgInfo::getIndirect(0); 1107} 1108 1109ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1110 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1111 // place naturally. 1112 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1113 // Treat an enum type as its underlying type. 1114 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1115 Ty = EnumTy->getDecl()->getIntegerType(); 1116 1117 return (Ty->isPromotableIntegerType() ? 1118 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1119 } 1120 1121 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1122 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1123 1124 // Compute the byval alignment. We trust the back-end to honor the 1125 // minimum ABI alignment for byval, to make cleaner IR. 1126 const unsigned MinABIAlign = 8; 1127 unsigned Align = getContext().getTypeAlign(Ty) / 8; 1128 if (Align > MinABIAlign) 1129 return ABIArgInfo::getIndirect(Align); 1130 return ABIArgInfo::getIndirect(0); 1131} 1132 1133/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1134/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1135/// vector register. 1136const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1137 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1138 1139 // Wrapper structs that just contain vectors are passed just like vectors, 1140 // strip them off if present. 1141 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1142 while (STy && STy->getNumElements() == 1) { 1143 IRType = STy->getElementType(0); 1144 STy = dyn_cast<llvm::StructType>(IRType); 1145 } 1146 1147 // If the preferred type is a 16-byte vector, prefer to pass it. 1148 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1149 const llvm::Type *EltTy = VT->getElementType(); 1150 if (VT->getBitWidth() == 128 && 1151 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1152 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1153 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1154 EltTy->isIntegerTy(128))) 1155 return VT; 1156 } 1157 1158 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1159} 1160 1161/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1162/// is known to either be off the end of the specified type or being in 1163/// alignment padding. The user type specified is known to be at most 128 bits 1164/// in size, and have passed through X86_64ABIInfo::classify with a successful 1165/// classification that put one of the two halves in the INTEGER class. 1166/// 1167/// It is conservatively correct to return false. 1168static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1169 unsigned EndBit, ASTContext &Context) { 1170 // If the bytes being queried are off the end of the type, there is no user 1171 // data hiding here. This handles analysis of builtins, vectors and other 1172 // types that don't contain interesting padding. 1173 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1174 if (TySize <= StartBit) 1175 return true; 1176 1177 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1178 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1179 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1180 1181 // Check each element to see if the element overlaps with the queried range. 1182 for (unsigned i = 0; i != NumElts; ++i) { 1183 // If the element is after the span we care about, then we're done.. 1184 unsigned EltOffset = i*EltSize; 1185 if (EltOffset >= EndBit) break; 1186 1187 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1188 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1189 EndBit-EltOffset, Context)) 1190 return false; 1191 } 1192 // If it overlaps no elements, then it is safe to process as padding. 1193 return true; 1194 } 1195 1196 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1197 const RecordDecl *RD = RT->getDecl(); 1198 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1199 1200 // If this is a C++ record, check the bases first. 1201 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1202 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1203 e = CXXRD->bases_end(); i != e; ++i) { 1204 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1205 "Unexpected base class!"); 1206 const CXXRecordDecl *Base = 1207 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1208 1209 // If the base is after the span we care about, ignore it. 1210 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffset(Base); 1211 if (BaseOffset >= EndBit) continue; 1212 1213 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1214 if (!BitsContainNoUserData(i->getType(), BaseStart, 1215 EndBit-BaseOffset, Context)) 1216 return false; 1217 } 1218 } 1219 1220 // Verify that no field has data that overlaps the region of interest. Yes 1221 // this could be sped up a lot by being smarter about queried fields, 1222 // however we're only looking at structs up to 16 bytes, so we don't care 1223 // much. 1224 unsigned idx = 0; 1225 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1226 i != e; ++i, ++idx) { 1227 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1228 1229 // If we found a field after the region we care about, then we're done. 1230 if (FieldOffset >= EndBit) break; 1231 1232 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1233 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1234 Context)) 1235 return false; 1236 } 1237 1238 // If nothing in this record overlapped the area of interest, then we're 1239 // clean. 1240 return true; 1241 } 1242 1243 return false; 1244} 1245 1246/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1247/// float member at the specified offset. For example, {int,{float}} has a 1248/// float at offset 4. It is conservatively correct for this routine to return 1249/// false. 1250static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1251 const llvm::TargetData &TD) { 1252 // Base case if we find a float. 1253 if (IROffset == 0 && IRType->isFloatTy()) 1254 return true; 1255 1256 // If this is a struct, recurse into the field at the specified offset. 1257 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1258 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1259 unsigned Elt = SL->getElementContainingOffset(IROffset); 1260 IROffset -= SL->getElementOffset(Elt); 1261 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1262 } 1263 1264 // If this is an array, recurse into the field at the specified offset. 1265 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1266 const llvm::Type *EltTy = ATy->getElementType(); 1267 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1268 IROffset -= IROffset/EltSize*EltSize; 1269 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1270 } 1271 1272 return false; 1273} 1274 1275 1276/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1277/// low 8 bytes of an XMM register, corresponding to the SSE class. 1278const llvm::Type *X86_64ABIInfo:: 1279GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1280 QualType SourceTy, unsigned SourceOffset) const { 1281 // The only three choices we have are either double, <2 x float>, or float. We 1282 // pass as float if the last 4 bytes is just padding. This happens for 1283 // structs that contain 3 floats. 1284 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1285 SourceOffset*8+64, getContext())) 1286 return llvm::Type::getFloatTy(getVMContext()); 1287 1288 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1289 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1290 // case. 1291 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1292 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) { 1293 // FIXME: <2 x float> doesn't pass as one XMM register yet. Don't enable 1294 // this code until it does. 1295 //return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1296 1297 } 1298 1299 return llvm::Type::getDoubleTy(getVMContext()); 1300} 1301 1302 1303/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1304/// an 8-byte GPR. This means that we either have a scalar or we are talking 1305/// about the high or low part of an up-to-16-byte struct. This routine picks 1306/// the best LLVM IR type to represent this, which may be i64 or may be anything 1307/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1308/// etc). 1309/// 1310/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1311/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1312/// the 8-byte value references. PrefType may be null. 1313/// 1314/// SourceTy is the source level type for the entire argument. SourceOffset is 1315/// an offset into this that we're processing (which is always either 0 or 8). 1316/// 1317const llvm::Type *X86_64ABIInfo:: 1318GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1319 QualType SourceTy, unsigned SourceOffset) const { 1320 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1321 // returning an 8-byte unit starting with it. See if we can safely use it. 1322 if (IROffset == 0) { 1323 // Pointers and int64's always fill the 8-byte unit. 1324 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1325 return IRType; 1326 1327 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1328 // goodness in the source type is just tail padding. This is allowed to 1329 // kick in for struct {double,int} on the int, but not on 1330 // struct{double,int,int} because we wouldn't return the second int. We 1331 // have to do this analysis on the source type because we can't depend on 1332 // unions being lowered a specific way etc. 1333 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1334 IRType->isIntegerTy(32)) { 1335 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1336 1337 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1338 SourceOffset*8+64, getContext())) 1339 return IRType; 1340 } 1341 } 1342 1343 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1344 // If this is a struct, recurse into the field at the specified offset. 1345 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1346 if (IROffset < SL->getSizeInBytes()) { 1347 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1348 IROffset -= SL->getElementOffset(FieldIdx); 1349 1350 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1351 SourceTy, SourceOffset); 1352 } 1353 } 1354 1355 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1356 const llvm::Type *EltTy = ATy->getElementType(); 1357 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1358 unsigned EltOffset = IROffset/EltSize*EltSize; 1359 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1360 SourceOffset); 1361 } 1362 1363 // Okay, we don't have any better idea of what to pass, so we pass this in an 1364 // integer register that isn't too big to fit the rest of the struct. 1365 unsigned TySizeInBytes = 1366 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1367 1368 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1369 1370 // It is always safe to classify this as an integer type up to i64 that 1371 // isn't larger than the structure. 1372 return llvm::IntegerType::get(getVMContext(), 1373 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1374} 1375 1376ABIArgInfo X86_64ABIInfo:: 1377classifyReturnType(QualType RetTy) const { 1378 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1379 // classification algorithm. 1380 X86_64ABIInfo::Class Lo, Hi; 1381 classify(RetTy, 0, Lo, Hi); 1382 1383 // Check some invariants. 1384 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1385 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1386 1387 const llvm::Type *ResType = 0; 1388 switch (Lo) { 1389 case NoClass: 1390 if (Hi == NoClass) 1391 return ABIArgInfo::getIgnore(); 1392 // If the low part is just padding, it takes no register, leave ResType 1393 // null. 1394 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1395 "Unknown missing lo part"); 1396 break; 1397 1398 case SSEUp: 1399 case X87Up: 1400 assert(0 && "Invalid classification for lo word."); 1401 1402 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1403 // hidden argument. 1404 case Memory: 1405 return getIndirectReturnResult(RetTy); 1406 1407 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1408 // available register of the sequence %rax, %rdx is used. 1409 case Integer: 1410 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1411 RetTy, 0); 1412 1413 // If we have a sign or zero extended integer, make sure to return Extend 1414 // so that the parameter gets the right LLVM IR attributes. 1415 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1416 // Treat an enum type as its underlying type. 1417 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1418 RetTy = EnumTy->getDecl()->getIntegerType(); 1419 1420 if (RetTy->isIntegralOrEnumerationType() && 1421 RetTy->isPromotableIntegerType()) 1422 return ABIArgInfo::getExtend(); 1423 } 1424 break; 1425 1426 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1427 // available SSE register of the sequence %xmm0, %xmm1 is used. 1428 case SSE: 1429 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1430 break; 1431 1432 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1433 // returned on the X87 stack in %st0 as 80-bit x87 number. 1434 case X87: 1435 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1436 break; 1437 1438 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1439 // part of the value is returned in %st0 and the imaginary part in 1440 // %st1. 1441 case ComplexX87: 1442 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1443 ResType = llvm::StructType::get(getVMContext(), 1444 llvm::Type::getX86_FP80Ty(getVMContext()), 1445 llvm::Type::getX86_FP80Ty(getVMContext()), 1446 NULL); 1447 break; 1448 } 1449 1450 switch (Hi) { 1451 // Memory was handled previously and X87 should 1452 // never occur as a hi class. 1453 case Memory: 1454 case X87: 1455 assert(0 && "Invalid classification for hi word."); 1456 1457 case ComplexX87: // Previously handled. 1458 case NoClass: 1459 break; 1460 1461 case Integer: { 1462 const llvm::Type *HiType = 1463 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1464 if (Lo == NoClass) // Return HiType at offset 8 in memory. 1465 return ABIArgInfo::getDirect(HiType, 8); 1466 1467 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1468 break; 1469 } 1470 case SSE: { 1471 const llvm::Type *HiType = 1472 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1473 if (Lo == NoClass) // Return HiType at offset 8 in memory. 1474 return ABIArgInfo::getDirect(HiType, 8); 1475 1476 ResType = llvm::StructType::get(getVMContext(), ResType, HiType,NULL); 1477 break; 1478 } 1479 1480 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1481 // is passed in the upper half of the last used SSE register. 1482 // 1483 // SSEUP should always be preceeded by SSE, just widen. 1484 case SSEUp: 1485 assert(Lo == SSE && "Unexpected SSEUp classification."); 1486 ResType = Get16ByteVectorType(RetTy); 1487 break; 1488 1489 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1490 // returned together with the previous X87 value in %st0. 1491 case X87Up: 1492 // If X87Up is preceeded by X87, we don't need to do 1493 // anything. However, in some cases with unions it may not be 1494 // preceeded by X87. In such situations we follow gcc and pass the 1495 // extra bits in an SSE reg. 1496 if (Lo != X87) { 1497 const llvm::Type *HiType = 1498 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1499 if (Lo == NoClass) // Return HiType at offset 8 in memory. 1500 return ABIArgInfo::getDirect(HiType, 8); 1501 1502 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1503 } 1504 break; 1505 } 1506 1507 return ABIArgInfo::getDirect(ResType); 1508} 1509 1510ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1511 unsigned &neededSSE) const { 1512 X86_64ABIInfo::Class Lo, Hi; 1513 classify(Ty, 0, Lo, Hi); 1514 1515 // Check some invariants. 1516 // FIXME: Enforce these by construction. 1517 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1518 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1519 1520 neededInt = 0; 1521 neededSSE = 0; 1522 const llvm::Type *ResType = 0; 1523 switch (Lo) { 1524 case NoClass: 1525 if (Hi == NoClass) 1526 return ABIArgInfo::getIgnore(); 1527 // If the low part is just padding, it takes no register, leave ResType 1528 // null. 1529 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1530 "Unknown missing lo part"); 1531 break; 1532 1533 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1534 // on the stack. 1535 case Memory: 1536 1537 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1538 // COMPLEX_X87, it is passed in memory. 1539 case X87: 1540 case ComplexX87: 1541 return getIndirectResult(Ty); 1542 1543 case SSEUp: 1544 case X87Up: 1545 assert(0 && "Invalid classification for lo word."); 1546 1547 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1548 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1549 // and %r9 is used. 1550 case Integer: 1551 ++neededInt; 1552 1553 // Pick an 8-byte type based on the preferred type. 1554 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1555 1556 // If we have a sign or zero extended integer, make sure to return Extend 1557 // so that the parameter gets the right LLVM IR attributes. 1558 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1559 // Treat an enum type as its underlying type. 1560 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1561 Ty = EnumTy->getDecl()->getIntegerType(); 1562 1563 if (Ty->isIntegralOrEnumerationType() && 1564 Ty->isPromotableIntegerType()) 1565 return ABIArgInfo::getExtend(); 1566 } 1567 1568 break; 1569 1570 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1571 // available SSE register is used, the registers are taken in the 1572 // order from %xmm0 to %xmm7. 1573 case SSE: 1574 ++neededSSE; 1575 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1576 break; 1577 } 1578 1579 switch (Hi) { 1580 // Memory was handled previously, ComplexX87 and X87 should 1581 // never occur as hi classes, and X87Up must be preceed by X87, 1582 // which is passed in memory. 1583 case Memory: 1584 case X87: 1585 case ComplexX87: 1586 assert(0 && "Invalid classification for hi word."); 1587 break; 1588 1589 case NoClass: break; 1590 1591 case Integer: { 1592 ++neededInt; 1593 // Pick an 8-byte type based on the preferred type. 1594 const llvm::Type *HiType = 1595 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1596 1597 if (Lo == NoClass) // Pass HiType at offset 8 in memory. 1598 return ABIArgInfo::getDirect(HiType, 8); 1599 1600 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1601 break; 1602 } 1603 1604 // X87Up generally doesn't occur here (long double is passed in 1605 // memory), except in situations involving unions. 1606 case X87Up: 1607 case SSE: { 1608 const llvm::Type *HiType = 1609 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1610 1611 if (Lo == NoClass) // Pass HiType at offset 8 in memory. 1612 return ABIArgInfo::getDirect(HiType, 8); 1613 1614 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1615 ++neededSSE; 1616 break; 1617 } 1618 1619 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1620 // eightbyte is passed in the upper half of the last used SSE 1621 // register. This only happens when 128-bit vectors are passed. 1622 case SSEUp: 1623 assert(Lo == SSE && "Unexpected SSEUp classification"); 1624 ResType = Get16ByteVectorType(Ty); 1625 break; 1626 } 1627 1628 return ABIArgInfo::getDirect(ResType); 1629} 1630 1631void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1632 1633 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1634 1635 // Keep track of the number of assigned registers. 1636 unsigned freeIntRegs = 6, freeSSERegs = 8; 1637 1638 // If the return value is indirect, then the hidden argument is consuming one 1639 // integer register. 1640 if (FI.getReturnInfo().isIndirect()) 1641 --freeIntRegs; 1642 1643 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1644 // get assigned (in left-to-right order) for passing as follows... 1645 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1646 it != ie; ++it) { 1647 unsigned neededInt, neededSSE; 1648 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1649 1650 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1651 // eightbyte of an argument, the whole argument is passed on the 1652 // stack. If registers have already been assigned for some 1653 // eightbytes of such an argument, the assignments get reverted. 1654 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1655 freeIntRegs -= neededInt; 1656 freeSSERegs -= neededSSE; 1657 } else { 1658 it->info = getIndirectResult(it->type); 1659 } 1660 } 1661} 1662 1663static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1664 QualType Ty, 1665 CodeGenFunction &CGF) { 1666 llvm::Value *overflow_arg_area_p = 1667 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1668 llvm::Value *overflow_arg_area = 1669 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1670 1671 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1672 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1673 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1674 if (Align > 8) { 1675 // Note that we follow the ABI & gcc here, even though the type 1676 // could in theory have an alignment greater than 16. This case 1677 // shouldn't ever matter in practice. 1678 1679 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1680 llvm::Value *Offset = 1681 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1682 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1683 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1684 CGF.Int64Ty); 1685 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1686 overflow_arg_area = 1687 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1688 overflow_arg_area->getType(), 1689 "overflow_arg_area.align"); 1690 } 1691 1692 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1693 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1694 llvm::Value *Res = 1695 CGF.Builder.CreateBitCast(overflow_arg_area, 1696 llvm::PointerType::getUnqual(LTy)); 1697 1698 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1699 // l->overflow_arg_area + sizeof(type). 1700 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1701 // an 8 byte boundary. 1702 1703 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1704 llvm::Value *Offset = 1705 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1706 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1707 "overflow_arg_area.next"); 1708 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1709 1710 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1711 return Res; 1712} 1713 1714llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1715 CodeGenFunction &CGF) const { 1716 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1717 1718 // Assume that va_list type is correct; should be pointer to LLVM type: 1719 // struct { 1720 // i32 gp_offset; 1721 // i32 fp_offset; 1722 // i8* overflow_arg_area; 1723 // i8* reg_save_area; 1724 // }; 1725 unsigned neededInt, neededSSE; 1726 1727 Ty = CGF.getContext().getCanonicalType(Ty); 1728 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1729 1730 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1731 // in the registers. If not go to step 7. 1732 if (!neededInt && !neededSSE) 1733 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1734 1735 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1736 // general purpose registers needed to pass type and num_fp to hold 1737 // the number of floating point registers needed. 1738 1739 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1740 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1741 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1742 // 1743 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1744 // register save space). 1745 1746 llvm::Value *InRegs = 0; 1747 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1748 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1749 if (neededInt) { 1750 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1751 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1752 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1753 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1754 } 1755 1756 if (neededSSE) { 1757 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1758 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1759 llvm::Value *FitsInFP = 1760 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1761 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1762 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1763 } 1764 1765 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1766 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1767 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1768 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1769 1770 // Emit code to load the value if it was passed in registers. 1771 1772 CGF.EmitBlock(InRegBlock); 1773 1774 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1775 // an offset of l->gp_offset and/or l->fp_offset. This may require 1776 // copying to a temporary location in case the parameter is passed 1777 // in different register classes or requires an alignment greater 1778 // than 8 for general purpose registers and 16 for XMM registers. 1779 // 1780 // FIXME: This really results in shameful code when we end up needing to 1781 // collect arguments from different places; often what should result in a 1782 // simple assembling of a structure from scattered addresses has many more 1783 // loads than necessary. Can we clean this up? 1784 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1785 llvm::Value *RegAddr = 1786 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1787 "reg_save_area"); 1788 if (neededInt && neededSSE) { 1789 // FIXME: Cleanup. 1790 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 1791 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1792 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1793 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1794 const llvm::Type *TyLo = ST->getElementType(0); 1795 const llvm::Type *TyHi = ST->getElementType(1); 1796 assert((TyLo->isFloatingPointTy() ^ TyHi->isFloatingPointTy()) && 1797 "Unexpected ABI info for mixed regs"); 1798 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1799 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1800 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1801 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1802 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1803 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1804 llvm::Value *V = 1805 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1806 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1807 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1808 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1809 1810 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1811 llvm::PointerType::getUnqual(LTy)); 1812 } else if (neededInt) { 1813 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1814 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1815 llvm::PointerType::getUnqual(LTy)); 1816 } else if (neededSSE == 1) { 1817 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1818 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1819 llvm::PointerType::getUnqual(LTy)); 1820 } else { 1821 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1822 // SSE registers are spaced 16 bytes apart in the register save 1823 // area, we need to collect the two eightbytes together. 1824 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1825 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 1826 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1827 const llvm::Type *DblPtrTy = 1828 llvm::PointerType::getUnqual(DoubleTy); 1829 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1830 DoubleTy, NULL); 1831 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1832 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1833 DblPtrTy)); 1834 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1835 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1836 DblPtrTy)); 1837 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1838 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1839 llvm::PointerType::getUnqual(LTy)); 1840 } 1841 1842 // AMD64-ABI 3.5.7p5: Step 5. Set: 1843 // l->gp_offset = l->gp_offset + num_gp * 8 1844 // l->fp_offset = l->fp_offset + num_fp * 16. 1845 if (neededInt) { 1846 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 1847 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1848 gp_offset_p); 1849 } 1850 if (neededSSE) { 1851 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 1852 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1853 fp_offset_p); 1854 } 1855 CGF.EmitBranch(ContBlock); 1856 1857 // Emit code to load the value if it was passed in memory. 1858 1859 CGF.EmitBlock(InMemBlock); 1860 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1861 1862 // Return the appropriate result. 1863 1864 CGF.EmitBlock(ContBlock); 1865 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1866 "vaarg.addr"); 1867 ResAddr->reserveOperandSpace(2); 1868 ResAddr->addIncoming(RegAddr, InRegBlock); 1869 ResAddr->addIncoming(MemAddr, InMemBlock); 1870 return ResAddr; 1871} 1872 1873 1874 1875//===----------------------------------------------------------------------===// 1876// PIC16 ABI Implementation 1877//===----------------------------------------------------------------------===// 1878 1879namespace { 1880 1881class PIC16ABIInfo : public ABIInfo { 1882public: 1883 PIC16ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 1884 1885 ABIArgInfo classifyReturnType(QualType RetTy) const; 1886 1887 ABIArgInfo classifyArgumentType(QualType RetTy) const; 1888 1889 virtual void computeInfo(CGFunctionInfo &FI) const { 1890 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1891 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1892 it != ie; ++it) 1893 it->info = classifyArgumentType(it->type); 1894 } 1895 1896 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1897 CodeGenFunction &CGF) const; 1898}; 1899 1900class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1901public: 1902 PIC16TargetCodeGenInfo(CodeGenTypes &CGT) 1903 : TargetCodeGenInfo(new PIC16ABIInfo(CGT)) {} 1904}; 1905 1906} 1907 1908ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy) const { 1909 if (RetTy->isVoidType()) { 1910 return ABIArgInfo::getIgnore(); 1911 } else { 1912 return ABIArgInfo::getDirect(); 1913 } 1914} 1915 1916ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty) const { 1917 return ABIArgInfo::getDirect(); 1918} 1919 1920llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1921 CodeGenFunction &CGF) const { 1922 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1923 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1924 1925 CGBuilderTy &Builder = CGF.Builder; 1926 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1927 "ap"); 1928 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1929 llvm::Type *PTy = 1930 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1931 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1932 1933 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1934 1935 llvm::Value *NextAddr = 1936 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1937 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1938 "ap.next"); 1939 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1940 1941 return AddrTyped; 1942} 1943 1944 1945// PowerPC-32 1946 1947namespace { 1948class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 1949public: 1950 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 1951 1952 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1953 // This is recovered from gcc output. 1954 return 1; // r1 is the dedicated stack pointer 1955 } 1956 1957 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1958 llvm::Value *Address) const; 1959}; 1960 1961} 1962 1963bool 1964PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1965 llvm::Value *Address) const { 1966 // This is calculated from the LLVM and GCC tables and verified 1967 // against gcc output. AFAIK all ABIs use the same encoding. 1968 1969 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1970 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1971 1972 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1973 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 1974 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1975 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 1976 1977 // 0-31: r0-31, the 4-byte general-purpose registers 1978 AssignToArrayRange(Builder, Address, Four8, 0, 31); 1979 1980 // 32-63: fp0-31, the 8-byte floating-point registers 1981 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 1982 1983 // 64-76 are various 4-byte special-purpose registers: 1984 // 64: mq 1985 // 65: lr 1986 // 66: ctr 1987 // 67: ap 1988 // 68-75 cr0-7 1989 // 76: xer 1990 AssignToArrayRange(Builder, Address, Four8, 64, 76); 1991 1992 // 77-108: v0-31, the 16-byte vector registers 1993 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 1994 1995 // 109: vrsave 1996 // 110: vscr 1997 // 111: spe_acc 1998 // 112: spefscr 1999 // 113: sfp 2000 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2001 2002 return false; 2003} 2004 2005 2006//===----------------------------------------------------------------------===// 2007// ARM ABI Implementation 2008//===----------------------------------------------------------------------===// 2009 2010namespace { 2011 2012class ARMABIInfo : public ABIInfo { 2013public: 2014 enum ABIKind { 2015 APCS = 0, 2016 AAPCS = 1, 2017 AAPCS_VFP 2018 }; 2019 2020private: 2021 ABIKind Kind; 2022 2023public: 2024 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2025 2026private: 2027 ABIKind getABIKind() const { return Kind; } 2028 2029 ABIArgInfo classifyReturnType(QualType RetTy) const; 2030 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2031 2032 virtual void computeInfo(CGFunctionInfo &FI) const; 2033 2034 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2035 CodeGenFunction &CGF) const; 2036}; 2037 2038class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2039public: 2040 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2041 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2042 2043 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2044 return 13; 2045 } 2046}; 2047 2048} 2049 2050void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2051 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2052 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2053 it != ie; ++it) 2054 it->info = classifyArgumentType(it->type); 2055 2056 const llvm::Triple &Triple(getContext().Target.getTriple()); 2057 llvm::CallingConv::ID DefaultCC; 2058 if (Triple.getEnvironmentName() == "gnueabi" || 2059 Triple.getEnvironmentName() == "eabi") 2060 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2061 else 2062 DefaultCC = llvm::CallingConv::ARM_APCS; 2063 2064 switch (getABIKind()) { 2065 case APCS: 2066 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2067 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2068 break; 2069 2070 case AAPCS: 2071 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2072 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2073 break; 2074 2075 case AAPCS_VFP: 2076 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2077 break; 2078 } 2079} 2080 2081ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2082 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 2083 // Treat an enum type as its underlying type. 2084 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2085 Ty = EnumTy->getDecl()->getIntegerType(); 2086 2087 return (Ty->isPromotableIntegerType() ? 2088 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2089 } 2090 2091 // Ignore empty records. 2092 if (isEmptyRecord(getContext(), Ty, true)) 2093 return ABIArgInfo::getIgnore(); 2094 2095 // Structures with either a non-trivial destructor or a non-trivial 2096 // copy constructor are always indirect. 2097 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2098 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2099 2100 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2101 // backend doesn't support byval. 2102 // FIXME: This doesn't handle alignment > 64 bits. 2103 const llvm::Type* ElemTy; 2104 unsigned SizeRegs; 2105 if (getContext().getTypeAlign(Ty) > 32) { 2106 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2107 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2108 } else { 2109 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2110 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2111 } 2112 std::vector<const llvm::Type*> LLVMFields; 2113 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 2114 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields, 2115 true); 2116 return ABIArgInfo::getDirect(STy); 2117} 2118 2119static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2120 llvm::LLVMContext &VMContext) { 2121 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2122 // is called integer-like if its size is less than or equal to one word, and 2123 // the offset of each of its addressable sub-fields is zero. 2124 2125 uint64_t Size = Context.getTypeSize(Ty); 2126 2127 // Check that the type fits in a word. 2128 if (Size > 32) 2129 return false; 2130 2131 // FIXME: Handle vector types! 2132 if (Ty->isVectorType()) 2133 return false; 2134 2135 // Float types are never treated as "integer like". 2136 if (Ty->isRealFloatingType()) 2137 return false; 2138 2139 // If this is a builtin or pointer type then it is ok. 2140 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2141 return true; 2142 2143 // Small complex integer types are "integer like". 2144 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2145 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2146 2147 // Single element and zero sized arrays should be allowed, by the definition 2148 // above, but they are not. 2149 2150 // Otherwise, it must be a record type. 2151 const RecordType *RT = Ty->getAs<RecordType>(); 2152 if (!RT) return false; 2153 2154 // Ignore records with flexible arrays. 2155 const RecordDecl *RD = RT->getDecl(); 2156 if (RD->hasFlexibleArrayMember()) 2157 return false; 2158 2159 // Check that all sub-fields are at offset 0, and are themselves "integer 2160 // like". 2161 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2162 2163 bool HadField = false; 2164 unsigned idx = 0; 2165 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2166 i != e; ++i, ++idx) { 2167 const FieldDecl *FD = *i; 2168 2169 // Bit-fields are not addressable, we only need to verify they are "integer 2170 // like". We still have to disallow a subsequent non-bitfield, for example: 2171 // struct { int : 0; int x } 2172 // is non-integer like according to gcc. 2173 if (FD->isBitField()) { 2174 if (!RD->isUnion()) 2175 HadField = true; 2176 2177 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2178 return false; 2179 2180 continue; 2181 } 2182 2183 // Check if this field is at offset 0. 2184 if (Layout.getFieldOffset(idx) != 0) 2185 return false; 2186 2187 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2188 return false; 2189 2190 // Only allow at most one field in a structure. This doesn't match the 2191 // wording above, but follows gcc in situations with a field following an 2192 // empty structure. 2193 if (!RD->isUnion()) { 2194 if (HadField) 2195 return false; 2196 2197 HadField = true; 2198 } 2199 } 2200 2201 return true; 2202} 2203 2204ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2205 if (RetTy->isVoidType()) 2206 return ABIArgInfo::getIgnore(); 2207 2208 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2209 // Treat an enum type as its underlying type. 2210 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2211 RetTy = EnumTy->getDecl()->getIntegerType(); 2212 2213 return (RetTy->isPromotableIntegerType() ? 2214 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2215 } 2216 2217 // Structures with either a non-trivial destructor or a non-trivial 2218 // copy constructor are always indirect. 2219 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2220 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2221 2222 // Are we following APCS? 2223 if (getABIKind() == APCS) { 2224 if (isEmptyRecord(getContext(), RetTy, false)) 2225 return ABIArgInfo::getIgnore(); 2226 2227 // Complex types are all returned as packed integers. 2228 // 2229 // FIXME: Consider using 2 x vector types if the back end handles them 2230 // correctly. 2231 if (RetTy->isAnyComplexType()) 2232 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2233 getContext().getTypeSize(RetTy))); 2234 2235 // Integer like structures are returned in r0. 2236 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2237 // Return in the smallest viable integer type. 2238 uint64_t Size = getContext().getTypeSize(RetTy); 2239 if (Size <= 8) 2240 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2241 if (Size <= 16) 2242 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2243 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2244 } 2245 2246 // Otherwise return in memory. 2247 return ABIArgInfo::getIndirect(0); 2248 } 2249 2250 // Otherwise this is an AAPCS variant. 2251 2252 if (isEmptyRecord(getContext(), RetTy, true)) 2253 return ABIArgInfo::getIgnore(); 2254 2255 // Aggregates <= 4 bytes are returned in r0; other aggregates 2256 // are returned indirectly. 2257 uint64_t Size = getContext().getTypeSize(RetTy); 2258 if (Size <= 32) { 2259 // Return in the smallest viable integer type. 2260 if (Size <= 8) 2261 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2262 if (Size <= 16) 2263 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2264 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2265 } 2266 2267 return ABIArgInfo::getIndirect(0); 2268} 2269 2270llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2271 CodeGenFunction &CGF) const { 2272 // FIXME: Need to handle alignment 2273 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2274 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2275 2276 CGBuilderTy &Builder = CGF.Builder; 2277 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2278 "ap"); 2279 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2280 llvm::Type *PTy = 2281 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2282 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2283 2284 uint64_t Offset = 2285 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2286 llvm::Value *NextAddr = 2287 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2288 "ap.next"); 2289 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2290 2291 return AddrTyped; 2292} 2293 2294ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 2295 if (RetTy->isVoidType()) 2296 return ABIArgInfo::getIgnore(); 2297 2298 if (CodeGenFunction::hasAggregateLLVMType(RetTy)) 2299 return ABIArgInfo::getIndirect(0); 2300 2301 // Treat an enum type as its underlying type. 2302 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2303 RetTy = EnumTy->getDecl()->getIntegerType(); 2304 2305 return (RetTy->isPromotableIntegerType() ? 2306 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2307} 2308 2309//===----------------------------------------------------------------------===// 2310// SystemZ ABI Implementation 2311//===----------------------------------------------------------------------===// 2312 2313namespace { 2314 2315class SystemZABIInfo : public ABIInfo { 2316public: 2317 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2318 2319 bool isPromotableIntegerType(QualType Ty) const; 2320 2321 ABIArgInfo classifyReturnType(QualType RetTy) const; 2322 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2323 2324 virtual void computeInfo(CGFunctionInfo &FI) const { 2325 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2326 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2327 it != ie; ++it) 2328 it->info = classifyArgumentType(it->type); 2329 } 2330 2331 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2332 CodeGenFunction &CGF) const; 2333}; 2334 2335class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2336public: 2337 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2338 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2339}; 2340 2341} 2342 2343bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2344 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2345 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2346 switch (BT->getKind()) { 2347 case BuiltinType::Bool: 2348 case BuiltinType::Char_S: 2349 case BuiltinType::Char_U: 2350 case BuiltinType::SChar: 2351 case BuiltinType::UChar: 2352 case BuiltinType::Short: 2353 case BuiltinType::UShort: 2354 case BuiltinType::Int: 2355 case BuiltinType::UInt: 2356 return true; 2357 default: 2358 return false; 2359 } 2360 return false; 2361} 2362 2363llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2364 CodeGenFunction &CGF) const { 2365 // FIXME: Implement 2366 return 0; 2367} 2368 2369 2370ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2371 if (RetTy->isVoidType()) 2372 return ABIArgInfo::getIgnore(); 2373 if (CodeGenFunction::hasAggregateLLVMType(RetTy)) 2374 return ABIArgInfo::getIndirect(0); 2375 2376 return (isPromotableIntegerType(RetTy) ? 2377 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2378} 2379 2380ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2381 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 2382 return ABIArgInfo::getIndirect(0); 2383 2384 return (isPromotableIntegerType(Ty) ? 2385 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2386} 2387 2388//===----------------------------------------------------------------------===// 2389// MSP430 ABI Implementation 2390//===----------------------------------------------------------------------===// 2391 2392namespace { 2393 2394class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2395public: 2396 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2397 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2398 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2399 CodeGen::CodeGenModule &M) const; 2400}; 2401 2402} 2403 2404void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2405 llvm::GlobalValue *GV, 2406 CodeGen::CodeGenModule &M) const { 2407 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2408 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2409 // Handle 'interrupt' attribute: 2410 llvm::Function *F = cast<llvm::Function>(GV); 2411 2412 // Step 1: Set ISR calling convention. 2413 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2414 2415 // Step 2: Add attributes goodness. 2416 F->addFnAttr(llvm::Attribute::NoInline); 2417 2418 // Step 3: Emit ISR vector alias. 2419 unsigned Num = attr->getNumber() + 0xffe0; 2420 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2421 "vector_" + 2422 llvm::LowercaseString(llvm::utohexstr(Num)), 2423 GV, &M.getModule()); 2424 } 2425 } 2426} 2427 2428//===----------------------------------------------------------------------===// 2429// MIPS ABI Implementation. This works for both little-endian and 2430// big-endian variants. 2431//===----------------------------------------------------------------------===// 2432 2433namespace { 2434class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2435public: 2436 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2437 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2438 2439 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2440 return 29; 2441 } 2442 2443 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2444 llvm::Value *Address) const; 2445}; 2446} 2447 2448bool 2449MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2450 llvm::Value *Address) const { 2451 // This information comes from gcc's implementation, which seems to 2452 // as canonical as it gets. 2453 2454 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2455 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2456 2457 // Everything on MIPS is 4 bytes. Double-precision FP registers 2458 // are aliased to pairs of single-precision FP registers. 2459 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2460 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2461 2462 // 0-31 are the general purpose registers, $0 - $31. 2463 // 32-63 are the floating-point registers, $f0 - $f31. 2464 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2465 // 66 is the (notional, I think) register for signal-handler return. 2466 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2467 2468 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2469 // They are one bit wide and ignored here. 2470 2471 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2472 // (coprocessor 1 is the FP unit) 2473 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2474 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2475 // 176-181 are the DSP accumulator registers. 2476 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2477 2478 return false; 2479} 2480 2481 2482const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2483 if (TheTargetCodeGenInfo) 2484 return *TheTargetCodeGenInfo; 2485 2486 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2487 // free it. 2488 2489 const llvm::Triple &Triple = getContext().Target.getTriple(); 2490 switch (Triple.getArch()) { 2491 default: 2492 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2493 2494 case llvm::Triple::mips: 2495 case llvm::Triple::mipsel: 2496 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2497 2498 case llvm::Triple::arm: 2499 case llvm::Triple::thumb: 2500 // FIXME: We want to know the float calling convention as well. 2501 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2502 return *(TheTargetCodeGenInfo = 2503 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS)); 2504 2505 return *(TheTargetCodeGenInfo = 2506 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS)); 2507 2508 case llvm::Triple::pic16: 2509 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo(Types)); 2510 2511 case llvm::Triple::ppc: 2512 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2513 2514 case llvm::Triple::systemz: 2515 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2516 2517 case llvm::Triple::msp430: 2518 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2519 2520 case llvm::Triple::x86: 2521 switch (Triple.getOS()) { 2522 case llvm::Triple::Darwin: 2523 return *(TheTargetCodeGenInfo = 2524 new X86_32TargetCodeGenInfo(Types, true, true)); 2525 case llvm::Triple::Cygwin: 2526 case llvm::Triple::MinGW32: 2527 case llvm::Triple::MinGW64: 2528 case llvm::Triple::AuroraUX: 2529 case llvm::Triple::DragonFly: 2530 case llvm::Triple::FreeBSD: 2531 case llvm::Triple::OpenBSD: 2532 return *(TheTargetCodeGenInfo = 2533 new X86_32TargetCodeGenInfo(Types, false, true)); 2534 2535 default: 2536 return *(TheTargetCodeGenInfo = 2537 new X86_32TargetCodeGenInfo(Types, false, false)); 2538 } 2539 2540 case llvm::Triple::x86_64: 2541 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2542 } 2543} 2544