TargetInfo.cpp revision 3db4dde12de84269c8f803f9dfca37a2d14f9898
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/Target/TargetData.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 llvm::raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (const llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " Byal=" << getIndirectByVal(); 79 break; 80 case Expand: 81 OS << "Expand"; 82 break; 83 } 84 OS << ")\n"; 85} 86 87TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 88 89static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 90 91/// isEmptyField - Return true iff a the field is "empty", that is it 92/// is an unnamed bit-field or an (array of) empty record(s). 93static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 94 bool AllowArrays) { 95 if (FD->isUnnamedBitfield()) 96 return true; 97 98 QualType FT = FD->getType(); 99 100 // Constant arrays of empty records count as empty, strip them off. 101 if (AllowArrays) 102 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 103 FT = AT->getElementType(); 104 105 const RecordType *RT = FT->getAs<RecordType>(); 106 if (!RT) 107 return false; 108 109 // C++ record fields are never empty, at least in the Itanium ABI. 110 // 111 // FIXME: We should use a predicate for whether this behavior is true in the 112 // current ABI. 113 if (isa<CXXRecordDecl>(RT->getDecl())) 114 return false; 115 116 return isEmptyRecord(Context, FT, AllowArrays); 117} 118 119/// isEmptyRecord - Return true iff a structure contains only empty 120/// fields. Note that a structure with a flexible array member is not 121/// considered empty. 122static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 123 const RecordType *RT = T->getAs<RecordType>(); 124 if (!RT) 125 return 0; 126 const RecordDecl *RD = RT->getDecl(); 127 if (RD->hasFlexibleArrayMember()) 128 return false; 129 130 // If this is a C++ record, check the bases first. 131 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 132 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 133 e = CXXRD->bases_end(); i != e; ++i) 134 if (!isEmptyRecord(Context, i->getType(), true)) 135 return false; 136 137 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 138 i != e; ++i) 139 if (!isEmptyField(Context, *i, AllowArrays)) 140 return false; 141 return true; 142} 143 144/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 145/// a non-trivial destructor or a non-trivial copy constructor. 146static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 147 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 148 if (!RD) 149 return false; 150 151 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 152} 153 154/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 155/// a record type with either a non-trivial destructor or a non-trivial copy 156/// constructor. 157static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 158 const RecordType *RT = T->getAs<RecordType>(); 159 if (!RT) 160 return false; 161 162 return hasNonTrivialDestructorOrCopyConstructor(RT); 163} 164 165/// isSingleElementStruct - Determine if a structure is a "single 166/// element struct", i.e. it has exactly one non-empty field or 167/// exactly one field which is itself a single element 168/// struct. Structures with flexible array members are never 169/// considered single element structs. 170/// 171/// \return The field declaration for the single non-empty field, if 172/// it exists. 173static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 174 const RecordType *RT = T->getAsStructureType(); 175 if (!RT) 176 return 0; 177 178 const RecordDecl *RD = RT->getDecl(); 179 if (RD->hasFlexibleArrayMember()) 180 return 0; 181 182 const Type *Found = 0; 183 184 // If this is a C++ record, check the bases first. 185 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 186 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 187 e = CXXRD->bases_end(); i != e; ++i) { 188 // Ignore empty records. 189 if (isEmptyRecord(Context, i->getType(), true)) 190 continue; 191 192 // If we already found an element then this isn't a single-element struct. 193 if (Found) 194 return 0; 195 196 // If this is non-empty and not a single element struct, the composite 197 // cannot be a single element struct. 198 Found = isSingleElementStruct(i->getType(), Context); 199 if (!Found) 200 return 0; 201 } 202 } 203 204 // Check for single element. 205 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 206 i != e; ++i) { 207 const FieldDecl *FD = *i; 208 QualType FT = FD->getType(); 209 210 // Ignore empty fields. 211 if (isEmptyField(Context, FD, true)) 212 continue; 213 214 // If we already found an element then this isn't a single-element 215 // struct. 216 if (Found) 217 return 0; 218 219 // Treat single element arrays as the element. 220 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 221 if (AT->getSize().getZExtValue() != 1) 222 break; 223 FT = AT->getElementType(); 224 } 225 226 if (!isAggregateTypeForABI(FT)) { 227 Found = FT.getTypePtr(); 228 } else { 229 Found = isSingleElementStruct(FT, Context); 230 if (!Found) 231 return 0; 232 } 233 } 234 235 return Found; 236} 237 238static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 239 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 240 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 241 !Ty->isBlockPointerType()) 242 return false; 243 244 uint64_t Size = Context.getTypeSize(Ty); 245 return Size == 32 || Size == 64; 246} 247 248/// canExpandIndirectArgument - Test whether an argument type which is to be 249/// passed indirectly (on the stack) would have the equivalent layout if it was 250/// expanded into separate arguments. If so, we prefer to do the latter to avoid 251/// inhibiting optimizations. 252/// 253// FIXME: This predicate is missing many cases, currently it just follows 254// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 255// should probably make this smarter, or better yet make the LLVM backend 256// capable of handling it. 257static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 258 // We can only expand structure types. 259 const RecordType *RT = Ty->getAs<RecordType>(); 260 if (!RT) 261 return false; 262 263 // We can only expand (C) structures. 264 // 265 // FIXME: This needs to be generalized to handle classes as well. 266 const RecordDecl *RD = RT->getDecl(); 267 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 268 return false; 269 270 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 271 i != e; ++i) { 272 const FieldDecl *FD = *i; 273 274 if (!is32Or64BitBasicType(FD->getType(), Context)) 275 return false; 276 277 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 278 // how to expand them yet, and the predicate for telling if a bitfield still 279 // counts as "basic" is more complicated than what we were doing previously. 280 if (FD->isBitField()) 281 return false; 282 } 283 284 return true; 285} 286 287namespace { 288/// DefaultABIInfo - The default implementation for ABI specific 289/// details. This implementation provides information which results in 290/// self-consistent and sensible LLVM IR generation, but does not 291/// conform to any particular ABI. 292class DefaultABIInfo : public ABIInfo { 293public: 294 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 295 296 ABIArgInfo classifyReturnType(QualType RetTy) const; 297 ABIArgInfo classifyArgumentType(QualType RetTy) const; 298 299 virtual void computeInfo(CGFunctionInfo &FI) const { 300 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 301 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 302 it != ie; ++it) 303 it->info = classifyArgumentType(it->type); 304 } 305 306 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 307 CodeGenFunction &CGF) const; 308}; 309 310class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 311public: 312 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 313 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 314}; 315 316llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 317 CodeGenFunction &CGF) const { 318 return 0; 319} 320 321ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 322 if (isAggregateTypeForABI(Ty)) 323 return ABIArgInfo::getIndirect(0); 324 325 // Treat an enum type as its underlying type. 326 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 327 Ty = EnumTy->getDecl()->getIntegerType(); 328 329 return (Ty->isPromotableIntegerType() ? 330 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 331} 332 333//===----------------------------------------------------------------------===// 334// X86-32 ABI Implementation 335//===----------------------------------------------------------------------===// 336 337/// X86_32ABIInfo - The X86-32 ABI information. 338class X86_32ABIInfo : public ABIInfo { 339 bool IsDarwinVectorABI; 340 bool IsSmallStructInRegABI; 341 342 static bool isRegisterSize(unsigned Size) { 343 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 344 } 345 346 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 347 348 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 349 /// such that the argument will be passed in memory. 350 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 351 352public: 353 354 ABIArgInfo classifyReturnType(QualType RetTy) const; 355 ABIArgInfo classifyArgumentType(QualType RetTy) const; 356 357 virtual void computeInfo(CGFunctionInfo &FI) const { 358 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 359 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 360 it != ie; ++it) 361 it->info = classifyArgumentType(it->type); 362 } 363 364 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 365 CodeGenFunction &CGF) const; 366 367 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 368 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 369}; 370 371class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 372public: 373 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 374 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 375 376 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 377 CodeGen::CodeGenModule &CGM) const; 378 379 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 380 // Darwin uses different dwarf register numbers for EH. 381 if (CGM.isTargetDarwin()) return 5; 382 383 return 4; 384 } 385 386 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 387 llvm::Value *Address) const; 388}; 389 390} 391 392/// shouldReturnTypeInRegister - Determine if the given type should be 393/// passed in a register (for the Darwin ABI). 394bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 395 ASTContext &Context) { 396 uint64_t Size = Context.getTypeSize(Ty); 397 398 // Type must be register sized. 399 if (!isRegisterSize(Size)) 400 return false; 401 402 if (Ty->isVectorType()) { 403 // 64- and 128- bit vectors inside structures are not returned in 404 // registers. 405 if (Size == 64 || Size == 128) 406 return false; 407 408 return true; 409 } 410 411 // If this is a builtin, pointer, enum, complex type, member pointer, or 412 // member function pointer it is ok. 413 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 414 Ty->isAnyComplexType() || Ty->isEnumeralType() || 415 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 416 return true; 417 418 // Arrays are treated like records. 419 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 420 return shouldReturnTypeInRegister(AT->getElementType(), Context); 421 422 // Otherwise, it must be a record type. 423 const RecordType *RT = Ty->getAs<RecordType>(); 424 if (!RT) return false; 425 426 // FIXME: Traverse bases here too. 427 428 // Structure types are passed in register if all fields would be 429 // passed in a register. 430 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 431 e = RT->getDecl()->field_end(); i != e; ++i) { 432 const FieldDecl *FD = *i; 433 434 // Empty fields are ignored. 435 if (isEmptyField(Context, FD, true)) 436 continue; 437 438 // Check fields recursively. 439 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 440 return false; 441 } 442 443 return true; 444} 445 446ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 447 if (RetTy->isVoidType()) 448 return ABIArgInfo::getIgnore(); 449 450 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 451 // On Darwin, some vectors are returned in registers. 452 if (IsDarwinVectorABI) { 453 uint64_t Size = getContext().getTypeSize(RetTy); 454 455 // 128-bit vectors are a special case; they are returned in 456 // registers and we need to make sure to pick a type the LLVM 457 // backend will like. 458 if (Size == 128) 459 return ABIArgInfo::getDirect(llvm::VectorType::get( 460 llvm::Type::getInt64Ty(getVMContext()), 2)); 461 462 // Always return in register if it fits in a general purpose 463 // register, or if it is 64 bits and has a single element. 464 if ((Size == 8 || Size == 16 || Size == 32) || 465 (Size == 64 && VT->getNumElements() == 1)) 466 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 467 Size)); 468 469 return ABIArgInfo::getIndirect(0); 470 } 471 472 return ABIArgInfo::getDirect(); 473 } 474 475 if (isAggregateTypeForABI(RetTy)) { 476 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 477 // Structures with either a non-trivial destructor or a non-trivial 478 // copy constructor are always indirect. 479 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 480 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 481 482 // Structures with flexible arrays are always indirect. 483 if (RT->getDecl()->hasFlexibleArrayMember()) 484 return ABIArgInfo::getIndirect(0); 485 } 486 487 // If specified, structs and unions are always indirect. 488 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 489 return ABIArgInfo::getIndirect(0); 490 491 // Classify "single element" structs as their element type. 492 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 493 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 494 if (BT->isIntegerType()) { 495 // We need to use the size of the structure, padding 496 // bit-fields can adjust that to be larger than the single 497 // element type. 498 uint64_t Size = getContext().getTypeSize(RetTy); 499 return ABIArgInfo::getDirect( 500 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 501 } 502 503 if (BT->getKind() == BuiltinType::Float) { 504 assert(getContext().getTypeSize(RetTy) == 505 getContext().getTypeSize(SeltTy) && 506 "Unexpect single element structure size!"); 507 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 508 } 509 510 if (BT->getKind() == BuiltinType::Double) { 511 assert(getContext().getTypeSize(RetTy) == 512 getContext().getTypeSize(SeltTy) && 513 "Unexpect single element structure size!"); 514 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 515 } 516 } else if (SeltTy->isPointerType()) { 517 // FIXME: It would be really nice if this could come out as the proper 518 // pointer type. 519 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 520 return ABIArgInfo::getDirect(PtrTy); 521 } else if (SeltTy->isVectorType()) { 522 // 64- and 128-bit vectors are never returned in a 523 // register when inside a structure. 524 uint64_t Size = getContext().getTypeSize(RetTy); 525 if (Size == 64 || Size == 128) 526 return ABIArgInfo::getIndirect(0); 527 528 return classifyReturnType(QualType(SeltTy, 0)); 529 } 530 } 531 532 // Small structures which are register sized are generally returned 533 // in a register. 534 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 535 uint64_t Size = getContext().getTypeSize(RetTy); 536 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 537 } 538 539 return ABIArgInfo::getIndirect(0); 540 } 541 542 // Treat an enum type as its underlying type. 543 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 544 RetTy = EnumTy->getDecl()->getIntegerType(); 545 546 return (RetTy->isPromotableIntegerType() ? 547 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 548} 549 550ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 551 if (!ByVal) 552 return ABIArgInfo::getIndirect(0, false); 553 554 // Compute the byval alignment. We trust the back-end to honor the 555 // minimum ABI alignment for byval, to make cleaner IR. 556 const unsigned MinABIAlign = 4; 557 unsigned Align = getContext().getTypeAlign(Ty) / 8; 558 if (Align > MinABIAlign) 559 return ABIArgInfo::getIndirect(Align); 560 return ABIArgInfo::getIndirect(0); 561} 562 563ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 564 // FIXME: Set alignment on indirect arguments. 565 if (isAggregateTypeForABI(Ty)) { 566 // Structures with flexible arrays are always indirect. 567 if (const RecordType *RT = Ty->getAs<RecordType>()) { 568 // Structures with either a non-trivial destructor or a non-trivial 569 // copy constructor are always indirect. 570 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 571 return getIndirectResult(Ty, /*ByVal=*/false); 572 573 if (RT->getDecl()->hasFlexibleArrayMember()) 574 return getIndirectResult(Ty); 575 } 576 577 // Ignore empty structs. 578 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 579 return ABIArgInfo::getIgnore(); 580 581 // Expand small (<= 128-bit) record types when we know that the stack layout 582 // of those arguments will match the struct. This is important because the 583 // LLVM backend isn't smart enough to remove byval, which inhibits many 584 // optimizations. 585 if (getContext().getTypeSize(Ty) <= 4*32 && 586 canExpandIndirectArgument(Ty, getContext())) 587 return ABIArgInfo::getExpand(); 588 589 return getIndirectResult(Ty); 590 } 591 592 if (const VectorType *VT = Ty->getAs<VectorType>()) { 593 // On Darwin, some vectors are passed in memory, we handle this by passing 594 // it as an i8/i16/i32/i64. 595 if (IsDarwinVectorABI) { 596 uint64_t Size = getContext().getTypeSize(Ty); 597 if ((Size == 8 || Size == 16 || Size == 32) || 598 (Size == 64 && VT->getNumElements() == 1)) 599 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 600 Size)); 601 } 602 603 return ABIArgInfo::getDirect(); 604 } 605 606 607 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 608 Ty = EnumTy->getDecl()->getIntegerType(); 609 610 return (Ty->isPromotableIntegerType() ? 611 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 612} 613 614llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 615 CodeGenFunction &CGF) const { 616 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 617 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 618 619 CGBuilderTy &Builder = CGF.Builder; 620 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 621 "ap"); 622 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 623 llvm::Type *PTy = 624 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 625 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 626 627 uint64_t Offset = 628 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 629 llvm::Value *NextAddr = 630 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 631 "ap.next"); 632 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 633 634 return AddrTyped; 635} 636 637void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 638 llvm::GlobalValue *GV, 639 CodeGen::CodeGenModule &CGM) const { 640 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 641 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 642 // Get the LLVM function. 643 llvm::Function *Fn = cast<llvm::Function>(GV); 644 645 // Now add the 'alignstack' attribute with a value of 16. 646 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 647 } 648 } 649} 650 651bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 652 CodeGen::CodeGenFunction &CGF, 653 llvm::Value *Address) const { 654 CodeGen::CGBuilderTy &Builder = CGF.Builder; 655 llvm::LLVMContext &Context = CGF.getLLVMContext(); 656 657 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 658 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 659 660 // 0-7 are the eight integer registers; the order is different 661 // on Darwin (for EH), but the range is the same. 662 // 8 is %eip. 663 AssignToArrayRange(Builder, Address, Four8, 0, 8); 664 665 if (CGF.CGM.isTargetDarwin()) { 666 // 12-16 are st(0..4). Not sure why we stop at 4. 667 // These have size 16, which is sizeof(long double) on 668 // platforms with 8-byte alignment for that type. 669 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 670 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 671 672 } else { 673 // 9 is %eflags, which doesn't get a size on Darwin for some 674 // reason. 675 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 676 677 // 11-16 are st(0..5). Not sure why we stop at 5. 678 // These have size 12, which is sizeof(long double) on 679 // platforms with 4-byte alignment for that type. 680 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 681 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 682 } 683 684 return false; 685} 686 687//===----------------------------------------------------------------------===// 688// X86-64 ABI Implementation 689//===----------------------------------------------------------------------===// 690 691 692namespace { 693/// X86_64ABIInfo - The X86_64 ABI information. 694class X86_64ABIInfo : public ABIInfo { 695 enum Class { 696 Integer = 0, 697 SSE, 698 SSEUp, 699 X87, 700 X87Up, 701 ComplexX87, 702 NoClass, 703 Memory 704 }; 705 706 /// merge - Implement the X86_64 ABI merging algorithm. 707 /// 708 /// Merge an accumulating classification \arg Accum with a field 709 /// classification \arg Field. 710 /// 711 /// \param Accum - The accumulating classification. This should 712 /// always be either NoClass or the result of a previous merge 713 /// call. In addition, this should never be Memory (the caller 714 /// should just return Memory for the aggregate). 715 static Class merge(Class Accum, Class Field); 716 717 /// classify - Determine the x86_64 register classes in which the 718 /// given type T should be passed. 719 /// 720 /// \param Lo - The classification for the parts of the type 721 /// residing in the low word of the containing object. 722 /// 723 /// \param Hi - The classification for the parts of the type 724 /// residing in the high word of the containing object. 725 /// 726 /// \param OffsetBase - The bit offset of this type in the 727 /// containing object. Some parameters are classified different 728 /// depending on whether they straddle an eightbyte boundary. 729 /// 730 /// If a word is unused its result will be NoClass; if a type should 731 /// be passed in Memory then at least the classification of \arg Lo 732 /// will be Memory. 733 /// 734 /// The \arg Lo class will be NoClass iff the argument is ignored. 735 /// 736 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 737 /// also be ComplexX87. 738 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 739 740 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 741 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 742 unsigned IROffset, QualType SourceTy, 743 unsigned SourceOffset) const; 744 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 745 unsigned IROffset, QualType SourceTy, 746 unsigned SourceOffset) const; 747 748 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 749 /// such that the argument will be returned in memory. 750 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 751 752 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 753 /// such that the argument will be passed in memory. 754 ABIArgInfo getIndirectResult(QualType Ty) const; 755 756 ABIArgInfo classifyReturnType(QualType RetTy) const; 757 758 ABIArgInfo classifyArgumentType(QualType Ty, unsigned &neededInt, 759 unsigned &neededSSE) const; 760 761public: 762 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 763 764 virtual void computeInfo(CGFunctionInfo &FI) const; 765 766 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 767 CodeGenFunction &CGF) const; 768}; 769 770/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 771class WinX86_64ABIInfo : public X86_64ABIInfo { 772public: 773 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : X86_64ABIInfo(CGT) {} 774 775 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 776 CodeGenFunction &CGF) const; 777}; 778 779class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 780public: 781 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 782 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 783 784 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 785 return 7; 786 } 787 788 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 789 llvm::Value *Address) const { 790 CodeGen::CGBuilderTy &Builder = CGF.Builder; 791 llvm::LLVMContext &Context = CGF.getLLVMContext(); 792 793 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 794 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 795 796 // 0-15 are the 16 integer registers. 797 // 16 is %rip. 798 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 799 800 return false; 801 } 802}; 803 804class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 805public: 806 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 807 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 808 809 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 810 return 7; 811 } 812 813 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 814 llvm::Value *Address) const { 815 CodeGen::CGBuilderTy &Builder = CGF.Builder; 816 llvm::LLVMContext &Context = CGF.getLLVMContext(); 817 818 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 819 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 820 821 // 0-15 are the 16 integer registers. 822 // 16 is %rip. 823 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 824 825 return false; 826 } 827}; 828 829} 830 831X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 832 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 833 // classified recursively so that always two fields are 834 // considered. The resulting class is calculated according to 835 // the classes of the fields in the eightbyte: 836 // 837 // (a) If both classes are equal, this is the resulting class. 838 // 839 // (b) If one of the classes is NO_CLASS, the resulting class is 840 // the other class. 841 // 842 // (c) If one of the classes is MEMORY, the result is the MEMORY 843 // class. 844 // 845 // (d) If one of the classes is INTEGER, the result is the 846 // INTEGER. 847 // 848 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 849 // MEMORY is used as class. 850 // 851 // (f) Otherwise class SSE is used. 852 853 // Accum should never be memory (we should have returned) or 854 // ComplexX87 (because this cannot be passed in a structure). 855 assert((Accum != Memory && Accum != ComplexX87) && 856 "Invalid accumulated classification during merge."); 857 if (Accum == Field || Field == NoClass) 858 return Accum; 859 if (Field == Memory) 860 return Memory; 861 if (Accum == NoClass) 862 return Field; 863 if (Accum == Integer || Field == Integer) 864 return Integer; 865 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 866 Accum == X87 || Accum == X87Up) 867 return Memory; 868 return SSE; 869} 870 871void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 872 Class &Lo, Class &Hi) const { 873 // FIXME: This code can be simplified by introducing a simple value class for 874 // Class pairs with appropriate constructor methods for the various 875 // situations. 876 877 // FIXME: Some of the split computations are wrong; unaligned vectors 878 // shouldn't be passed in registers for example, so there is no chance they 879 // can straddle an eightbyte. Verify & simplify. 880 881 Lo = Hi = NoClass; 882 883 Class &Current = OffsetBase < 64 ? Lo : Hi; 884 Current = Memory; 885 886 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 887 BuiltinType::Kind k = BT->getKind(); 888 889 if (k == BuiltinType::Void) { 890 Current = NoClass; 891 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 892 Lo = Integer; 893 Hi = Integer; 894 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 895 Current = Integer; 896 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 897 Current = SSE; 898 } else if (k == BuiltinType::LongDouble) { 899 Lo = X87; 900 Hi = X87Up; 901 } 902 // FIXME: _Decimal32 and _Decimal64 are SSE. 903 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 904 return; 905 } 906 907 if (const EnumType *ET = Ty->getAs<EnumType>()) { 908 // Classify the underlying integer type. 909 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 910 return; 911 } 912 913 if (Ty->hasPointerRepresentation()) { 914 Current = Integer; 915 return; 916 } 917 918 if (Ty->isMemberPointerType()) { 919 if (Ty->isMemberFunctionPointerType()) 920 Lo = Hi = Integer; 921 else 922 Current = Integer; 923 return; 924 } 925 926 if (const VectorType *VT = Ty->getAs<VectorType>()) { 927 uint64_t Size = getContext().getTypeSize(VT); 928 if (Size == 32) { 929 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 930 // float> as integer. 931 Current = Integer; 932 933 // If this type crosses an eightbyte boundary, it should be 934 // split. 935 uint64_t EB_Real = (OffsetBase) / 64; 936 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 937 if (EB_Real != EB_Imag) 938 Hi = Lo; 939 } else if (Size == 64) { 940 // gcc passes <1 x double> in memory. :( 941 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 942 return; 943 944 // gcc passes <1 x long long> as INTEGER. 945 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 946 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 947 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 948 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 949 Current = Integer; 950 else 951 Current = SSE; 952 953 // If this type crosses an eightbyte boundary, it should be 954 // split. 955 if (OffsetBase && OffsetBase != 64) 956 Hi = Lo; 957 } else if (Size == 128) { 958 Lo = SSE; 959 Hi = SSEUp; 960 } 961 return; 962 } 963 964 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 965 QualType ET = getContext().getCanonicalType(CT->getElementType()); 966 967 uint64_t Size = getContext().getTypeSize(Ty); 968 if (ET->isIntegralOrEnumerationType()) { 969 if (Size <= 64) 970 Current = Integer; 971 else if (Size <= 128) 972 Lo = Hi = Integer; 973 } else if (ET == getContext().FloatTy) 974 Current = SSE; 975 else if (ET == getContext().DoubleTy) 976 Lo = Hi = SSE; 977 else if (ET == getContext().LongDoubleTy) 978 Current = ComplexX87; 979 980 // If this complex type crosses an eightbyte boundary then it 981 // should be split. 982 uint64_t EB_Real = (OffsetBase) / 64; 983 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 984 if (Hi == NoClass && EB_Real != EB_Imag) 985 Hi = Lo; 986 987 return; 988 } 989 990 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 991 // Arrays are treated like structures. 992 993 uint64_t Size = getContext().getTypeSize(Ty); 994 995 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 996 // than two eightbytes, ..., it has class MEMORY. 997 if (Size > 128) 998 return; 999 1000 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1001 // fields, it has class MEMORY. 1002 // 1003 // Only need to check alignment of array base. 1004 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1005 return; 1006 1007 // Otherwise implement simplified merge. We could be smarter about 1008 // this, but it isn't worth it and would be harder to verify. 1009 Current = NoClass; 1010 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1011 uint64_t ArraySize = AT->getSize().getZExtValue(); 1012 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1013 Class FieldLo, FieldHi; 1014 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1015 Lo = merge(Lo, FieldLo); 1016 Hi = merge(Hi, FieldHi); 1017 if (Lo == Memory || Hi == Memory) 1018 break; 1019 } 1020 1021 // Do post merger cleanup (see below). Only case we worry about is Memory. 1022 if (Hi == Memory) 1023 Lo = Memory; 1024 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1025 return; 1026 } 1027 1028 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1029 uint64_t Size = getContext().getTypeSize(Ty); 1030 1031 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1032 // than two eightbytes, ..., it has class MEMORY. 1033 if (Size > 128) 1034 return; 1035 1036 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1037 // copy constructor or a non-trivial destructor, it is passed by invisible 1038 // reference. 1039 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1040 return; 1041 1042 const RecordDecl *RD = RT->getDecl(); 1043 1044 // Assume variable sized types are passed in memory. 1045 if (RD->hasFlexibleArrayMember()) 1046 return; 1047 1048 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1049 1050 // Reset Lo class, this will be recomputed. 1051 Current = NoClass; 1052 1053 // If this is a C++ record, classify the bases first. 1054 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1055 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1056 e = CXXRD->bases_end(); i != e; ++i) { 1057 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1058 "Unexpected base class!"); 1059 const CXXRecordDecl *Base = 1060 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1061 1062 // Classify this field. 1063 // 1064 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1065 // single eightbyte, each is classified separately. Each eightbyte gets 1066 // initialized to class NO_CLASS. 1067 Class FieldLo, FieldHi; 1068 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 1069 classify(i->getType(), Offset, FieldLo, FieldHi); 1070 Lo = merge(Lo, FieldLo); 1071 Hi = merge(Hi, FieldHi); 1072 if (Lo == Memory || Hi == Memory) 1073 break; 1074 } 1075 } 1076 1077 // Classify the fields one at a time, merging the results. 1078 unsigned idx = 0; 1079 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1080 i != e; ++i, ++idx) { 1081 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1082 bool BitField = i->isBitField(); 1083 1084 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1085 // fields, it has class MEMORY. 1086 // 1087 // Note, skip this test for bit-fields, see below. 1088 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1089 Lo = Memory; 1090 return; 1091 } 1092 1093 // Classify this field. 1094 // 1095 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1096 // exceeds a single eightbyte, each is classified 1097 // separately. Each eightbyte gets initialized to class 1098 // NO_CLASS. 1099 Class FieldLo, FieldHi; 1100 1101 // Bit-fields require special handling, they do not force the 1102 // structure to be passed in memory even if unaligned, and 1103 // therefore they can straddle an eightbyte. 1104 if (BitField) { 1105 // Ignore padding bit-fields. 1106 if (i->isUnnamedBitfield()) 1107 continue; 1108 1109 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1110 uint64_t Size = 1111 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1112 1113 uint64_t EB_Lo = Offset / 64; 1114 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1115 FieldLo = FieldHi = NoClass; 1116 if (EB_Lo) { 1117 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1118 FieldLo = NoClass; 1119 FieldHi = Integer; 1120 } else { 1121 FieldLo = Integer; 1122 FieldHi = EB_Hi ? Integer : NoClass; 1123 } 1124 } else 1125 classify(i->getType(), Offset, FieldLo, FieldHi); 1126 Lo = merge(Lo, FieldLo); 1127 Hi = merge(Hi, FieldHi); 1128 if (Lo == Memory || Hi == Memory) 1129 break; 1130 } 1131 1132 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1133 // 1134 // (a) If one of the classes is MEMORY, the whole argument is 1135 // passed in memory. 1136 // 1137 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1138 1139 // The first of these conditions is guaranteed by how we implement 1140 // the merge (just bail). 1141 // 1142 // The second condition occurs in the case of unions; for example 1143 // union { _Complex double; unsigned; }. 1144 if (Hi == Memory) 1145 Lo = Memory; 1146 if (Hi == SSEUp && Lo != SSE) 1147 Hi = SSE; 1148 } 1149} 1150 1151ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1152 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1153 // place naturally. 1154 if (!isAggregateTypeForABI(Ty)) { 1155 // Treat an enum type as its underlying type. 1156 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1157 Ty = EnumTy->getDecl()->getIntegerType(); 1158 1159 return (Ty->isPromotableIntegerType() ? 1160 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1161 } 1162 1163 return ABIArgInfo::getIndirect(0); 1164} 1165 1166ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1167 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1168 // place naturally. 1169 if (!isAggregateTypeForABI(Ty)) { 1170 // Treat an enum type as its underlying type. 1171 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1172 Ty = EnumTy->getDecl()->getIntegerType(); 1173 1174 return (Ty->isPromotableIntegerType() ? 1175 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1176 } 1177 1178 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1179 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1180 1181 // Compute the byval alignment. We trust the back-end to honor the 1182 // minimum ABI alignment for byval, to make cleaner IR. 1183 const unsigned MinABIAlign = 8; 1184 unsigned Align = getContext().getTypeAlign(Ty) / 8; 1185 if (Align > MinABIAlign) 1186 return ABIArgInfo::getIndirect(Align); 1187 return ABIArgInfo::getIndirect(0); 1188} 1189 1190/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1191/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1192/// vector register. 1193const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1194 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1195 1196 // Wrapper structs that just contain vectors are passed just like vectors, 1197 // strip them off if present. 1198 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1199 while (STy && STy->getNumElements() == 1) { 1200 IRType = STy->getElementType(0); 1201 STy = dyn_cast<llvm::StructType>(IRType); 1202 } 1203 1204 // If the preferred type is a 16-byte vector, prefer to pass it. 1205 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1206 const llvm::Type *EltTy = VT->getElementType(); 1207 if (VT->getBitWidth() == 128 && 1208 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1209 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1210 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1211 EltTy->isIntegerTy(128))) 1212 return VT; 1213 } 1214 1215 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1216} 1217 1218/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1219/// is known to either be off the end of the specified type or being in 1220/// alignment padding. The user type specified is known to be at most 128 bits 1221/// in size, and have passed through X86_64ABIInfo::classify with a successful 1222/// classification that put one of the two halves in the INTEGER class. 1223/// 1224/// It is conservatively correct to return false. 1225static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1226 unsigned EndBit, ASTContext &Context) { 1227 // If the bytes being queried are off the end of the type, there is no user 1228 // data hiding here. This handles analysis of builtins, vectors and other 1229 // types that don't contain interesting padding. 1230 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1231 if (TySize <= StartBit) 1232 return true; 1233 1234 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1235 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1236 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1237 1238 // Check each element to see if the element overlaps with the queried range. 1239 for (unsigned i = 0; i != NumElts; ++i) { 1240 // If the element is after the span we care about, then we're done.. 1241 unsigned EltOffset = i*EltSize; 1242 if (EltOffset >= EndBit) break; 1243 1244 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1245 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1246 EndBit-EltOffset, Context)) 1247 return false; 1248 } 1249 // If it overlaps no elements, then it is safe to process as padding. 1250 return true; 1251 } 1252 1253 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1254 const RecordDecl *RD = RT->getDecl(); 1255 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1256 1257 // If this is a C++ record, check the bases first. 1258 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1259 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1260 e = CXXRD->bases_end(); i != e; ++i) { 1261 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1262 "Unexpected base class!"); 1263 const CXXRecordDecl *Base = 1264 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1265 1266 // If the base is after the span we care about, ignore it. 1267 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffset(Base); 1268 if (BaseOffset >= EndBit) continue; 1269 1270 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1271 if (!BitsContainNoUserData(i->getType(), BaseStart, 1272 EndBit-BaseOffset, Context)) 1273 return false; 1274 } 1275 } 1276 1277 // Verify that no field has data that overlaps the region of interest. Yes 1278 // this could be sped up a lot by being smarter about queried fields, 1279 // however we're only looking at structs up to 16 bytes, so we don't care 1280 // much. 1281 unsigned idx = 0; 1282 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1283 i != e; ++i, ++idx) { 1284 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1285 1286 // If we found a field after the region we care about, then we're done. 1287 if (FieldOffset >= EndBit) break; 1288 1289 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1290 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1291 Context)) 1292 return false; 1293 } 1294 1295 // If nothing in this record overlapped the area of interest, then we're 1296 // clean. 1297 return true; 1298 } 1299 1300 return false; 1301} 1302 1303/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1304/// float member at the specified offset. For example, {int,{float}} has a 1305/// float at offset 4. It is conservatively correct for this routine to return 1306/// false. 1307static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1308 const llvm::TargetData &TD) { 1309 // Base case if we find a float. 1310 if (IROffset == 0 && IRType->isFloatTy()) 1311 return true; 1312 1313 // If this is a struct, recurse into the field at the specified offset. 1314 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1315 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1316 unsigned Elt = SL->getElementContainingOffset(IROffset); 1317 IROffset -= SL->getElementOffset(Elt); 1318 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1319 } 1320 1321 // If this is an array, recurse into the field at the specified offset. 1322 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1323 const llvm::Type *EltTy = ATy->getElementType(); 1324 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1325 IROffset -= IROffset/EltSize*EltSize; 1326 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1327 } 1328 1329 return false; 1330} 1331 1332 1333/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1334/// low 8 bytes of an XMM register, corresponding to the SSE class. 1335const llvm::Type *X86_64ABIInfo:: 1336GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1337 QualType SourceTy, unsigned SourceOffset) const { 1338 // The only three choices we have are either double, <2 x float>, or float. We 1339 // pass as float if the last 4 bytes is just padding. This happens for 1340 // structs that contain 3 floats. 1341 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1342 SourceOffset*8+64, getContext())) 1343 return llvm::Type::getFloatTy(getVMContext()); 1344 1345 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1346 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1347 // case. 1348 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1349 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1350 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1351 1352 return llvm::Type::getDoubleTy(getVMContext()); 1353} 1354 1355 1356/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1357/// an 8-byte GPR. This means that we either have a scalar or we are talking 1358/// about the high or low part of an up-to-16-byte struct. This routine picks 1359/// the best LLVM IR type to represent this, which may be i64 or may be anything 1360/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1361/// etc). 1362/// 1363/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1364/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1365/// the 8-byte value references. PrefType may be null. 1366/// 1367/// SourceTy is the source level type for the entire argument. SourceOffset is 1368/// an offset into this that we're processing (which is always either 0 or 8). 1369/// 1370const llvm::Type *X86_64ABIInfo:: 1371GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1372 QualType SourceTy, unsigned SourceOffset) const { 1373 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1374 // returning an 8-byte unit starting with it. See if we can safely use it. 1375 if (IROffset == 0) { 1376 // Pointers and int64's always fill the 8-byte unit. 1377 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1378 return IRType; 1379 1380 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1381 // goodness in the source type is just tail padding. This is allowed to 1382 // kick in for struct {double,int} on the int, but not on 1383 // struct{double,int,int} because we wouldn't return the second int. We 1384 // have to do this analysis on the source type because we can't depend on 1385 // unions being lowered a specific way etc. 1386 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1387 IRType->isIntegerTy(32)) { 1388 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1389 1390 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1391 SourceOffset*8+64, getContext())) 1392 return IRType; 1393 } 1394 } 1395 1396 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1397 // If this is a struct, recurse into the field at the specified offset. 1398 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1399 if (IROffset < SL->getSizeInBytes()) { 1400 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1401 IROffset -= SL->getElementOffset(FieldIdx); 1402 1403 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1404 SourceTy, SourceOffset); 1405 } 1406 } 1407 1408 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1409 const llvm::Type *EltTy = ATy->getElementType(); 1410 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1411 unsigned EltOffset = IROffset/EltSize*EltSize; 1412 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1413 SourceOffset); 1414 } 1415 1416 // Okay, we don't have any better idea of what to pass, so we pass this in an 1417 // integer register that isn't too big to fit the rest of the struct. 1418 unsigned TySizeInBytes = 1419 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1420 1421 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1422 1423 // It is always safe to classify this as an integer type up to i64 that 1424 // isn't larger than the structure. 1425 return llvm::IntegerType::get(getVMContext(), 1426 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1427} 1428 1429ABIArgInfo X86_64ABIInfo:: 1430classifyReturnType(QualType RetTy) const { 1431 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1432 // classification algorithm. 1433 X86_64ABIInfo::Class Lo, Hi; 1434 classify(RetTy, 0, Lo, Hi); 1435 1436 // Check some invariants. 1437 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1438 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1439 1440 const llvm::Type *ResType = 0; 1441 switch (Lo) { 1442 case NoClass: 1443 if (Hi == NoClass) 1444 return ABIArgInfo::getIgnore(); 1445 // If the low part is just padding, it takes no register, leave ResType 1446 // null. 1447 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1448 "Unknown missing lo part"); 1449 break; 1450 1451 case SSEUp: 1452 case X87Up: 1453 assert(0 && "Invalid classification for lo word."); 1454 1455 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1456 // hidden argument. 1457 case Memory: 1458 return getIndirectReturnResult(RetTy); 1459 1460 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1461 // available register of the sequence %rax, %rdx is used. 1462 case Integer: 1463 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1464 RetTy, 0); 1465 1466 // If we have a sign or zero extended integer, make sure to return Extend 1467 // so that the parameter gets the right LLVM IR attributes. 1468 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1469 // Treat an enum type as its underlying type. 1470 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1471 RetTy = EnumTy->getDecl()->getIntegerType(); 1472 1473 if (RetTy->isIntegralOrEnumerationType() && 1474 RetTy->isPromotableIntegerType()) 1475 return ABIArgInfo::getExtend(); 1476 } 1477 break; 1478 1479 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1480 // available SSE register of the sequence %xmm0, %xmm1 is used. 1481 case SSE: 1482 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1483 break; 1484 1485 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1486 // returned on the X87 stack in %st0 as 80-bit x87 number. 1487 case X87: 1488 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1489 break; 1490 1491 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1492 // part of the value is returned in %st0 and the imaginary part in 1493 // %st1. 1494 case ComplexX87: 1495 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1496 ResType = llvm::StructType::get(getVMContext(), 1497 llvm::Type::getX86_FP80Ty(getVMContext()), 1498 llvm::Type::getX86_FP80Ty(getVMContext()), 1499 NULL); 1500 break; 1501 } 1502 1503 const llvm::Type *HighPart = 0; 1504 switch (Hi) { 1505 // Memory was handled previously and X87 should 1506 // never occur as a hi class. 1507 case Memory: 1508 case X87: 1509 assert(0 && "Invalid classification for hi word."); 1510 1511 case ComplexX87: // Previously handled. 1512 case NoClass: 1513 break; 1514 1515 case Integer: 1516 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1517 8, RetTy, 8); 1518 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1519 return ABIArgInfo::getDirect(HighPart, 8); 1520 break; 1521 case SSE: 1522 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1523 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1524 return ABIArgInfo::getDirect(HighPart, 8); 1525 break; 1526 1527 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1528 // is passed in the upper half of the last used SSE register. 1529 // 1530 // SSEUP should always be preceeded by SSE, just widen. 1531 case SSEUp: 1532 assert(Lo == SSE && "Unexpected SSEUp classification."); 1533 ResType = Get16ByteVectorType(RetTy); 1534 break; 1535 1536 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1537 // returned together with the previous X87 value in %st0. 1538 case X87Up: 1539 // If X87Up is preceeded by X87, we don't need to do 1540 // anything. However, in some cases with unions it may not be 1541 // preceeded by X87. In such situations we follow gcc and pass the 1542 // extra bits in an SSE reg. 1543 if (Lo != X87) { 1544 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1545 8, RetTy, 8); 1546 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1547 return ABIArgInfo::getDirect(HighPart, 8); 1548 } 1549 break; 1550 } 1551 1552 // If a high part was specified, merge it together with the low part. It is 1553 // known to pass in the high eightbyte of the result. 1554 if (HighPart) 1555 ResType = llvm::StructType::get(getVMContext(), ResType, HighPart, NULL); 1556 1557 return ABIArgInfo::getDirect(ResType); 1558} 1559 1560ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1561 unsigned &neededSSE) const { 1562 X86_64ABIInfo::Class Lo, Hi; 1563 classify(Ty, 0, Lo, Hi); 1564 1565 // Check some invariants. 1566 // FIXME: Enforce these by construction. 1567 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1568 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1569 1570 neededInt = 0; 1571 neededSSE = 0; 1572 const llvm::Type *ResType = 0; 1573 switch (Lo) { 1574 case NoClass: 1575 if (Hi == NoClass) 1576 return ABIArgInfo::getIgnore(); 1577 // If the low part is just padding, it takes no register, leave ResType 1578 // null. 1579 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1580 "Unknown missing lo part"); 1581 break; 1582 1583 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1584 // on the stack. 1585 case Memory: 1586 1587 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1588 // COMPLEX_X87, it is passed in memory. 1589 case X87: 1590 case ComplexX87: 1591 return getIndirectResult(Ty); 1592 1593 case SSEUp: 1594 case X87Up: 1595 assert(0 && "Invalid classification for lo word."); 1596 1597 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1598 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1599 // and %r9 is used. 1600 case Integer: 1601 ++neededInt; 1602 1603 // Pick an 8-byte type based on the preferred type. 1604 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1605 1606 // If we have a sign or zero extended integer, make sure to return Extend 1607 // so that the parameter gets the right LLVM IR attributes. 1608 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1609 // Treat an enum type as its underlying type. 1610 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1611 Ty = EnumTy->getDecl()->getIntegerType(); 1612 1613 if (Ty->isIntegralOrEnumerationType() && 1614 Ty->isPromotableIntegerType()) 1615 return ABIArgInfo::getExtend(); 1616 } 1617 1618 break; 1619 1620 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1621 // available SSE register is used, the registers are taken in the 1622 // order from %xmm0 to %xmm7. 1623 case SSE: 1624 ++neededSSE; 1625 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1626 break; 1627 } 1628 1629 switch (Hi) { 1630 // Memory was handled previously, ComplexX87 and X87 should 1631 // never occur as hi classes, and X87Up must be preceed by X87, 1632 // which is passed in memory. 1633 case Memory: 1634 case X87: 1635 case ComplexX87: 1636 assert(0 && "Invalid classification for hi word."); 1637 break; 1638 1639 case NoClass: break; 1640 1641 case Integer: { 1642 ++neededInt; 1643 // Pick an 8-byte type based on the preferred type. 1644 const llvm::Type *HiType = 1645 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1646 1647 if (Lo == NoClass) // Pass HiType at offset 8 in memory. 1648 return ABIArgInfo::getDirect(HiType, 8); 1649 1650 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1651 break; 1652 } 1653 1654 // X87Up generally doesn't occur here (long double is passed in 1655 // memory), except in situations involving unions. 1656 case X87Up: 1657 case SSE: { 1658 const llvm::Type *HiType = 1659 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1660 1661 if (Lo == NoClass) // Pass HiType at offset 8 in memory. 1662 return ABIArgInfo::getDirect(HiType, 8); 1663 1664 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1665 ++neededSSE; 1666 break; 1667 } 1668 1669 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1670 // eightbyte is passed in the upper half of the last used SSE 1671 // register. This only happens when 128-bit vectors are passed. 1672 case SSEUp: 1673 assert(Lo == SSE && "Unexpected SSEUp classification"); 1674 ResType = Get16ByteVectorType(Ty); 1675 break; 1676 } 1677 1678 return ABIArgInfo::getDirect(ResType); 1679} 1680 1681void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1682 1683 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1684 1685 // Keep track of the number of assigned registers. 1686 unsigned freeIntRegs = 6, freeSSERegs = 8; 1687 1688 // If the return value is indirect, then the hidden argument is consuming one 1689 // integer register. 1690 if (FI.getReturnInfo().isIndirect()) 1691 --freeIntRegs; 1692 1693 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1694 // get assigned (in left-to-right order) for passing as follows... 1695 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1696 it != ie; ++it) { 1697 unsigned neededInt, neededSSE; 1698 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1699 1700 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1701 // eightbyte of an argument, the whole argument is passed on the 1702 // stack. If registers have already been assigned for some 1703 // eightbytes of such an argument, the assignments get reverted. 1704 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1705 freeIntRegs -= neededInt; 1706 freeSSERegs -= neededSSE; 1707 } else { 1708 it->info = getIndirectResult(it->type); 1709 } 1710 } 1711} 1712 1713static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1714 QualType Ty, 1715 CodeGenFunction &CGF) { 1716 llvm::Value *overflow_arg_area_p = 1717 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1718 llvm::Value *overflow_arg_area = 1719 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1720 1721 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1722 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1723 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1724 if (Align > 8) { 1725 // Note that we follow the ABI & gcc here, even though the type 1726 // could in theory have an alignment greater than 16. This case 1727 // shouldn't ever matter in practice. 1728 1729 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1730 llvm::Value *Offset = 1731 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1732 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1733 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1734 CGF.Int64Ty); 1735 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1736 overflow_arg_area = 1737 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1738 overflow_arg_area->getType(), 1739 "overflow_arg_area.align"); 1740 } 1741 1742 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1743 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1744 llvm::Value *Res = 1745 CGF.Builder.CreateBitCast(overflow_arg_area, 1746 llvm::PointerType::getUnqual(LTy)); 1747 1748 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1749 // l->overflow_arg_area + sizeof(type). 1750 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1751 // an 8 byte boundary. 1752 1753 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1754 llvm::Value *Offset = 1755 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1756 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1757 "overflow_arg_area.next"); 1758 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1759 1760 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1761 return Res; 1762} 1763 1764llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1765 CodeGenFunction &CGF) const { 1766 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1767 1768 // Assume that va_list type is correct; should be pointer to LLVM type: 1769 // struct { 1770 // i32 gp_offset; 1771 // i32 fp_offset; 1772 // i8* overflow_arg_area; 1773 // i8* reg_save_area; 1774 // }; 1775 unsigned neededInt, neededSSE; 1776 1777 Ty = CGF.getContext().getCanonicalType(Ty); 1778 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1779 1780 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1781 // in the registers. If not go to step 7. 1782 if (!neededInt && !neededSSE) 1783 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1784 1785 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1786 // general purpose registers needed to pass type and num_fp to hold 1787 // the number of floating point registers needed. 1788 1789 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1790 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1791 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1792 // 1793 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1794 // register save space). 1795 1796 llvm::Value *InRegs = 0; 1797 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1798 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1799 if (neededInt) { 1800 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1801 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1802 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1803 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1804 } 1805 1806 if (neededSSE) { 1807 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1808 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1809 llvm::Value *FitsInFP = 1810 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1811 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1812 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1813 } 1814 1815 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1816 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1817 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1818 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1819 1820 // Emit code to load the value if it was passed in registers. 1821 1822 CGF.EmitBlock(InRegBlock); 1823 1824 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1825 // an offset of l->gp_offset and/or l->fp_offset. This may require 1826 // copying to a temporary location in case the parameter is passed 1827 // in different register classes or requires an alignment greater 1828 // than 8 for general purpose registers and 16 for XMM registers. 1829 // 1830 // FIXME: This really results in shameful code when we end up needing to 1831 // collect arguments from different places; often what should result in a 1832 // simple assembling of a structure from scattered addresses has many more 1833 // loads than necessary. Can we clean this up? 1834 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1835 llvm::Value *RegAddr = 1836 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1837 "reg_save_area"); 1838 if (neededInt && neededSSE) { 1839 // FIXME: Cleanup. 1840 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 1841 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1842 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1843 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1844 const llvm::Type *TyLo = ST->getElementType(0); 1845 const llvm::Type *TyHi = ST->getElementType(1); 1846 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 1847 "Unexpected ABI info for mixed regs"); 1848 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1849 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1850 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1851 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1852 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1853 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1854 llvm::Value *V = 1855 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1856 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1857 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1858 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1859 1860 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1861 llvm::PointerType::getUnqual(LTy)); 1862 } else if (neededInt) { 1863 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1864 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1865 llvm::PointerType::getUnqual(LTy)); 1866 } else if (neededSSE == 1) { 1867 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1868 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1869 llvm::PointerType::getUnqual(LTy)); 1870 } else { 1871 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1872 // SSE registers are spaced 16 bytes apart in the register save 1873 // area, we need to collect the two eightbytes together. 1874 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1875 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 1876 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1877 const llvm::Type *DblPtrTy = 1878 llvm::PointerType::getUnqual(DoubleTy); 1879 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1880 DoubleTy, NULL); 1881 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1882 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1883 DblPtrTy)); 1884 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1885 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1886 DblPtrTy)); 1887 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1888 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1889 llvm::PointerType::getUnqual(LTy)); 1890 } 1891 1892 // AMD64-ABI 3.5.7p5: Step 5. Set: 1893 // l->gp_offset = l->gp_offset + num_gp * 8 1894 // l->fp_offset = l->fp_offset + num_fp * 16. 1895 if (neededInt) { 1896 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 1897 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1898 gp_offset_p); 1899 } 1900 if (neededSSE) { 1901 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 1902 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1903 fp_offset_p); 1904 } 1905 CGF.EmitBranch(ContBlock); 1906 1907 // Emit code to load the value if it was passed in memory. 1908 1909 CGF.EmitBlock(InMemBlock); 1910 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1911 1912 // Return the appropriate result. 1913 1914 CGF.EmitBlock(ContBlock); 1915 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1916 "vaarg.addr"); 1917 ResAddr->reserveOperandSpace(2); 1918 ResAddr->addIncoming(RegAddr, InRegBlock); 1919 ResAddr->addIncoming(MemAddr, InMemBlock); 1920 return ResAddr; 1921} 1922 1923llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1924 CodeGenFunction &CGF) const { 1925 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1926 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1927 1928 CGBuilderTy &Builder = CGF.Builder; 1929 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1930 "ap"); 1931 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1932 llvm::Type *PTy = 1933 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1934 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1935 1936 uint64_t Offset = 1937 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 1938 llvm::Value *NextAddr = 1939 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 1940 "ap.next"); 1941 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1942 1943 return AddrTyped; 1944} 1945 1946//===----------------------------------------------------------------------===// 1947// PIC16 ABI Implementation 1948//===----------------------------------------------------------------------===// 1949 1950namespace { 1951 1952class PIC16ABIInfo : public ABIInfo { 1953public: 1954 PIC16ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 1955 1956 ABIArgInfo classifyReturnType(QualType RetTy) const; 1957 1958 ABIArgInfo classifyArgumentType(QualType RetTy) const; 1959 1960 virtual void computeInfo(CGFunctionInfo &FI) const { 1961 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1962 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1963 it != ie; ++it) 1964 it->info = classifyArgumentType(it->type); 1965 } 1966 1967 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1968 CodeGenFunction &CGF) const; 1969}; 1970 1971class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1972public: 1973 PIC16TargetCodeGenInfo(CodeGenTypes &CGT) 1974 : TargetCodeGenInfo(new PIC16ABIInfo(CGT)) {} 1975}; 1976 1977} 1978 1979ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy) const { 1980 if (RetTy->isVoidType()) { 1981 return ABIArgInfo::getIgnore(); 1982 } else { 1983 return ABIArgInfo::getDirect(); 1984 } 1985} 1986 1987ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty) const { 1988 return ABIArgInfo::getDirect(); 1989} 1990 1991llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1992 CodeGenFunction &CGF) const { 1993 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1994 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1995 1996 CGBuilderTy &Builder = CGF.Builder; 1997 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1998 "ap"); 1999 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2000 llvm::Type *PTy = 2001 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2002 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2003 2004 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 2005 2006 llvm::Value *NextAddr = 2007 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 2008 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 2009 "ap.next"); 2010 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2011 2012 return AddrTyped; 2013} 2014 2015 2016// PowerPC-32 2017 2018namespace { 2019class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2020public: 2021 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2022 2023 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2024 // This is recovered from gcc output. 2025 return 1; // r1 is the dedicated stack pointer 2026 } 2027 2028 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2029 llvm::Value *Address) const; 2030}; 2031 2032} 2033 2034bool 2035PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2036 llvm::Value *Address) const { 2037 // This is calculated from the LLVM and GCC tables and verified 2038 // against gcc output. AFAIK all ABIs use the same encoding. 2039 2040 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2041 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2042 2043 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2044 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2045 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2046 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2047 2048 // 0-31: r0-31, the 4-byte general-purpose registers 2049 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2050 2051 // 32-63: fp0-31, the 8-byte floating-point registers 2052 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2053 2054 // 64-76 are various 4-byte special-purpose registers: 2055 // 64: mq 2056 // 65: lr 2057 // 66: ctr 2058 // 67: ap 2059 // 68-75 cr0-7 2060 // 76: xer 2061 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2062 2063 // 77-108: v0-31, the 16-byte vector registers 2064 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2065 2066 // 109: vrsave 2067 // 110: vscr 2068 // 111: spe_acc 2069 // 112: spefscr 2070 // 113: sfp 2071 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2072 2073 return false; 2074} 2075 2076 2077//===----------------------------------------------------------------------===// 2078// ARM ABI Implementation 2079//===----------------------------------------------------------------------===// 2080 2081namespace { 2082 2083class ARMABIInfo : public ABIInfo { 2084public: 2085 enum ABIKind { 2086 APCS = 0, 2087 AAPCS = 1, 2088 AAPCS_VFP 2089 }; 2090 2091private: 2092 ABIKind Kind; 2093 2094public: 2095 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2096 2097private: 2098 ABIKind getABIKind() const { return Kind; } 2099 2100 ABIArgInfo classifyReturnType(QualType RetTy) const; 2101 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2102 2103 virtual void computeInfo(CGFunctionInfo &FI) const; 2104 2105 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2106 CodeGenFunction &CGF) const; 2107}; 2108 2109class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2110public: 2111 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2112 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2113 2114 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2115 return 13; 2116 } 2117}; 2118 2119} 2120 2121void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2122 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2123 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2124 it != ie; ++it) 2125 it->info = classifyArgumentType(it->type); 2126 2127 const llvm::Triple &Triple(getContext().Target.getTriple()); 2128 llvm::CallingConv::ID DefaultCC; 2129 if (Triple.getEnvironmentName() == "gnueabi" || 2130 Triple.getEnvironmentName() == "eabi") 2131 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2132 else 2133 DefaultCC = llvm::CallingConv::ARM_APCS; 2134 2135 switch (getABIKind()) { 2136 case APCS: 2137 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2138 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2139 break; 2140 2141 case AAPCS: 2142 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2143 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2144 break; 2145 2146 case AAPCS_VFP: 2147 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2148 break; 2149 } 2150} 2151 2152ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2153 if (!isAggregateTypeForABI(Ty)) { 2154 // Treat an enum type as its underlying type. 2155 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2156 Ty = EnumTy->getDecl()->getIntegerType(); 2157 2158 return (Ty->isPromotableIntegerType() ? 2159 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2160 } 2161 2162 // Ignore empty records. 2163 if (isEmptyRecord(getContext(), Ty, true)) 2164 return ABIArgInfo::getIgnore(); 2165 2166 // Structures with either a non-trivial destructor or a non-trivial 2167 // copy constructor are always indirect. 2168 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2169 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2170 2171 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2172 // backend doesn't support byval. 2173 // FIXME: This doesn't handle alignment > 64 bits. 2174 const llvm::Type* ElemTy; 2175 unsigned SizeRegs; 2176 if (getContext().getTypeAlign(Ty) > 32) { 2177 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2178 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2179 } else { 2180 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2181 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2182 } 2183 std::vector<const llvm::Type*> LLVMFields; 2184 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 2185 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields, 2186 true); 2187 return ABIArgInfo::getDirect(STy); 2188} 2189 2190static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2191 llvm::LLVMContext &VMContext) { 2192 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2193 // is called integer-like if its size is less than or equal to one word, and 2194 // the offset of each of its addressable sub-fields is zero. 2195 2196 uint64_t Size = Context.getTypeSize(Ty); 2197 2198 // Check that the type fits in a word. 2199 if (Size > 32) 2200 return false; 2201 2202 // FIXME: Handle vector types! 2203 if (Ty->isVectorType()) 2204 return false; 2205 2206 // Float types are never treated as "integer like". 2207 if (Ty->isRealFloatingType()) 2208 return false; 2209 2210 // If this is a builtin or pointer type then it is ok. 2211 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2212 return true; 2213 2214 // Small complex integer types are "integer like". 2215 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2216 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2217 2218 // Single element and zero sized arrays should be allowed, by the definition 2219 // above, but they are not. 2220 2221 // Otherwise, it must be a record type. 2222 const RecordType *RT = Ty->getAs<RecordType>(); 2223 if (!RT) return false; 2224 2225 // Ignore records with flexible arrays. 2226 const RecordDecl *RD = RT->getDecl(); 2227 if (RD->hasFlexibleArrayMember()) 2228 return false; 2229 2230 // Check that all sub-fields are at offset 0, and are themselves "integer 2231 // like". 2232 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2233 2234 bool HadField = false; 2235 unsigned idx = 0; 2236 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2237 i != e; ++i, ++idx) { 2238 const FieldDecl *FD = *i; 2239 2240 // Bit-fields are not addressable, we only need to verify they are "integer 2241 // like". We still have to disallow a subsequent non-bitfield, for example: 2242 // struct { int : 0; int x } 2243 // is non-integer like according to gcc. 2244 if (FD->isBitField()) { 2245 if (!RD->isUnion()) 2246 HadField = true; 2247 2248 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2249 return false; 2250 2251 continue; 2252 } 2253 2254 // Check if this field is at offset 0. 2255 if (Layout.getFieldOffset(idx) != 0) 2256 return false; 2257 2258 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2259 return false; 2260 2261 // Only allow at most one field in a structure. This doesn't match the 2262 // wording above, but follows gcc in situations with a field following an 2263 // empty structure. 2264 if (!RD->isUnion()) { 2265 if (HadField) 2266 return false; 2267 2268 HadField = true; 2269 } 2270 } 2271 2272 return true; 2273} 2274 2275ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2276 if (RetTy->isVoidType()) 2277 return ABIArgInfo::getIgnore(); 2278 2279 if (!isAggregateTypeForABI(RetTy)) { 2280 // Treat an enum type as its underlying type. 2281 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2282 RetTy = EnumTy->getDecl()->getIntegerType(); 2283 2284 return (RetTy->isPromotableIntegerType() ? 2285 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2286 } 2287 2288 // Structures with either a non-trivial destructor or a non-trivial 2289 // copy constructor are always indirect. 2290 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2291 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2292 2293 // Are we following APCS? 2294 if (getABIKind() == APCS) { 2295 if (isEmptyRecord(getContext(), RetTy, false)) 2296 return ABIArgInfo::getIgnore(); 2297 2298 // Complex types are all returned as packed integers. 2299 // 2300 // FIXME: Consider using 2 x vector types if the back end handles them 2301 // correctly. 2302 if (RetTy->isAnyComplexType()) 2303 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2304 getContext().getTypeSize(RetTy))); 2305 2306 // Integer like structures are returned in r0. 2307 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2308 // Return in the smallest viable integer type. 2309 uint64_t Size = getContext().getTypeSize(RetTy); 2310 if (Size <= 8) 2311 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2312 if (Size <= 16) 2313 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2314 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2315 } 2316 2317 // Otherwise return in memory. 2318 return ABIArgInfo::getIndirect(0); 2319 } 2320 2321 // Otherwise this is an AAPCS variant. 2322 2323 if (isEmptyRecord(getContext(), RetTy, true)) 2324 return ABIArgInfo::getIgnore(); 2325 2326 // Aggregates <= 4 bytes are returned in r0; other aggregates 2327 // are returned indirectly. 2328 uint64_t Size = getContext().getTypeSize(RetTy); 2329 if (Size <= 32) { 2330 // Return in the smallest viable integer type. 2331 if (Size <= 8) 2332 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2333 if (Size <= 16) 2334 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2335 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2336 } 2337 2338 return ABIArgInfo::getIndirect(0); 2339} 2340 2341llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2342 CodeGenFunction &CGF) const { 2343 // FIXME: Need to handle alignment 2344 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2345 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2346 2347 CGBuilderTy &Builder = CGF.Builder; 2348 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2349 "ap"); 2350 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2351 llvm::Type *PTy = 2352 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2353 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2354 2355 uint64_t Offset = 2356 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2357 llvm::Value *NextAddr = 2358 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2359 "ap.next"); 2360 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2361 2362 return AddrTyped; 2363} 2364 2365ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 2366 if (RetTy->isVoidType()) 2367 return ABIArgInfo::getIgnore(); 2368 2369 if (isAggregateTypeForABI(RetTy)) 2370 return ABIArgInfo::getIndirect(0); 2371 2372 // Treat an enum type as its underlying type. 2373 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2374 RetTy = EnumTy->getDecl()->getIntegerType(); 2375 2376 return (RetTy->isPromotableIntegerType() ? 2377 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2378} 2379 2380//===----------------------------------------------------------------------===// 2381// SystemZ ABI Implementation 2382//===----------------------------------------------------------------------===// 2383 2384namespace { 2385 2386class SystemZABIInfo : public ABIInfo { 2387public: 2388 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2389 2390 bool isPromotableIntegerType(QualType Ty) const; 2391 2392 ABIArgInfo classifyReturnType(QualType RetTy) const; 2393 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2394 2395 virtual void computeInfo(CGFunctionInfo &FI) const { 2396 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2397 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2398 it != ie; ++it) 2399 it->info = classifyArgumentType(it->type); 2400 } 2401 2402 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2403 CodeGenFunction &CGF) const; 2404}; 2405 2406class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2407public: 2408 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2409 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2410}; 2411 2412} 2413 2414bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2415 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2416 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2417 switch (BT->getKind()) { 2418 case BuiltinType::Bool: 2419 case BuiltinType::Char_S: 2420 case BuiltinType::Char_U: 2421 case BuiltinType::SChar: 2422 case BuiltinType::UChar: 2423 case BuiltinType::Short: 2424 case BuiltinType::UShort: 2425 case BuiltinType::Int: 2426 case BuiltinType::UInt: 2427 return true; 2428 default: 2429 return false; 2430 } 2431 return false; 2432} 2433 2434llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2435 CodeGenFunction &CGF) const { 2436 // FIXME: Implement 2437 return 0; 2438} 2439 2440 2441ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2442 if (RetTy->isVoidType()) 2443 return ABIArgInfo::getIgnore(); 2444 if (isAggregateTypeForABI(RetTy)) 2445 return ABIArgInfo::getIndirect(0); 2446 2447 return (isPromotableIntegerType(RetTy) ? 2448 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2449} 2450 2451ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2452 if (isAggregateTypeForABI(Ty)) 2453 return ABIArgInfo::getIndirect(0); 2454 2455 return (isPromotableIntegerType(Ty) ? 2456 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2457} 2458 2459//===----------------------------------------------------------------------===// 2460// MSP430 ABI Implementation 2461//===----------------------------------------------------------------------===// 2462 2463namespace { 2464 2465class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2466public: 2467 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2468 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2469 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2470 CodeGen::CodeGenModule &M) const; 2471}; 2472 2473} 2474 2475void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2476 llvm::GlobalValue *GV, 2477 CodeGen::CodeGenModule &M) const { 2478 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2479 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2480 // Handle 'interrupt' attribute: 2481 llvm::Function *F = cast<llvm::Function>(GV); 2482 2483 // Step 1: Set ISR calling convention. 2484 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2485 2486 // Step 2: Add attributes goodness. 2487 F->addFnAttr(llvm::Attribute::NoInline); 2488 2489 // Step 3: Emit ISR vector alias. 2490 unsigned Num = attr->getNumber() + 0xffe0; 2491 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2492 "vector_" + 2493 llvm::LowercaseString(llvm::utohexstr(Num)), 2494 GV, &M.getModule()); 2495 } 2496 } 2497} 2498 2499//===----------------------------------------------------------------------===// 2500// MIPS ABI Implementation. This works for both little-endian and 2501// big-endian variants. 2502//===----------------------------------------------------------------------===// 2503 2504namespace { 2505class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2506public: 2507 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2508 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2509 2510 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2511 return 29; 2512 } 2513 2514 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2515 llvm::Value *Address) const; 2516}; 2517} 2518 2519bool 2520MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2521 llvm::Value *Address) const { 2522 // This information comes from gcc's implementation, which seems to 2523 // as canonical as it gets. 2524 2525 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2526 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2527 2528 // Everything on MIPS is 4 bytes. Double-precision FP registers 2529 // are aliased to pairs of single-precision FP registers. 2530 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2531 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2532 2533 // 0-31 are the general purpose registers, $0 - $31. 2534 // 32-63 are the floating-point registers, $f0 - $f31. 2535 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2536 // 66 is the (notional, I think) register for signal-handler return. 2537 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2538 2539 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2540 // They are one bit wide and ignored here. 2541 2542 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2543 // (coprocessor 1 is the FP unit) 2544 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2545 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2546 // 176-181 are the DSP accumulator registers. 2547 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2548 2549 return false; 2550} 2551 2552 2553const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2554 if (TheTargetCodeGenInfo) 2555 return *TheTargetCodeGenInfo; 2556 2557 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2558 // free it. 2559 2560 const llvm::Triple &Triple = getContext().Target.getTriple(); 2561 switch (Triple.getArch()) { 2562 default: 2563 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2564 2565 case llvm::Triple::mips: 2566 case llvm::Triple::mipsel: 2567 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2568 2569 case llvm::Triple::arm: 2570 case llvm::Triple::thumb: 2571 // FIXME: We want to know the float calling convention as well. 2572 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2573 return *(TheTargetCodeGenInfo = 2574 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS)); 2575 2576 return *(TheTargetCodeGenInfo = 2577 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS)); 2578 2579 case llvm::Triple::pic16: 2580 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo(Types)); 2581 2582 case llvm::Triple::ppc: 2583 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2584 2585 case llvm::Triple::systemz: 2586 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2587 2588 case llvm::Triple::msp430: 2589 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2590 2591 case llvm::Triple::x86: 2592 switch (Triple.getOS()) { 2593 case llvm::Triple::Darwin: 2594 return *(TheTargetCodeGenInfo = 2595 new X86_32TargetCodeGenInfo(Types, true, true)); 2596 case llvm::Triple::Cygwin: 2597 case llvm::Triple::MinGW32: 2598 case llvm::Triple::AuroraUX: 2599 case llvm::Triple::DragonFly: 2600 case llvm::Triple::FreeBSD: 2601 case llvm::Triple::OpenBSD: 2602 return *(TheTargetCodeGenInfo = 2603 new X86_32TargetCodeGenInfo(Types, false, true)); 2604 2605 default: 2606 return *(TheTargetCodeGenInfo = 2607 new X86_32TargetCodeGenInfo(Types, false, false)); 2608 } 2609 2610 case llvm::Triple::x86_64: 2611 switch (Triple.getOS()) { 2612 case llvm::Triple::Win32: 2613 case llvm::Triple::MinGW64: 2614 case llvm::Triple::Cygwin: 2615 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 2616 default: 2617 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2618 } 2619 } 2620} 2621