1633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 2633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * This file is subject to the terms and conditions of the GNU General Public 3633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * License. See the file "COPYING" in the main directory of this archive 4633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * for more details. 5633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 6633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Copyright (C) 1985 MIPS Computer Systems, Inc. 7633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle 8633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. 9633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 10633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#ifndef _ASM_REGDEF_H 11633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define _ASM_REGDEF_H 12633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 13633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#include <asm/sgidefs.h> 14633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 15633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#if _MIPS_SIM == _MIPS_SIM_ABI32 16633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 17633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 18633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Symbolic register names for 32 bit ABI 19633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 20633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define zero $0 /* wired zero */ 21633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define AT $1 /* assembler temp - uppercase because of ".set at" */ 22633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define v0 $2 /* return value */ 23633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define v1 $3 24633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a0 $4 /* argument registers */ 25633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a1 $5 26633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a2 $6 27633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a3 $7 28633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t0 $8 /* caller saved */ 29633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t1 $9 30633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t2 $10 31633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t3 $11 32633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t4 $12 33633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t5 $13 34633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t6 $14 35633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t7 $15 36633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s0 $16 /* callee saved */ 37633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s1 $17 38633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s2 $18 39633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s3 $19 40633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s4 $20 41633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s5 $21 42633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s6 $22 43633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s7 $23 44633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t8 $24 /* caller saved */ 45633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t9 $25 46633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define jp $25 /* PIC jump register */ 47633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define k0 $26 /* kernel scratch */ 48633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define k1 $27 49633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define gp $28 /* global pointer */ 50633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define sp $29 /* stack pointer */ 51633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define fp $30 /* frame pointer */ 52633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s8 $30 /* same like fp! */ 53633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ra $31 /* return address */ 54633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 55633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 56633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 5722e2427e42fffbd75325c615729f46644c08f028Raghu Gandham#if ((_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)) 58633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 59633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define zero $0 /* wired zero */ 60633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define AT $at /* assembler temp - uppercase because of ".set at" */ 61633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define v0 $2 /* return value - caller saved */ 62633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define v1 $3 63633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a0 $4 /* argument registers */ 64633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a1 $5 65633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a2 $6 66633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a3 $7 67633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */ 68633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ta0 $8 69633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a5 $9 70633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ta1 $9 71633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a6 $10 72633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ta2 $10 73633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define a7 $11 74633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ta3 $11 75633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t0 $12 /* caller saved */ 76633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t1 $13 77633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t2 $14 78633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t3 $15 79633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s0 $16 /* callee saved */ 80633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s1 $17 81633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s2 $18 82633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s3 $19 83633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s4 $20 84633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s5 $21 85633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s6 $22 86633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s7 $23 87633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t8 $24 /* caller saved */ 88633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define t9 $25 /* callee address for PIC/temp */ 89633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define jp $25 /* PIC jump register */ 90633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define k0 $26 /* kernel temporary */ 91633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define k1 $27 92633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define gp $28 /* global pointer - caller saved for PIC */ 93633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define sp $29 /* stack pointer */ 94633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define fp $30 /* frame pointer */ 95633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define s8 $30 /* callee saved */ 96633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ra $31 /* return address */ 97633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 98633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ 99633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 100633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* _ASM_REGDEF_H */ 101