1633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 2633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * This file is subject to the terms and conditions of the GNU General Public 3633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * License. See the file "COPYING" in the main directory of this archive 4633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * for more details. 5633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 6633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Derived from IRIX <sys/SN/SN0/addrs.h>, revision 1.126. 7633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 8633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc. 9633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Copyright (C) 1999 by Ralf Baechle 10633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 11633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#ifndef _ASM_SN_SN0_ADDRS_H 12633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define _ASM_SN_SN0_ADDRS_H 13633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 14633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 15633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 16633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * SN0 (on a T5) Address map 17633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 18633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * This file contains a set of definitions and macros which are used 19633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * to reference into the major address spaces (CAC, HSPEC, IO, MSPEC, 20633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * and UNCAC) used by the SN0 architecture. It also contains addresses 21633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * for "major" statically locatable PROM/Kernel data structures, such as 22633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * the partition table, the configuration data structure, etc. 23633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * We make an implicit assumption that the processor using this file 24633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * follows the R10K's provisions for specifying uncached attributes; 25633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * should this change, the base registers may very well become processor- 26633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * dependent. 27633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 28633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * For more information on the address spaces, see the "Local Resources" 29633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * chapter of the Hub specification. 30633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 31633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * NOTE: This header file is included both by C and by assembler source 32633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * files. Please bracket any language-dependent definitions 33633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * appropriately. 34633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 35633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 36633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 37633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Some of the macros here need to be casted to appropriate types when used 38633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * from C. They definitely must not be casted from assembly language so we 39633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * use some new ANSI preprocessor stuff to paste these on where needed. 40633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 41633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 42633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 43633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * The following couple of definitions will eventually need to be variables, 44633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * since the amount of address space assigned to each node depends on 45633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * whether the system is running in N-mode (more nodes with less memory) 46633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * or M-mode (fewer nodes with more memory). We expect that it will 47633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * be a while before we need to make this decision dynamically, though, 48633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * so for now we just use defines bracketed by an ifdef. 49633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 50633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 51633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#ifdef CONFIG_SGI_SN_N_MODE 52633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 53633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_SIZE_BITS 31 54633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_SIZE_BITS 28 55633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 56633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_BITS 9 57633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_BITMASK (0x1ffLL) 58633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_SHFT 31 59633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_META_BITS 5 60633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_LOCAL_BITS 4 61633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 62633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10) 63633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3) 64633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 65633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#else /* !defined(CONFIG_SGI_SN_N_MODE), assume that M-mode is desired */ 66633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 67633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_SIZE_BITS 32 68633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_SIZE_BITS 29 69633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 70633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_BITMASK (0xffLL) 71633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_BITS 8 72633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_SHFT 32 73633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_META_BITS 4 74633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_LOCAL_BITS 4 75633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 76633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) 77633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) 78633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 79633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* !defined(CONFIG_SGI_SN_N_MODE) */ 80633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 81633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) 82633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 83633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) 84633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ 85633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham NASID_SHFT) & NASID_BITMASK) 86633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 87633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#if !defined(__ASSEMBLY__) 88633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 89633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_SWIN_BASE(nasid, widget) \ 90633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \ 91633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham : RAW_NODE_SWIN_BASE(nasid, widget)) 92633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#else /* __ASSEMBLY__ */ 93633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_SWIN_BASE(nasid, widget) \ 94633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) 95633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* __ASSEMBLY__ */ 96633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 97633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 98633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * The following definitions pertain to the IO special address 99633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * space. They define the location of the big and little windows 100633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * of any given node. 101633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 102633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 103633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_INDEX_BITS 3 104633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) 105633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_SIZEMASK (BWIN_SIZE - 1) 106633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_WIDGET_MASK 0x7 107633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) 108633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \ 109633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham (UINT64_CAST(bigwin) << BWIN_SIZE_BITS)) 110633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 111633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) 112633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) 113633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 114633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * Verify if addr belongs to large window address of node with "nasid" 115633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 116633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 117633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * NOTE: "addr" is expected to be XKPHYS address, and NOT physical 118633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * address 119633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 120633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * 121633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 122633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 123633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODE_BWIN_ADDR(nasid, addr) \ 124633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham (((addr) >= NODE_BWIN_BASE0(nasid)) && \ 125633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \ 126633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham BWIN_SIZE))) 127633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 128633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 129633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * The following define the major position-independent aliases used 130633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * in SN0. 131633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * CALIAS -- Varies in size, points to the first n bytes of memory 132633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * on the reader's node. 133633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 134633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 135633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CALIAS_BASE CAC_BASE 136633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 137633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 138633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 139633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) \ 140633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham ((__psunsigned_t)(_base) + (__psunsigned_t)(_off))) 141633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 142633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid))) 143633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 144633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* Turn on sable logging for the processors whose bits are set. */ 145633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define SABLE_LOG_TRIGGER(_map) 146633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 147633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#ifndef __ASSEMBLY__ 148633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define KERN_NMI_ADDR(nasid, slice) \ 149633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + \ 150633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham (IP27_NMI_KREGS_CPU_SIZE * (slice))) 151633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* !__ASSEMBLY__ */ 152633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 153633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#ifdef PROM 154633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 155633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define MISC_PROM_BASE PHYS_TO_K0(0x01300000) 156633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define MISC_PROM_SIZE 0x200000 157633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 158633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define DIAG_BASE PHYS_TO_K0(0x01500000) 159633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define DIAG_SIZE 0x300000 160633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 161633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ROUTE_BASE PHYS_TO_K0(0x01800000) 162633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ROUTE_SIZE 0x200000 163633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 164633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000) 165633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000) 166633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CORP_MAX 32 167633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CORP PHYS_TO_K0(0x01800000) 168633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CORP_SIZE 0x10000 169633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000) 170633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CORP_STKSIZE 0x2000 171633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000) 172633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_DECOMP_SIZE 0xfff00 173633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 174633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_BASE PHYS_TO_K0(0x01a00000) 175633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_BASE_MAPPED (UNCAC_BASE | 0x1fc00000) 176633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_SIZE_MAX 0x100000 177633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 178633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_PCFG PHYS_TO_K0(0x01b00000) 179633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_PCFG_SIZE 0xd0000 180633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000) 181633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ERRDMP_SIZE 0xf000 182633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 183633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000) 184633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000) 185633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_CONSOLE_SIZE 0x200 186633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200) 187633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_NETUART_SIZE 0x100 188633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300) 189633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_UNUSED1_SIZE 0x500 190633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800) 191633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00) 192633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000) 193633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000) 194633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_STACK_SHFT 16 195633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT) 196633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000) 197633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 198633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define SLAVESTACK_BASE PHYS_TO_K0(0x01580000) 199633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define SLAVESTACK_SIZE 0x40000 200633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 201633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ENETBUFS_BASE PHYS_TO_K0(0x01f80000) 202633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ENETBUFS_SIZE 0x20000 203633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 204633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6PROM_BASE PHYS_TO_K0(0x01c00000) 205633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6PROM_SIZE 0x400000 206633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000) 207633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6DPROM_BASE PHYS_TO_K0(0x01c00000) 208633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6DPROM_SIZE 0x200000 209633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 210633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000) 211633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000) 212633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 213633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_INT_LAUNCH 10 /* and 11 */ 214633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_INT_NETUART 12 /* through 17 */ 215633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 216633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* PROM */ 217633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 218633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 219633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * needed by symmon so it needs to be outside #if PROM 220633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 221633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ELSC_SHFT 10 222633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT) 223633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 224633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 225633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * This address is used by IO6PROM to build MemoryDescriptors of 226633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * free memory. This address is important since unix gets loaded 227633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * at this address, and this memory has to be FREE if unix is to 228633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * be loaded. 229633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 230633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 231633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define FREEMEM_BASE PHYS_TO_K0(0x2000000) 232633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 233633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6PROM_STACK_SHFT 14 /* stack per cpu */ 234633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT) 235633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 236633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* 237633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * IP27 PROM vectors 238633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 239633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 240633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000) 241633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008) 242633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010) 243633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018) 244633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020) 245633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028) 246633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030) 247633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038) 248633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040) 249633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048) 250633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 251633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) /* base of UART regs */ 252633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) /* UART command reg */ 253633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) /* UART data reg */ 254633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define KL_I2C_REG MD_UREG0_0 /* I2C reg */ 255633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 256633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#ifndef __ASSEMBLY__ 257633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 258633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham/* Address 0x400 to 0x1000 ualias points to cache error eframe + misc 259633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * CACHE_ERR_SP_PTR could either contain an address to the stack, or 260633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham * the stack could start at CACHE_ERR_SP_PTR 261633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham */ 262633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#if defined(HUB_ERR_STS_WAR) 263633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_EFRAME 0x480 264633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#else /* HUB_ERR_STS_WAR */ 265633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_EFRAME 0x400 266633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* HUB_ERR_STS_WAR */ 267633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 268633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE) 269633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_SP_PTR (0x1000 - 32) /* why -32? TBD */ 270633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_IBASE_PTR (0x1000 - 40) 271633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16) 272633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME) 273633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 274633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* !__ASSEMBLY__ */ 275633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 276633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define _ARCSPROM 277633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 278633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#if defined(HUB_ERR_STS_WAR) 279633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 280633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ERR_STS_WAR_REGISTER IIO_IIBUSERR 281633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) 282633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR) 283633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham /* Used to match addr in error reg. */ 284633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100) 285633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 286633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* HUB_ERR_STS_WAR */ 287633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham 288633c3473533ad9f2cca069b22cc5d95cd4e3510bRaghu Gandham#endif /* _ASM_SN_SN0_ADDRS_H */ 289