IfConversion.cpp revision 3bf912593301152b65accb9d9c37a95172f1df5a
1//===-- IfConversion.cpp - Machine code if conversion pass. ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the machine instruction level if-conversion pass. 11// 12//===----------------------------------------------------------------------===// 13 14#define DEBUG_TYPE "ifcvt" 15#include "BranchFolding.h" 16#include "llvm/Function.h" 17#include "llvm/CodeGen/Passes.h" 18#include "llvm/CodeGen/MachineModuleInfo.h" 19#include "llvm/CodeGen/MachineFunctionPass.h" 20#include "llvm/Target/TargetInstrInfo.h" 21#include "llvm/Target/TargetLowering.h" 22#include "llvm/Target/TargetMachine.h" 23#include "llvm/Target/TargetRegisterInfo.h" 24#include "llvm/Support/CommandLine.h" 25#include "llvm/Support/Debug.h" 26#include "llvm/Support/ErrorHandling.h" 27#include "llvm/Support/raw_ostream.h" 28#include "llvm/ADT/DepthFirstIterator.h" 29#include "llvm/ADT/Statistic.h" 30#include "llvm/ADT/STLExtras.h" 31using namespace llvm; 32 33// Hidden options for help debugging. 34static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden); 35static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden); 36static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden); 37static cl::opt<bool> DisableSimple("disable-ifcvt-simple", 38 cl::init(false), cl::Hidden); 39static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false", 40 cl::init(false), cl::Hidden); 41static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle", 42 cl::init(false), cl::Hidden); 43static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev", 44 cl::init(false), cl::Hidden); 45static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false", 46 cl::init(false), cl::Hidden); 47static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev", 48 cl::init(false), cl::Hidden); 49static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond", 50 cl::init(false), cl::Hidden); 51static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold", 52 cl::init(true), cl::Hidden); 53 54STATISTIC(NumSimple, "Number of simple if-conversions performed"); 55STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed"); 56STATISTIC(NumTriangle, "Number of triangle if-conversions performed"); 57STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed"); 58STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed"); 59STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed"); 60STATISTIC(NumDiamonds, "Number of diamond if-conversions performed"); 61STATISTIC(NumIfConvBBs, "Number of if-converted blocks"); 62STATISTIC(NumDupBBs, "Number of duplicated blocks"); 63 64namespace { 65 class IfConverter : public MachineFunctionPass { 66 enum IfcvtKind { 67 ICNotClassfied, // BB data valid, but not classified. 68 ICSimpleFalse, // Same as ICSimple, but on the false path. 69 ICSimple, // BB is entry of an one split, no rejoin sub-CFG. 70 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition. 71 ICTriangleRev, // Same as ICTriangle, but true path rev condition. 72 ICTriangleFalse, // Same as ICTriangle, but on the false path. 73 ICTriangle, // BB is entry of a triangle sub-CFG. 74 ICDiamond // BB is entry of a diamond sub-CFG. 75 }; 76 77 /// BBInfo - One per MachineBasicBlock, this is used to cache the result 78 /// if-conversion feasibility analysis. This includes results from 79 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its 80 /// classification, and common tail block of its successors (if it's a 81 /// diamond shape), its size, whether it's predicable, and whether any 82 /// instruction can clobber the 'would-be' predicate. 83 /// 84 /// IsDone - True if BB is not to be considered for ifcvt. 85 /// IsBeingAnalyzed - True if BB is currently being analyzed. 86 /// IsAnalyzed - True if BB has been analyzed (info is still valid). 87 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed. 88 /// IsBrAnalyzable - True if AnalyzeBranch() returns false. 89 /// HasFallThrough - True if BB may fallthrough to the following BB. 90 /// IsUnpredicable - True if BB is known to be unpredicable. 91 /// ClobbersPred - True if BB could modify predicates (e.g. has 92 /// cmp, call, etc.) 93 /// NonPredSize - Number of non-predicated instructions. 94 /// BB - Corresponding MachineBasicBlock. 95 /// TrueBB / FalseBB- See AnalyzeBranch(). 96 /// BrCond - Conditions for end of block conditional branches. 97 /// Predicate - Predicate used in the BB. 98 struct BBInfo { 99 bool IsDone : 1; 100 bool IsBeingAnalyzed : 1; 101 bool IsAnalyzed : 1; 102 bool IsEnqueued : 1; 103 bool IsBrAnalyzable : 1; 104 bool HasFallThrough : 1; 105 bool IsUnpredicable : 1; 106 bool CannotBeCopied : 1; 107 bool ClobbersPred : 1; 108 unsigned NonPredSize; 109 MachineBasicBlock *BB; 110 MachineBasicBlock *TrueBB; 111 MachineBasicBlock *FalseBB; 112 SmallVector<MachineOperand, 4> BrCond; 113 SmallVector<MachineOperand, 4> Predicate; 114 BBInfo() : IsDone(false), IsBeingAnalyzed(false), 115 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false), 116 HasFallThrough(false), IsUnpredicable(false), 117 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0), 118 BB(0), TrueBB(0), FalseBB(0) {} 119 }; 120 121 /// IfcvtToken - Record information about pending if-conversions to attempt: 122 /// BBI - Corresponding BBInfo. 123 /// Kind - Type of block. See IfcvtKind. 124 /// NeedSubsumption - True if the to-be-predicated BB has already been 125 /// predicated. 126 /// NumDups - Number of instructions that would be duplicated due 127 /// to this if-conversion. (For diamonds, the number of 128 /// identical instructions at the beginnings of both 129 /// paths). 130 /// NumDups2 - For diamonds, the number of identical instructions 131 /// at the ends of both paths. 132 struct IfcvtToken { 133 BBInfo &BBI; 134 IfcvtKind Kind; 135 bool NeedSubsumption; 136 unsigned NumDups; 137 unsigned NumDups2; 138 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0) 139 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {} 140 }; 141 142 /// Roots - Basic blocks that do not have successors. These are the starting 143 /// points of Graph traversal. 144 std::vector<MachineBasicBlock*> Roots; 145 146 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by 147 /// basic block number. 148 std::vector<BBInfo> BBAnalysis; 149 150 const TargetLowering *TLI; 151 const TargetInstrInfo *TII; 152 const TargetRegisterInfo *TRI; 153 bool MadeChange; 154 int FnNum; 155 public: 156 static char ID; 157 IfConverter() : MachineFunctionPass(&ID), FnNum(-1) {} 158 159 virtual bool runOnMachineFunction(MachineFunction &MF); 160 virtual const char *getPassName() const { return "If Converter"; } 161 162 private: 163 bool ReverseBranchCondition(BBInfo &BBI); 164 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups) const; 165 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI, 166 bool FalseBranch, unsigned &Dups) const; 167 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI, 168 unsigned &Dups1, unsigned &Dups2) const; 169 void ScanInstructions(BBInfo &BBI); 170 BBInfo &AnalyzeBlock(MachineBasicBlock *BB, 171 std::vector<IfcvtToken*> &Tokens); 172 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond, 173 bool isTriangle = false, bool RevBranch = false); 174 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens); 175 void InvalidatePreds(MachineBasicBlock *BB); 176 void RemoveExtraEdges(BBInfo &BBI); 177 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind); 178 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind); 179 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, 180 unsigned NumDups1, unsigned NumDups2); 181 void PredicateBlock(BBInfo &BBI, 182 MachineBasicBlock::iterator E, 183 SmallVectorImpl<MachineOperand> &Cond, 184 SmallSet<unsigned, 4> &Redefs); 185 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI, 186 SmallVectorImpl<MachineOperand> &Cond, 187 SmallSet<unsigned, 4> &Redefs, 188 bool IgnoreBr = false); 189 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI); 190 191 bool MeetIfcvtSizeLimit(unsigned Size) const { 192 return Size > 0 && Size <= TLI->getIfCvtBlockSizeLimit(); 193 } 194 195 // blockAlwaysFallThrough - Block ends without a terminator. 196 bool blockAlwaysFallThrough(BBInfo &BBI) const { 197 return BBI.IsBrAnalyzable && BBI.TrueBB == NULL; 198 } 199 200 // IfcvtTokenCmp - Used to sort if-conversion candidates. 201 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) { 202 int Incr1 = (C1->Kind == ICDiamond) 203 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups; 204 int Incr2 = (C2->Kind == ICDiamond) 205 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups; 206 if (Incr1 > Incr2) 207 return true; 208 else if (Incr1 == Incr2) { 209 // Favors subsumption. 210 if (C1->NeedSubsumption == false && C2->NeedSubsumption == true) 211 return true; 212 else if (C1->NeedSubsumption == C2->NeedSubsumption) { 213 // Favors diamond over triangle, etc. 214 if ((unsigned)C1->Kind < (unsigned)C2->Kind) 215 return true; 216 else if (C1->Kind == C2->Kind) 217 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber(); 218 } 219 } 220 return false; 221 } 222 }; 223 224 char IfConverter::ID = 0; 225} 226 227static RegisterPass<IfConverter> 228X("if-converter", "If Converter"); 229 230FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); } 231 232bool IfConverter::runOnMachineFunction(MachineFunction &MF) { 233 TLI = MF.getTarget().getTargetLowering(); 234 TII = MF.getTarget().getInstrInfo(); 235 TRI = MF.getTarget().getRegisterInfo(); 236 if (!TII) return false; 237 238 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'" 239 << MF.getFunction()->getName() << "\'"); 240 241 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) { 242 DEBUG(dbgs() << " skipped\n"); 243 return false; 244 } 245 DEBUG(dbgs() << "\n"); 246 247 MF.RenumberBlocks(); 248 BBAnalysis.resize(MF.getNumBlockIDs()); 249 250 // Look for root nodes, i.e. blocks without successors. 251 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 252 if (I->succ_empty()) 253 Roots.push_back(I); 254 255 std::vector<IfcvtToken*> Tokens; 256 MadeChange = false; 257 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + 258 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds; 259 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) { 260 // Do an initial analysis for each basic block and find all the potential 261 // candidates to perform if-conversion. 262 bool Change = false; 263 AnalyzeBlocks(MF, Tokens); 264 while (!Tokens.empty()) { 265 IfcvtToken *Token = Tokens.back(); 266 Tokens.pop_back(); 267 BBInfo &BBI = Token->BBI; 268 IfcvtKind Kind = Token->Kind; 269 unsigned NumDups = Token->NumDups; 270 unsigned NumDups2 = Token->NumDups2; 271 272 delete Token; 273 274 // If the block has been evicted out of the queue or it has already been 275 // marked dead (due to it being predicated), then skip it. 276 if (BBI.IsDone) 277 BBI.IsEnqueued = false; 278 if (!BBI.IsEnqueued) 279 continue; 280 281 BBI.IsEnqueued = false; 282 283 bool RetVal = false; 284 switch (Kind) { 285 default: assert(false && "Unexpected!"); 286 break; 287 case ICSimple: 288 case ICSimpleFalse: { 289 bool isFalse = Kind == ICSimpleFalse; 290 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break; 291 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ? 292 " false" : "") 293 << "): BB#" << BBI.BB->getNumber() << " (" 294 << ((Kind == ICSimpleFalse) 295 ? BBI.FalseBB->getNumber() 296 : BBI.TrueBB->getNumber()) << ") "); 297 RetVal = IfConvertSimple(BBI, Kind); 298 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n"); 299 if (RetVal) { 300 if (isFalse) NumSimpleFalse++; 301 else NumSimple++; 302 } 303 break; 304 } 305 case ICTriangle: 306 case ICTriangleRev: 307 case ICTriangleFalse: 308 case ICTriangleFRev: { 309 bool isFalse = Kind == ICTriangleFalse; 310 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev); 311 if (DisableTriangle && !isFalse && !isRev) break; 312 if (DisableTriangleR && !isFalse && isRev) break; 313 if (DisableTriangleF && isFalse && !isRev) break; 314 if (DisableTriangleFR && isFalse && isRev) break; 315 DEBUG(dbgs() << "Ifcvt (Triangle"); 316 if (isFalse) 317 DEBUG(dbgs() << " false"); 318 if (isRev) 319 DEBUG(dbgs() << " rev"); 320 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:" 321 << BBI.TrueBB->getNumber() << ",F:" 322 << BBI.FalseBB->getNumber() << ") "); 323 RetVal = IfConvertTriangle(BBI, Kind); 324 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n"); 325 if (RetVal) { 326 if (isFalse) { 327 if (isRev) NumTriangleFRev++; 328 else NumTriangleFalse++; 329 } else { 330 if (isRev) NumTriangleRev++; 331 else NumTriangle++; 332 } 333 } 334 break; 335 } 336 case ICDiamond: { 337 if (DisableDiamond) break; 338 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:" 339 << BBI.TrueBB->getNumber() << ",F:" 340 << BBI.FalseBB->getNumber() << ") "); 341 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2); 342 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n"); 343 if (RetVal) NumDiamonds++; 344 break; 345 } 346 } 347 348 Change |= RetVal; 349 350 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev + 351 NumTriangleFalse + NumTriangleFRev + NumDiamonds; 352 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit) 353 break; 354 } 355 356 if (!Change) 357 break; 358 MadeChange |= Change; 359 } 360 361 // Delete tokens in case of early exit. 362 while (!Tokens.empty()) { 363 IfcvtToken *Token = Tokens.back(); 364 Tokens.pop_back(); 365 delete Token; 366 } 367 368 Tokens.clear(); 369 Roots.clear(); 370 BBAnalysis.clear(); 371 372 if (MadeChange && !IfCvtBranchFold) { 373 BranchFolder BF(false); 374 BF.OptimizeFunction(MF, TII, 375 MF.getTarget().getRegisterInfo(), 376 getAnalysisIfAvailable<MachineModuleInfo>()); 377 } 378 379 return MadeChange; 380} 381 382/// findFalseBlock - BB has a fallthrough. Find its 'false' successor given 383/// its 'true' successor. 384static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB, 385 MachineBasicBlock *TrueBB) { 386 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(), 387 E = BB->succ_end(); SI != E; ++SI) { 388 MachineBasicBlock *SuccBB = *SI; 389 if (SuccBB != TrueBB) 390 return SuccBB; 391 } 392 return NULL; 393} 394 395/// ReverseBranchCondition - Reverse the condition of the end of the block 396/// branch. Swap block's 'true' and 'false' successors. 397bool IfConverter::ReverseBranchCondition(BBInfo &BBI) { 398 DebugLoc dl; // FIXME: this is nowhere 399 if (!TII->ReverseBranchCondition(BBI.BrCond)) { 400 TII->RemoveBranch(*BBI.BB); 401 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); 402 std::swap(BBI.TrueBB, BBI.FalseBB); 403 return true; 404 } 405 return false; 406} 407 408/// getNextBlock - Returns the next block in the function blocks ordering. If 409/// it is the end, returns NULL. 410static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) { 411 MachineFunction::iterator I = BB; 412 MachineFunction::iterator E = BB->getParent()->end(); 413 if (++I == E) 414 return NULL; 415 return I; 416} 417 418/// ValidSimple - Returns true if the 'true' block (along with its 419/// predecessor) forms a valid simple shape for ifcvt. It also returns the 420/// number of instructions that the ifcvt would need to duplicate if performed 421/// in Dups. 422bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups) const { 423 Dups = 0; 424 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone) 425 return false; 426 427 if (TrueBBI.IsBrAnalyzable) 428 return false; 429 430 if (TrueBBI.BB->pred_size() > 1) { 431 if (TrueBBI.CannotBeCopied || 432 TrueBBI.NonPredSize > TLI->getIfCvtDupBlockSizeLimit()) 433 return false; 434 Dups = TrueBBI.NonPredSize; 435 } 436 437 return true; 438} 439 440/// ValidTriangle - Returns true if the 'true' and 'false' blocks (along 441/// with their common predecessor) forms a valid triangle shape for ifcvt. 442/// If 'FalseBranch' is true, it checks if 'true' block's false branch 443/// branches to the 'false' block rather than the other way around. It also 444/// returns the number of instructions that the ifcvt would need to duplicate 445/// if performed in 'Dups'. 446bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI, 447 bool FalseBranch, unsigned &Dups) const { 448 Dups = 0; 449 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone) 450 return false; 451 452 if (TrueBBI.BB->pred_size() > 1) { 453 if (TrueBBI.CannotBeCopied) 454 return false; 455 456 unsigned Size = TrueBBI.NonPredSize; 457 if (TrueBBI.IsBrAnalyzable) { 458 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) 459 // Ends with an unconditional branch. It will be removed. 460 --Size; 461 else { 462 MachineBasicBlock *FExit = FalseBranch 463 ? TrueBBI.TrueBB : TrueBBI.FalseBB; 464 if (FExit) 465 // Require a conditional branch 466 ++Size; 467 } 468 } 469 if (Size > TLI->getIfCvtDupBlockSizeLimit()) 470 return false; 471 Dups = Size; 472 } 473 474 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB; 475 if (!TExit && blockAlwaysFallThrough(TrueBBI)) { 476 MachineFunction::iterator I = TrueBBI.BB; 477 if (++I == TrueBBI.BB->getParent()->end()) 478 return false; 479 TExit = I; 480 } 481 return TExit && TExit == FalseBBI.BB; 482} 483 484static 485MachineBasicBlock::iterator firstNonBranchInst(MachineBasicBlock *BB, 486 const TargetInstrInfo *TII) { 487 MachineBasicBlock::iterator I = BB->end(); 488 while (I != BB->begin()) { 489 --I; 490 if (!I->getDesc().isBranch()) 491 break; 492 } 493 return I; 494} 495 496/// ValidDiamond - Returns true if the 'true' and 'false' blocks (along 497/// with their common predecessor) forms a valid diamond shape for ifcvt. 498bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI, 499 unsigned &Dups1, unsigned &Dups2) const { 500 Dups1 = Dups2 = 0; 501 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone || 502 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone) 503 return false; 504 505 MachineBasicBlock *TT = TrueBBI.TrueBB; 506 MachineBasicBlock *FT = FalseBBI.TrueBB; 507 508 if (!TT && blockAlwaysFallThrough(TrueBBI)) 509 TT = getNextBlock(TrueBBI.BB); 510 if (!FT && blockAlwaysFallThrough(FalseBBI)) 511 FT = getNextBlock(FalseBBI.BB); 512 if (TT != FT) 513 return false; 514 if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable)) 515 return false; 516 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1) 517 return false; 518 519 // FIXME: Allow true block to have an early exit? 520 if (TrueBBI.FalseBB || FalseBBI.FalseBB || 521 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred)) 522 return false; 523 524 MachineBasicBlock::iterator TI = TrueBBI.BB->begin(); 525 MachineBasicBlock::iterator FI = FalseBBI.BB->begin(); 526 MachineBasicBlock::iterator TIE = TrueBBI.BB->end(); 527 MachineBasicBlock::iterator FIE = FalseBBI.BB->end(); 528 // Skip dbg_value instructions 529 while (TI != TIE && TI->isDebugValue()) 530 ++TI; 531 while (FI != FIE && FI->isDebugValue()) 532 ++FI; 533 while (TI != TIE && FI != FIE) { 534 if (!TI->isIdenticalTo(FI)) 535 break; 536 ++Dups1; 537 ++TI; 538 ++FI; 539 } 540 541 TI = firstNonBranchInst(TrueBBI.BB, TII); 542 FI = firstNonBranchInst(FalseBBI.BB, TII); 543 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin(); 544 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin(); 545 // Skip dbg_value instructions 546 while (TI != TIB && TI->isDebugValue()) 547 --TI; 548 while (FI != FIB && FI->isDebugValue()) 549 --FI; 550 while (TI != TIB && FI != FIB) { 551 if (!TI->isIdenticalTo(FI)) 552 break; 553 ++Dups2; 554 --TI; 555 --FI; 556 } 557 558 return true; 559} 560 561/// ScanInstructions - Scan all the instructions in the block to determine if 562/// the block is predicable. In most cases, that means all the instructions 563/// in the block are isPredicable(). Also checks if the block contains any 564/// instruction which can clobber a predicate (e.g. condition code register). 565/// If so, the block is not predicable unless it's the last instruction. 566void IfConverter::ScanInstructions(BBInfo &BBI) { 567 if (BBI.IsDone) 568 return; 569 570 bool AlreadyPredicated = BBI.Predicate.size() > 0; 571 // First analyze the end of BB branches. 572 BBI.TrueBB = BBI.FalseBB = NULL; 573 BBI.BrCond.clear(); 574 BBI.IsBrAnalyzable = 575 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); 576 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL; 577 578 if (BBI.BrCond.size()) { 579 // No false branch. This BB must end with a conditional branch and a 580 // fallthrough. 581 if (!BBI.FalseBB) 582 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB); 583 if (!BBI.FalseBB) { 584 // Malformed bcc? True and false blocks are the same? 585 BBI.IsUnpredicable = true; 586 return; 587 } 588 } 589 590 // Then scan all the instructions. 591 BBI.NonPredSize = 0; 592 BBI.ClobbersPred = false; 593 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end(); 594 I != E; ++I) { 595 if (I->isDebugValue()) 596 continue; 597 598 const TargetInstrDesc &TID = I->getDesc(); 599 if (TID.isNotDuplicable()) 600 BBI.CannotBeCopied = true; 601 602 bool isPredicated = TII->isPredicated(I); 603 bool isCondBr = BBI.IsBrAnalyzable && TID.isConditionalBranch(); 604 605 if (!isCondBr) { 606 if (!isPredicated) 607 BBI.NonPredSize++; 608 else if (!AlreadyPredicated) { 609 // FIXME: This instruction is already predicated before the 610 // if-conversion pass. It's probably something like a conditional move. 611 // Mark this block unpredicable for now. 612 BBI.IsUnpredicable = true; 613 return; 614 } 615 } 616 617 if (BBI.ClobbersPred && !isPredicated) { 618 // Predicate modification instruction should end the block (except for 619 // already predicated instructions and end of block branches). 620 if (isCondBr) { 621 // A conditional branch is not predicable, but it may be eliminated. 622 continue; 623 } 624 625 // Predicate may have been modified, the subsequent (currently) 626 // unpredicated instructions cannot be correctly predicated. 627 BBI.IsUnpredicable = true; 628 return; 629 } 630 631 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are 632 // still potentially predicable. 633 std::vector<MachineOperand> PredDefs; 634 if (TII->DefinesPredicate(I, PredDefs)) 635 BBI.ClobbersPred = true; 636 637 if (!TII->isPredicable(I)) { 638 BBI.IsUnpredicable = true; 639 return; 640 } 641 } 642} 643 644/// FeasibilityAnalysis - Determine if the block is a suitable candidate to be 645/// predicated by the specified predicate. 646bool IfConverter::FeasibilityAnalysis(BBInfo &BBI, 647 SmallVectorImpl<MachineOperand> &Pred, 648 bool isTriangle, bool RevBranch) { 649 // If the block is dead or unpredicable, then it cannot be predicated. 650 if (BBI.IsDone || BBI.IsUnpredicable) 651 return false; 652 653 // If it is already predicated, check if its predicate subsumes the new 654 // predicate. 655 if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred)) 656 return false; 657 658 if (BBI.BrCond.size()) { 659 if (!isTriangle) 660 return false; 661 662 // Test predicate subsumption. 663 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end()); 664 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); 665 if (RevBranch) { 666 if (TII->ReverseBranchCondition(Cond)) 667 return false; 668 } 669 if (TII->ReverseBranchCondition(RevPred) || 670 !TII->SubsumesPredicate(Cond, RevPred)) 671 return false; 672 } 673 674 return true; 675} 676 677/// AnalyzeBlock - Analyze the structure of the sub-CFG starting from 678/// the specified block. Record its successors and whether it looks like an 679/// if-conversion candidate. 680IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB, 681 std::vector<IfcvtToken*> &Tokens) { 682 BBInfo &BBI = BBAnalysis[BB->getNumber()]; 683 684 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed) 685 return BBI; 686 687 BBI.BB = BB; 688 BBI.IsBeingAnalyzed = true; 689 690 ScanInstructions(BBI); 691 692 // Unanalyzable or ends with fallthrough or unconditional branch. 693 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty()) { 694 BBI.IsBeingAnalyzed = false; 695 BBI.IsAnalyzed = true; 696 return BBI; 697 } 698 699 // Do not ifcvt if either path is a back edge to the entry block. 700 if (BBI.TrueBB == BB || BBI.FalseBB == BB) { 701 BBI.IsBeingAnalyzed = false; 702 BBI.IsAnalyzed = true; 703 return BBI; 704 } 705 706 // Do not ifcvt if true and false fallthrough blocks are the same. 707 if (!BBI.FalseBB) { 708 BBI.IsBeingAnalyzed = false; 709 BBI.IsAnalyzed = true; 710 return BBI; 711 } 712 713 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens); 714 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens); 715 716 if (TrueBBI.IsDone && FalseBBI.IsDone) { 717 BBI.IsBeingAnalyzed = false; 718 BBI.IsAnalyzed = true; 719 return BBI; 720 } 721 722 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); 723 bool CanRevCond = !TII->ReverseBranchCondition(RevCond); 724 725 unsigned Dups = 0; 726 unsigned Dups2 = 0; 727 bool TNeedSub = TrueBBI.Predicate.size() > 0; 728 bool FNeedSub = FalseBBI.Predicate.size() > 0; 729 bool Enqueued = false; 730 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) && 731 MeetIfcvtSizeLimit(TrueBBI.NonPredSize - (Dups + Dups2)) && 732 MeetIfcvtSizeLimit(FalseBBI.NonPredSize - (Dups + Dups2)) && 733 FeasibilityAnalysis(TrueBBI, BBI.BrCond) && 734 FeasibilityAnalysis(FalseBBI, RevCond)) { 735 // Diamond: 736 // EBB 737 // / \_ 738 // | | 739 // TBB FBB 740 // \ / 741 // TailBB 742 // Note TailBB can be empty. 743 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups, 744 Dups2)); 745 Enqueued = true; 746 } 747 748 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups) && 749 MeetIfcvtSizeLimit(TrueBBI.NonPredSize) && 750 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) { 751 // Triangle: 752 // EBB 753 // | \_ 754 // | | 755 // | TBB 756 // | / 757 // FBB 758 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups)); 759 Enqueued = true; 760 } 761 762 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups) && 763 MeetIfcvtSizeLimit(TrueBBI.NonPredSize) && 764 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) { 765 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups)); 766 Enqueued = true; 767 } 768 769 if (ValidSimple(TrueBBI, Dups) && 770 MeetIfcvtSizeLimit(TrueBBI.NonPredSize) && 771 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) { 772 // Simple (split, no rejoin): 773 // EBB 774 // | \_ 775 // | | 776 // | TBB---> exit 777 // | 778 // FBB 779 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups)); 780 Enqueued = true; 781 } 782 783 if (CanRevCond) { 784 // Try the other path... 785 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups) && 786 MeetIfcvtSizeLimit(FalseBBI.NonPredSize) && 787 FeasibilityAnalysis(FalseBBI, RevCond, true)) { 788 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups)); 789 Enqueued = true; 790 } 791 792 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups) && 793 MeetIfcvtSizeLimit(FalseBBI.NonPredSize) && 794 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) { 795 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups)); 796 Enqueued = true; 797 } 798 799 if (ValidSimple(FalseBBI, Dups) && 800 MeetIfcvtSizeLimit(FalseBBI.NonPredSize) && 801 FeasibilityAnalysis(FalseBBI, RevCond)) { 802 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups)); 803 Enqueued = true; 804 } 805 } 806 807 BBI.IsEnqueued = Enqueued; 808 BBI.IsBeingAnalyzed = false; 809 BBI.IsAnalyzed = true; 810 return BBI; 811} 812 813/// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion 814/// candidates. 815void IfConverter::AnalyzeBlocks(MachineFunction &MF, 816 std::vector<IfcvtToken*> &Tokens) { 817 std::set<MachineBasicBlock*> Visited; 818 for (unsigned i = 0, e = Roots.size(); i != e; ++i) { 819 for (idf_ext_iterator<MachineBasicBlock*> I=idf_ext_begin(Roots[i],Visited), 820 E = idf_ext_end(Roots[i], Visited); I != E; ++I) { 821 MachineBasicBlock *BB = *I; 822 AnalyzeBlock(BB, Tokens); 823 } 824 } 825 826 // Sort to favor more complex ifcvt scheme. 827 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp); 828} 829 830/// canFallThroughTo - Returns true either if ToBB is the next block after BB or 831/// that all the intervening blocks are empty (given BB can fall through to its 832/// next block). 833static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) { 834 MachineFunction::iterator PI = BB; 835 MachineFunction::iterator I = llvm::next(PI); 836 MachineFunction::iterator TI = ToBB; 837 MachineFunction::iterator E = BB->getParent()->end(); 838 while (I != TI) { 839 // Check isSuccessor to avoid case where the next block is empty, but 840 // it's not a successor. 841 if (I == E || !I->empty() || !PI->isSuccessor(I)) 842 return false; 843 PI = I++; 844 } 845 return true; 846} 847 848/// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed 849/// to determine if it can be if-converted. If predecessor is already enqueued, 850/// dequeue it! 851void IfConverter::InvalidatePreds(MachineBasicBlock *BB) { 852 for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(), 853 E = BB->pred_end(); PI != E; ++PI) { 854 BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()]; 855 if (PBBI.IsDone || PBBI.BB == BB) 856 continue; 857 PBBI.IsAnalyzed = false; 858 PBBI.IsEnqueued = false; 859 } 860} 861 862/// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB. 863/// 864static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB, 865 const TargetInstrInfo *TII) { 866 DebugLoc dl; // FIXME: this is nowhere 867 SmallVector<MachineOperand, 0> NoCond; 868 TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl); 869} 870 871/// RemoveExtraEdges - Remove true / false edges if either / both are no longer 872/// successors. 873void IfConverter::RemoveExtraEdges(BBInfo &BBI) { 874 MachineBasicBlock *TBB = NULL, *FBB = NULL; 875 SmallVector<MachineOperand, 4> Cond; 876 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond)) 877 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty()); 878} 879 880/// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are 881/// modeled as read + write (sort like two-address instructions). These 882/// routines track register liveness and add implicit uses to if-converted 883/// instructions to conform to the model. 884static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs, 885 const TargetRegisterInfo *TRI) { 886 for (MachineBasicBlock::livein_iterator I = BB->livein_begin(), 887 E = BB->livein_end(); I != E; ++I) { 888 unsigned Reg = *I; 889 Redefs.insert(Reg); 890 for (const unsigned *Subreg = TRI->getSubRegisters(Reg); 891 *Subreg; ++Subreg) 892 Redefs.insert(*Subreg); 893 } 894} 895 896static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs, 897 const TargetRegisterInfo *TRI, 898 bool AddImpUse = false) { 899 SmallVector<unsigned, 4> Defs; 900 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 901 const MachineOperand &MO = MI->getOperand(i); 902 if (!MO.isReg()) 903 continue; 904 unsigned Reg = MO.getReg(); 905 if (!Reg) 906 continue; 907 if (MO.isDef()) 908 Defs.push_back(Reg); 909 else if (MO.isKill()) { 910 Redefs.erase(Reg); 911 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) 912 Redefs.erase(*SR); 913 } 914 } 915 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 916 unsigned Reg = Defs[i]; 917 if (Redefs.count(Reg)) { 918 if (AddImpUse) 919 // Treat predicated update as read + write. 920 MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/, 921 true/*IsImp*/,false/*IsKill*/)); 922 } else { 923 Redefs.insert(Reg); 924 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) 925 Redefs.insert(*SR); 926 } 927 } 928} 929 930static void UpdatePredRedefs(MachineBasicBlock::iterator I, 931 MachineBasicBlock::iterator E, 932 SmallSet<unsigned,4> &Redefs, 933 const TargetRegisterInfo *TRI) { 934 while (I != E) { 935 UpdatePredRedefs(I, Redefs, TRI); 936 ++I; 937 } 938} 939 940/// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG. 941/// 942bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) { 943 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()]; 944 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()]; 945 BBInfo *CvtBBI = &TrueBBI; 946 BBInfo *NextBBI = &FalseBBI; 947 948 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); 949 if (Kind == ICSimpleFalse) 950 std::swap(CvtBBI, NextBBI); 951 952 if (CvtBBI->IsDone || 953 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) { 954 // Something has changed. It's no longer safe to predicate this block. 955 BBI.IsAnalyzed = false; 956 CvtBBI->IsAnalyzed = false; 957 return false; 958 } 959 960 if (Kind == ICSimpleFalse) 961 if (TII->ReverseBranchCondition(Cond)) 962 assert(false && "Unable to reverse branch condition!"); 963 964 // Initialize liveins to the first BB. These are potentiall re-defined by 965 // predicated instructions. 966 SmallSet<unsigned, 4> Redefs; 967 InitPredRedefs(CvtBBI->BB, Redefs, TRI); 968 InitPredRedefs(NextBBI->BB, Redefs, TRI); 969 970 if (CvtBBI->BB->pred_size() > 1) { 971 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 972 // Copy instructions in the true block, predicate them, and add them to 973 // the entry block. 974 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs); 975 } else { 976 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs); 977 978 // Merge converted block into entry block. 979 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 980 MergeBlocks(BBI, *CvtBBI); 981 } 982 983 bool IterIfcvt = true; 984 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) { 985 InsertUncondBranch(BBI.BB, NextBBI->BB, TII); 986 BBI.HasFallThrough = false; 987 // Now ifcvt'd block will look like this: 988 // BB: 989 // ... 990 // t, f = cmp 991 // if t op 992 // b BBf 993 // 994 // We cannot further ifcvt this block because the unconditional branch 995 // will have to be predicated on the new condition, that will not be 996 // available if cmp executes. 997 IterIfcvt = false; 998 } 999 1000 RemoveExtraEdges(BBI); 1001 1002 // Update block info. BB can be iteratively if-converted. 1003 if (!IterIfcvt) 1004 BBI.IsDone = true; 1005 InvalidatePreds(BBI.BB); 1006 CvtBBI->IsDone = true; 1007 1008 // FIXME: Must maintain LiveIns. 1009 return true; 1010} 1011 1012/// IfConvertTriangle - If convert a triangle sub-CFG. 1013/// 1014bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) { 1015 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()]; 1016 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()]; 1017 BBInfo *CvtBBI = &TrueBBI; 1018 BBInfo *NextBBI = &FalseBBI; 1019 DebugLoc dl; // FIXME: this is nowhere 1020 1021 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); 1022 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev) 1023 std::swap(CvtBBI, NextBBI); 1024 1025 if (CvtBBI->IsDone || 1026 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) { 1027 // Something has changed. It's no longer safe to predicate this block. 1028 BBI.IsAnalyzed = false; 1029 CvtBBI->IsAnalyzed = false; 1030 return false; 1031 } 1032 1033 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev) 1034 if (TII->ReverseBranchCondition(Cond)) 1035 assert(false && "Unable to reverse branch condition!"); 1036 1037 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) { 1038 if (ReverseBranchCondition(*CvtBBI)) { 1039 // BB has been changed, modify its predecessors (except for this 1040 // one) so they don't get ifcvt'ed based on bad intel. 1041 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(), 1042 E = CvtBBI->BB->pred_end(); PI != E; ++PI) { 1043 MachineBasicBlock *PBB = *PI; 1044 if (PBB == BBI.BB) 1045 continue; 1046 BBInfo &PBBI = BBAnalysis[PBB->getNumber()]; 1047 if (PBBI.IsEnqueued) { 1048 PBBI.IsAnalyzed = false; 1049 PBBI.IsEnqueued = false; 1050 } 1051 } 1052 } 1053 } 1054 1055 // Initialize liveins to the first BB. These are potentiall re-defined by 1056 // predicated instructions. 1057 SmallSet<unsigned, 4> Redefs; 1058 InitPredRedefs(CvtBBI->BB, Redefs, TRI); 1059 InitPredRedefs(NextBBI->BB, Redefs, TRI); 1060 1061 bool HasEarlyExit = CvtBBI->FalseBB != NULL; 1062 bool DupBB = CvtBBI->BB->pred_size() > 1; 1063 if (DupBB) { 1064 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1065 // Copy instructions in the true block, predicate them, and add them to 1066 // the entry block. 1067 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true); 1068 } else { 1069 // Predicate the 'true' block after removing its branch. 1070 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB); 1071 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs); 1072 1073 // Now merge the entry of the triangle with the true block. 1074 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1075 MergeBlocks(BBI, *CvtBBI); 1076 } 1077 1078 // If 'true' block has a 'false' successor, add an exit branch to it. 1079 if (HasEarlyExit) { 1080 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), 1081 CvtBBI->BrCond.end()); 1082 if (TII->ReverseBranchCondition(RevCond)) 1083 assert(false && "Unable to reverse branch condition!"); 1084 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl); 1085 BBI.BB->addSuccessor(CvtBBI->FalseBB); 1086 } 1087 1088 // Merge in the 'false' block if the 'false' block has no other 1089 // predecessors. Otherwise, add an unconditional branch to 'false'. 1090 bool FalseBBDead = false; 1091 bool IterIfcvt = true; 1092 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB); 1093 if (!isFallThrough) { 1094 // Only merge them if the true block does not fallthrough to the false 1095 // block. By not merging them, we make it possible to iteratively 1096 // ifcvt the blocks. 1097 if (!HasEarlyExit && 1098 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) { 1099 MergeBlocks(BBI, *NextBBI); 1100 FalseBBDead = true; 1101 } else { 1102 InsertUncondBranch(BBI.BB, NextBBI->BB, TII); 1103 BBI.HasFallThrough = false; 1104 } 1105 // Mixed predicated and unpredicated code. This cannot be iteratively 1106 // predicated. 1107 IterIfcvt = false; 1108 } 1109 1110 RemoveExtraEdges(BBI); 1111 1112 // Update block info. BB can be iteratively if-converted. 1113 if (!IterIfcvt) 1114 BBI.IsDone = true; 1115 InvalidatePreds(BBI.BB); 1116 CvtBBI->IsDone = true; 1117 if (FalseBBDead) 1118 NextBBI->IsDone = true; 1119 1120 // FIXME: Must maintain LiveIns. 1121 return true; 1122} 1123 1124/// IfConvertDiamond - If convert a diamond sub-CFG. 1125/// 1126bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, 1127 unsigned NumDups1, unsigned NumDups2) { 1128 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()]; 1129 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()]; 1130 MachineBasicBlock *TailBB = TrueBBI.TrueBB; 1131 // True block must fall through or end with an unanalyzable terminator. 1132 if (!TailBB) { 1133 if (blockAlwaysFallThrough(TrueBBI)) 1134 TailBB = FalseBBI.TrueBB; 1135 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!"); 1136 } 1137 1138 if (TrueBBI.IsDone || FalseBBI.IsDone || 1139 TrueBBI.BB->pred_size() > 1 || 1140 FalseBBI.BB->pred_size() > 1) { 1141 // Something has changed. It's no longer safe to predicate these blocks. 1142 BBI.IsAnalyzed = false; 1143 TrueBBI.IsAnalyzed = false; 1144 FalseBBI.IsAnalyzed = false; 1145 return false; 1146 } 1147 1148 // Merge the 'true' and 'false' blocks by copying the instructions 1149 // from the 'false' block to the 'true' block. That is, unless the true 1150 // block would clobber the predicate, in that case, do the opposite. 1151 BBInfo *BBI1 = &TrueBBI; 1152 BBInfo *BBI2 = &FalseBBI; 1153 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); 1154 if (TII->ReverseBranchCondition(RevCond)) 1155 assert(false && "Unable to reverse branch condition!"); 1156 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond; 1157 SmallVector<MachineOperand, 4> *Cond2 = &RevCond; 1158 1159 // Figure out the more profitable ordering. 1160 bool DoSwap = false; 1161 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred) 1162 DoSwap = true; 1163 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) { 1164 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize) 1165 DoSwap = true; 1166 } 1167 if (DoSwap) { 1168 std::swap(BBI1, BBI2); 1169 std::swap(Cond1, Cond2); 1170 } 1171 1172 // Remove the conditional branch from entry to the blocks. 1173 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1174 1175 // Initialize liveins to the first BB. These are potentiall re-defined by 1176 // predicated instructions. 1177 SmallSet<unsigned, 4> Redefs; 1178 InitPredRedefs(BBI1->BB, Redefs, TRI); 1179 1180 // Remove the duplicated instructions at the beginnings of both paths. 1181 MachineBasicBlock::iterator DI1 = BBI1->BB->begin(); 1182 MachineBasicBlock::iterator DI2 = BBI2->BB->begin(); 1183 MachineBasicBlock::iterator DIE1 = BBI1->BB->end(); 1184 MachineBasicBlock::iterator DIE2 = BBI2->BB->end(); 1185 // Skip dbg_value instructions 1186 while (DI1 != DIE1 && DI1->isDebugValue()) 1187 ++DI1; 1188 while (DI2 != DIE2 && DI2->isDebugValue()) 1189 ++DI2; 1190 BBI1->NonPredSize -= NumDups1; 1191 BBI2->NonPredSize -= NumDups1; 1192 while (NumDups1 != 0) { 1193 ++DI1; 1194 ++DI2; 1195 --NumDups1; 1196 } 1197 1198 UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI); 1199 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1); 1200 BBI2->BB->erase(BBI2->BB->begin(), DI2); 1201 1202 // Predicate the 'true' block after removing its branch. 1203 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB); 1204 DI1 = BBI1->BB->end(); 1205 for (unsigned i = 0; i != NumDups2; ) { 1206 // NumDups2 only counted non-dbg_value instructions, so this won't 1207 // run off the head of the list. 1208 assert (DI1 != BBI1->BB->begin()); 1209 --DI1; 1210 // skip dbg_value instructions 1211 if (!DI1->isDebugValue()) 1212 ++i; 1213 } 1214 BBI1->BB->erase(DI1, BBI1->BB->end()); 1215 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs); 1216 1217 // Predicate the 'false' block. 1218 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB); 1219 DI2 = BBI2->BB->end(); 1220 while (NumDups2 != 0) { 1221 // NumDups2 only counted non-dbg_value instructions, so this won't 1222 // run off the head of the list. 1223 assert (DI2 != BBI2->BB->begin()); 1224 --DI2; 1225 // skip dbg_value instructions 1226 if (!DI2->isDebugValue()) 1227 --NumDups2; 1228 } 1229 PredicateBlock(*BBI2, DI2, *Cond2, Redefs); 1230 1231 // Merge the true block into the entry of the diamond. 1232 MergeBlocks(BBI, *BBI1); 1233 MergeBlocks(BBI, *BBI2); 1234 1235 // If the if-converted block falls through or unconditionally branches into 1236 // the tail block, and the tail block does not have other predecessors, then 1237 // fold the tail block in as well. Otherwise, unless it falls through to the 1238 // tail, add a unconditional branch to it. 1239 if (TailBB) { 1240 BBInfo TailBBI = BBAnalysis[TailBB->getNumber()]; 1241 if (TailBB->pred_size() == 1 && !TailBBI.HasFallThrough) { 1242 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1243 MergeBlocks(BBI, TailBBI); 1244 TailBBI.IsDone = true; 1245 } else { 1246 InsertUncondBranch(BBI.BB, TailBB, TII); 1247 BBI.HasFallThrough = false; 1248 } 1249 } 1250 1251 RemoveExtraEdges(BBI); 1252 1253 // Update block info. 1254 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true; 1255 InvalidatePreds(BBI.BB); 1256 1257 // FIXME: Must maintain LiveIns. 1258 return true; 1259} 1260 1261/// PredicateBlock - Predicate instructions from the start of the block to the 1262/// specified end with the specified condition. 1263void IfConverter::PredicateBlock(BBInfo &BBI, 1264 MachineBasicBlock::iterator E, 1265 SmallVectorImpl<MachineOperand> &Cond, 1266 SmallSet<unsigned, 4> &Redefs) { 1267 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) { 1268 if (I->isDebugValue() || TII->isPredicated(I)) 1269 continue; 1270 if (!TII->PredicateInstruction(I, Cond)) { 1271#ifndef NDEBUG 1272 dbgs() << "Unable to predicate " << *I << "!\n"; 1273#endif 1274 llvm_unreachable(0); 1275 } 1276 1277 // If the predicated instruction now re-defines a register as the result of 1278 // if-conversion, add an implicit kill. 1279 UpdatePredRedefs(I, Redefs, TRI, true); 1280 } 1281 1282 std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate)); 1283 1284 BBI.IsAnalyzed = false; 1285 BBI.NonPredSize = 0; 1286 1287 NumIfConvBBs++; 1288} 1289 1290/// CopyAndPredicateBlock - Copy and predicate instructions from source BB to 1291/// the destination block. Skip end of block branches if IgnoreBr is true. 1292void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI, 1293 SmallVectorImpl<MachineOperand> &Cond, 1294 SmallSet<unsigned, 4> &Redefs, 1295 bool IgnoreBr) { 1296 MachineFunction &MF = *ToBBI.BB->getParent(); 1297 1298 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(), 1299 E = FromBBI.BB->end(); I != E; ++I) { 1300 const TargetInstrDesc &TID = I->getDesc(); 1301 bool isPredicated = TII->isPredicated(I); 1302 // Do not copy the end of the block branches. 1303 if (IgnoreBr && !isPredicated && TID.isBranch()) 1304 break; 1305 1306 MachineInstr *MI = MF.CloneMachineInstr(I); 1307 ToBBI.BB->insert(ToBBI.BB->end(), MI); 1308 ToBBI.NonPredSize++; 1309 1310 if (!isPredicated && !MI->isDebugValue()) { 1311 if (!TII->PredicateInstruction(MI, Cond)) { 1312#ifndef NDEBUG 1313 dbgs() << "Unable to predicate " << *I << "!\n"; 1314#endif 1315 llvm_unreachable(0); 1316 } 1317 } 1318 1319 // If the predicated instruction now re-defines a register as the result of 1320 // if-conversion, add an implicit kill. 1321 UpdatePredRedefs(MI, Redefs, TRI, true); 1322 } 1323 1324 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(), 1325 FromBBI.BB->succ_end()); 1326 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB); 1327 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL; 1328 1329 for (unsigned i = 0, e = Succs.size(); i != e; ++i) { 1330 MachineBasicBlock *Succ = Succs[i]; 1331 // Fallthrough edge can't be transferred. 1332 if (Succ == FallThrough) 1333 continue; 1334 ToBBI.BB->addSuccessor(Succ); 1335 } 1336 1337 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(), 1338 std::back_inserter(ToBBI.Predicate)); 1339 std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate)); 1340 1341 ToBBI.ClobbersPred |= FromBBI.ClobbersPred; 1342 ToBBI.IsAnalyzed = false; 1343 1344 NumDupBBs++; 1345} 1346 1347/// MergeBlocks - Move all instructions from FromBB to the end of ToBB. 1348/// 1349void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI) { 1350 ToBBI.BB->splice(ToBBI.BB->end(), 1351 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end()); 1352 1353 // Redirect all branches to FromBB to ToBB. 1354 std::vector<MachineBasicBlock *> Preds(FromBBI.BB->pred_begin(), 1355 FromBBI.BB->pred_end()); 1356 for (unsigned i = 0, e = Preds.size(); i != e; ++i) { 1357 MachineBasicBlock *Pred = Preds[i]; 1358 if (Pred == ToBBI.BB) 1359 continue; 1360 Pred->ReplaceUsesOfBlockWith(FromBBI.BB, ToBBI.BB); 1361 } 1362 1363 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(), 1364 FromBBI.BB->succ_end()); 1365 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB); 1366 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL; 1367 1368 for (unsigned i = 0, e = Succs.size(); i != e; ++i) { 1369 MachineBasicBlock *Succ = Succs[i]; 1370 // Fallthrough edge can't be transferred. 1371 if (Succ == FallThrough) 1372 continue; 1373 FromBBI.BB->removeSuccessor(Succ); 1374 ToBBI.BB->addSuccessor(Succ); 1375 } 1376 1377 // Now FromBBI always falls through to the next block! 1378 if (NBB && !FromBBI.BB->isSuccessor(NBB)) 1379 FromBBI.BB->addSuccessor(NBB); 1380 1381 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(), 1382 std::back_inserter(ToBBI.Predicate)); 1383 FromBBI.Predicate.clear(); 1384 1385 ToBBI.NonPredSize += FromBBI.NonPredSize; 1386 FromBBI.NonPredSize = 0; 1387 1388 ToBBI.ClobbersPred |= FromBBI.ClobbersPred; 1389 ToBBI.HasFallThrough = FromBBI.HasFallThrough; 1390 ToBBI.IsAnalyzed = false; 1391 FromBBI.IsAnalyzed = false; 1392} 1393