LiveIntervalAnalysis.cpp revision 80b27ced2d5e6340bb62d75a8c6f23198e69a1af 
1//===-- LiveIntervals.cpp - Live Interval Analysis ------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the LiveInterval analysis pass which is used
11// by the Linear Scan Register allocator. This pass linearizes the
12// basic blocks of the function in DFS order and uses the
13// LiveVariables pass to conservatively compute live intervals for
14// each virtual and physical register.
15//
16//===----------------------------------------------------------------------===//
17
18#define DEBUG_TYPE "liveintervals"
19#include "LiveIntervals.h"
20#include "llvm/Value.h"
21#include "llvm/Analysis/LoopInfo.h"
22#include "llvm/CodeGen/LiveVariables.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineInstr.h"
25#include "llvm/CodeGen/Passes.h"
26#include "llvm/CodeGen/SSARegMap.h"
27#include "llvm/Target/MRegisterInfo.h"
28#include "llvm/Target/TargetInstrInfo.h"
29#include "llvm/Target/TargetMachine.h"
30#include "Support/CommandLine.h"
31#include "Support/Debug.h"
32#include "Support/Statistic.h"
33#include "Support/STLExtras.h"
34#include "VirtRegMap.h"
35#include <cmath>
36#include <iostream>
37
38using namespace llvm;
39
40namespace {
41    RegisterAnalysis<LiveIntervals> X("liveintervals",
42                                      "Live Interval Analysis");
43
44    Statistic<> numIntervals
45    ("liveintervals", "Number of original intervals");
46
47    Statistic<> numIntervalsAfter
48    ("liveintervals", "Number of intervals after coalescing");
49
50    Statistic<> numJoins
51    ("liveintervals", "Number of interval joins performed");
52
53    Statistic<> numPeep
54    ("liveintervals", "Number of identity moves eliminated after coalescing");
55
56    Statistic<> numFolded
57    ("liveintervals", "Number of loads/stores folded into instructions");
58
59    cl::opt<bool>
60    join("join-liveintervals",
61         cl::desc("Join compatible live intervals"),
62         cl::init(false));
63};
64
65void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
66{
67    AU.addPreserved<LiveVariables>();
68    AU.addRequired<LiveVariables>();
69    AU.addPreservedID(PHIEliminationID);
70    AU.addRequiredID(PHIEliminationID);
71    AU.addRequiredID(TwoAddressInstructionPassID);
72    AU.addRequired<LoopInfo>();
73    MachineFunctionPass::getAnalysisUsage(AU);
74}
75
76void LiveIntervals::releaseMemory()
77{
78    mbbi2mbbMap_.clear();
79    mi2iMap_.clear();
80    i2miMap_.clear();
81    r2iMap_.clear();
82    r2rMap_.clear();
83    intervals_.clear();
84}
85
86
87/// runOnMachineFunction - Register allocate the whole function
88///
89bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
90    mf_ = &fn;
91    tm_ = &fn.getTarget();
92    mri_ = tm_->getRegisterInfo();
93    lv_ = &getAnalysis<LiveVariables>();
94
95    // number MachineInstrs
96    unsigned miIndex = 0;
97    for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end();
98         mbb != mbbEnd; ++mbb) {
99        unsigned mbbIdx = mbb->getNumber();
100        bool inserted = mbbi2mbbMap_.insert(std::make_pair(mbbIdx,
101                                                           mbb)).second;
102        assert(inserted && "multiple index -> MachineBasicBlock");
103
104        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
105             mi != miEnd; ++mi) {
106            inserted = mi2iMap_.insert(std::make_pair(mi, miIndex)).second;
107            assert(inserted && "multiple MachineInstr -> index mappings");
108            i2miMap_.push_back(mi);
109            miIndex += InstrSlots::NUM;
110        }
111    }
112
113    computeIntervals();
114
115    numIntervals += intervals_.size();
116
117    // join intervals if requested
118    if (join) joinIntervals();
119
120    numIntervalsAfter += intervals_.size();
121
122    // perform a final pass over the instructions and compute spill
123    // weights, coalesce virtual registers and remove identity moves
124    const LoopInfo& loopInfo = getAnalysis<LoopInfo>();
125    const TargetInstrInfo& tii = *tm_->getInstrInfo();
126
127    for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
128         mbbi != mbbe; ++mbbi) {
129        MachineBasicBlock* mbb = mbbi;
130        unsigned loopDepth = loopInfo.getLoopDepth(mbb->getBasicBlock());
131
132        for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end();
133             mii != mie; ) {
134            // if the move will be an identity move delete it
135            unsigned srcReg, dstReg;
136            if (tii.isMoveInstr(*mii, srcReg, dstReg) &&
137                rep(srcReg) == rep(dstReg)) {
138                // remove from def list
139                LiveInterval& interval = getOrCreateInterval(rep(dstReg));
140                // remove index -> MachineInstr and
141                // MachineInstr -> index mappings
142                Mi2IndexMap::iterator mi2i = mi2iMap_.find(mii);
143                if (mi2i != mi2iMap_.end()) {
144                    i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
145                    mi2iMap_.erase(mi2i);
146                }
147                mii = mbbi->erase(mii);
148                ++numPeep;
149            }
150            else {
151                for (unsigned i = 0; i < mii->getNumOperands(); ++i) {
152                    const MachineOperand& mop = mii->getOperand(i);
153                    if (mop.isRegister() && mop.getReg() &&
154                        MRegisterInfo::isVirtualRegister(mop.getReg())) {
155                        // replace register with representative register
156                        unsigned reg = rep(mop.getReg());
157                        mii->SetMachineOperandReg(i, reg);
158
159                        Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
160                        assert(r2iit != r2iMap_.end());
161                        r2iit->second->weight +=
162                            (mop.isUse() + mop.isDef()) * pow(10.0F, loopDepth);
163                    }
164                }
165                ++mii;
166            }
167        }
168    }
169
170    intervals_.sort();
171    DEBUG(std::cerr << "********** INTERVALS **********\n");
172    DEBUG(std::copy(intervals_.begin(), intervals_.end(),
173                    std::ostream_iterator<LiveInterval>(std::cerr, "\n")));
174    DEBUG(std::cerr << "********** MACHINEINSTRS **********\n");
175    DEBUG(
176        for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
177             mbbi != mbbe; ++mbbi) {
178            std::cerr << ((Value*)mbbi->getBasicBlock())->getName() << ":\n";
179            for (MachineBasicBlock::iterator mii = mbbi->begin(),
180                     mie = mbbi->end(); mii != mie; ++mii) {
181                std::cerr << getInstructionIndex(mii) << '\t';
182                mii->print(std::cerr, tm_);
183            }
184        });
185
186    return true;
187}
188
189std::vector<LiveInterval*> LiveIntervals::addIntervalsForSpills(
190    const LiveInterval& li,
191    VirtRegMap& vrm,
192    int slot)
193{
194    std::vector<LiveInterval*> added;
195
196    assert(li.weight != HUGE_VAL &&
197           "attempt to spill already spilled interval!");
198
199    DEBUG(std::cerr << "\t\t\t\tadding intervals for spills for interval: "
200          << li << '\n');
201
202    const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg);
203
204    for (LiveInterval::Ranges::const_iterator
205             i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
206        unsigned index = getBaseIndex(i->first);
207        unsigned end = getBaseIndex(i->second-1) + InstrSlots::NUM;
208        for (; index < end; index += InstrSlots::NUM) {
209            // skip deleted instructions
210            while (!getInstructionFromIndex(index)) index += InstrSlots::NUM;
211            MachineBasicBlock::iterator mi = getInstructionFromIndex(index);
212
213        for_operand:
214            for (unsigned i = 0; i < mi->getNumOperands(); ++i) {
215                MachineOperand& mop = mi->getOperand(i);
216                if (mop.isRegister() && mop.getReg() == li.reg) {
217                    if (MachineInstr* fmi =
218                        mri_->foldMemoryOperand(mi, i, slot)) {
219                        lv_->instructionChanged(mi, fmi);
220                        vrm.virtFolded(li.reg, mi, fmi);
221                        mi2iMap_.erase(mi);
222                        i2miMap_[index/InstrSlots::NUM] = fmi;
223                        mi2iMap_[fmi] = index;
224                        MachineBasicBlock& mbb = *mi->getParent();
225                        mi = mbb.insert(mbb.erase(mi), fmi);
226                        ++numFolded;
227                        goto for_operand;
228                    }
229                    else {
230                        // This is tricky. We need to add information in
231                        // the interval about the spill code so we have to
232                        // use our extra load/store slots.
233                        //
234                        // If we have a use we are going to have a load so
235                        // we start the interval from the load slot
236                        // onwards. Otherwise we start from the def slot.
237                        unsigned start = (mop.isUse() ?
238                                          getLoadIndex(index) :
239                                          getDefIndex(index));
240                        // If we have a def we are going to have a store
241                        // right after it so we end the interval after the
242                        // use of the next instruction. Otherwise we end
243                        // after the use of this instruction.
244                        unsigned end = 1 + (mop.isDef() ?
245                                            getUseIndex(index+InstrSlots::NUM) :
246                                            getUseIndex(index));
247
248                        // create a new register for this spill
249                        unsigned nReg =
250                            mf_->getSSARegMap()->createVirtualRegister(rc);
251                        mi->SetMachineOperandReg(i, nReg);
252                        vrm.grow();
253                        vrm.assignVirt2StackSlot(nReg, slot);
254                        LiveInterval& nI = getOrCreateInterval(nReg);
255                        assert(nI.empty());
256                        // the spill weight is now infinity as it
257                        // cannot be spilled again
258                        nI.weight = HUGE_VAL;
259                        nI.addRange(start, end);
260                        added.push_back(&nI);
261                        // update live variables
262                        lv_->addVirtualRegisterKilled(nReg, mi->getParent(),mi);
263                        DEBUG(std::cerr << "\t\t\t\tadded new interval: "
264                              << nI << '\n');
265                    }
266                }
267            }
268        }
269    }
270
271    return added;
272}
273
274void LiveIntervals::printRegName(unsigned reg) const
275{
276    if (MRegisterInfo::isPhysicalRegister(reg))
277        std::cerr << mri_->getName(reg);
278    else
279        std::cerr << "%reg" << reg;
280}
281
282void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
283                                             MachineBasicBlock::iterator mi,
284                                             LiveInterval& interval)
285{
286    DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
287    LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
288
289    // Iterate over all of the blocks that the variable is completely
290    // live in, adding [insrtIndex(begin), instrIndex(end)+4) to the
291    // live interval. Obviously we only need to do this once.
292    if (interval.empty()) {
293        for (unsigned i = 0, e = vi.AliveBlocks.size(); i != e; ++i) {
294            if (vi.AliveBlocks[i]) {
295                MachineBasicBlock* mbb = mf_->getBlockNumbered(i);
296                if (!mbb->empty()) {
297                    interval.addRange(
298                        getInstructionIndex(&mbb->front()),
299                        getInstructionIndex(&mbb->back()) + InstrSlots::NUM);
300                }
301            }
302        }
303    }
304
305    unsigned baseIndex = getInstructionIndex(mi);
306
307    bool killedInDefiningBasicBlock = false;
308    for (int i = 0, e = vi.Kills.size(); i != e; ++i) {
309        MachineBasicBlock* killerBlock = vi.Kills[i].first;
310        MachineInstr* killerInstr = vi.Kills[i].second;
311        unsigned start = (mbb == killerBlock ?
312                          getDefIndex(baseIndex) :
313                          getInstructionIndex(&killerBlock->front()));
314        unsigned end = (killerInstr == mi ?
315                         // dead
316                        start + 1 :
317                        // killed
318                        getUseIndex(getInstructionIndex(killerInstr))+1);
319        // we do not want to add invalid ranges. these can happen when
320        // a variable has its latest use and is redefined later on in
321        // the same basic block (common with variables introduced by
322        // PHI elimination)
323        if (start < end) {
324            killedInDefiningBasicBlock |= mbb == killerBlock;
325            interval.addRange(start, end);
326        }
327    }
328
329    if (!killedInDefiningBasicBlock) {
330        unsigned end = getInstructionIndex(&mbb->back()) + InstrSlots::NUM;
331        interval.addRange(getDefIndex(baseIndex), end);
332    }
333    DEBUG(std::cerr << '\n');
334}
335
336void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb,
337                                              MachineBasicBlock::iterator mi,
338                                              LiveInterval& interval)
339{
340    // A physical register cannot be live across basic block, so its
341    // lifetime must end somewhere in its defining basic block.
342    DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
343    typedef LiveVariables::killed_iterator KillIter;
344
345    MachineBasicBlock::iterator e = mbb->end();
346    unsigned baseIndex = getInstructionIndex(mi);
347    unsigned start = getDefIndex(baseIndex);
348    unsigned end = start;
349
350    // If it is not used after definition, it is considered dead at
351    // the instruction defining it. Hence its interval is:
352    // [defSlot(def), defSlot(def)+1)
353    for (KillIter ki = lv_->dead_begin(mi), ke = lv_->dead_end(mi);
354         ki != ke; ++ki) {
355        if (interval.reg == ki->second) {
356            DEBUG(std::cerr << " dead");
357            end = getDefIndex(start) + 1;
358            goto exit;
359        }
360    }
361
362    // If it is not dead on definition, it must be killed by a
363    // subsequent instruction. Hence its interval is:
364    // [defSlot(def), useSlot(kill)+1)
365    do {
366        ++mi;
367        baseIndex += InstrSlots::NUM;
368        for (KillIter ki = lv_->killed_begin(mi), ke = lv_->killed_end(mi);
369             ki != ke; ++ki) {
370            if (interval.reg == ki->second) {
371                DEBUG(std::cerr << " killed");
372                end = getUseIndex(baseIndex) + 1;
373                goto exit;
374            }
375        }
376    } while (mi != e);
377
378exit:
379    assert(start < end && "did not find end of interval?");
380    interval.addRange(start, end);
381    DEBUG(std::cerr << '\n');
382}
383
384void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb,
385                                      MachineBasicBlock::iterator mi,
386                                      unsigned reg)
387{
388    if (MRegisterInfo::isPhysicalRegister(reg)) {
389        if (lv_->getAllocatablePhysicalRegisters()[reg]) {
390            handlePhysicalRegisterDef(mbb, mi, getOrCreateInterval(reg));
391            for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
392                handlePhysicalRegisterDef(mbb, mi, getOrCreateInterval(*as));
393        }
394    }
395    else
396        handleVirtualRegisterDef(mbb, mi, getOrCreateInterval(reg));
397}
398
399unsigned LiveIntervals::getInstructionIndex(MachineInstr* instr) const
400{
401    Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
402    return (it == mi2iMap_.end() ?
403            std::numeric_limits<unsigned>::max() :
404            it->second);
405}
406
407MachineInstr* LiveIntervals::getInstructionFromIndex(unsigned index) const
408{
409    index /= InstrSlots::NUM; // convert index to vector index
410    assert(index < i2miMap_.size() &&
411           "index does not correspond to an instruction");
412    return i2miMap_[index];
413}
414
415/// computeIntervals - computes the live intervals for virtual
416/// registers. for some ordering of the machine instructions [1,N] a
417/// live interval is an interval [i, j) where 1 <= i <= j < N for
418/// which a variable is live
419void LiveIntervals::computeIntervals()
420{
421    DEBUG(std::cerr << "********** COMPUTING LIVE INTERVALS **********\n");
422    DEBUG(std::cerr << "********** Function: "
423          << ((Value*)mf_->getFunction())->getName() << '\n');
424
425    for (MbbIndex2MbbMap::iterator
426             it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
427         it != itEnd; ++it) {
428        MachineBasicBlock* mbb = it->second;
429        DEBUG(std::cerr << ((Value*)mbb->getBasicBlock())->getName() << ":\n");
430
431        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
432             mi != miEnd; ++mi) {
433            const TargetInstrDescriptor& tid =
434                tm_->getInstrInfo()->get(mi->getOpcode());
435            DEBUG(std::cerr << getInstructionIndex(mi) << "\t";
436                  mi->print(std::cerr, tm_));
437
438            // handle implicit defs
439            for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
440                handleRegisterDef(mbb, mi, *id);
441
442            // handle explicit defs
443            for (int i = mi->getNumOperands() - 1; i >= 0; --i) {
444                MachineOperand& mop = mi->getOperand(i);
445                // handle register defs - build intervals
446                if (mop.isRegister() && mop.getReg() && mop.isDef())
447                    handleRegisterDef(mbb, mi, mop.getReg());
448            }
449        }
450    }
451}
452
453unsigned LiveIntervals::rep(unsigned reg)
454{
455    Reg2RegMap::iterator it = r2rMap_.find(reg);
456    if (it != r2rMap_.end())
457        return it->second = rep(it->second);
458    return reg;
459}
460
461void LiveIntervals::joinIntervals()
462{
463    DEBUG(std::cerr << "********** JOINING INTERVALS ***********\n");
464
465    const TargetInstrInfo& tii = *tm_->getInstrInfo();
466
467    for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
468         mbbi != mbbe; ++mbbi) {
469        MachineBasicBlock* mbb = mbbi;
470        DEBUG(std::cerr << ((Value*)mbb->getBasicBlock())->getName() << ":\n");
471
472        for (MachineBasicBlock::iterator mi = mbb->begin(), mie = mbb->end();
473             mi != mie; ++mi) {
474            const TargetInstrDescriptor& tid = tii.get(mi->getOpcode());
475            DEBUG(std::cerr << getInstructionIndex(mi) << '\t';
476                  mi->print(std::cerr, tm_););
477
478            // we only join virtual registers with allocatable
479            // physical registers since we do not have liveness information
480            // on not allocatable physical registers
481            unsigned regA, regB;
482            if (tii.isMoveInstr(*mi, regA, regB) &&
483                (MRegisterInfo::isVirtualRegister(regA) ||
484                 lv_->getAllocatablePhysicalRegisters()[regA]) &&
485                (MRegisterInfo::isVirtualRegister(regB) ||
486                 lv_->getAllocatablePhysicalRegisters()[regB])) {
487
488                // get representative registers
489                regA = rep(regA);
490                regB = rep(regB);
491
492                // if they are already joined we continue
493                if (regA == regB)
494                    continue;
495
496                Reg2IntervalMap::iterator r2iA = r2iMap_.find(regA);
497                assert(r2iA != r2iMap_.end());
498                Reg2IntervalMap::iterator r2iB = r2iMap_.find(regB);
499                assert(r2iB != r2iMap_.end());
500
501                Intervals::iterator intA = r2iA->second;
502                Intervals::iterator intB = r2iB->second;
503
504                // both A and B are virtual registers
505                if (MRegisterInfo::isVirtualRegister(intA->reg) &&
506                    MRegisterInfo::isVirtualRegister(intB->reg)) {
507
508                    const TargetRegisterClass *rcA, *rcB;
509                    rcA = mf_->getSSARegMap()->getRegClass(intA->reg);
510                    rcB = mf_->getSSARegMap()->getRegClass(intB->reg);
511                    // if they are not of the same register class we continue
512                    if (rcA != rcB)
513                        continue;
514
515                    // if their intervals do not overlap we join them
516                    if (!intB->overlaps(*intA)) {
517                        intA->join(*intB);
518                        r2iB->second = r2iA->second;
519                        r2rMap_.insert(std::make_pair(intB->reg, intA->reg));
520                        intervals_.erase(intB);
521                    }
522                }
523                else if (MRegisterInfo::isPhysicalRegister(intA->reg) ^
524                         MRegisterInfo::isPhysicalRegister(intB->reg)) {
525                    if (MRegisterInfo::isPhysicalRegister(intB->reg)) {
526                        std::swap(regA, regB);
527                        std::swap(intA, intB);
528                        std::swap(r2iA, r2iB);
529                    }
530
531                    assert(MRegisterInfo::isPhysicalRegister(intA->reg) &&
532                           MRegisterInfo::isVirtualRegister(intB->reg) &&
533                           "A must be physical and B must be virtual");
534
535                    const TargetRegisterClass *rcA, *rcB;
536                    rcA = mri_->getRegClass(intA->reg);
537                    rcB = mf_->getSSARegMap()->getRegClass(intB->reg);
538                    // if they are not of the same register class we continue
539                    if (rcA != rcB)
540                        continue;
541
542                    if (!intA->overlaps(*intB) &&
543                        !overlapsAliases(*intA, *intB)) {
544                        intA->join(*intB);
545                        r2iB->second = r2iA->second;
546                        r2rMap_.insert(std::make_pair(intB->reg, intA->reg));
547                        intervals_.erase(intB);
548                    }
549                }
550            }
551        }
552    }
553}
554
555bool LiveIntervals::overlapsAliases(const LiveInterval& lhs,
556                                    const LiveInterval& rhs) const
557{
558    assert(MRegisterInfo::isPhysicalRegister(lhs.reg) &&
559           "first interval must describe a physical register");
560
561    for (const unsigned* as = mri_->getAliasSet(lhs.reg); *as; ++as) {
562        Reg2IntervalMap::const_iterator r2i = r2iMap_.find(*as);
563        assert(r2i != r2iMap_.end() && "alias does not have interval?");
564        if (rhs.overlaps(*r2i->second))
565            return true;
566    }
567
568    return false;
569}
570
571LiveInterval& LiveIntervals::getOrCreateInterval(unsigned reg)
572{
573    Reg2IntervalMap::iterator r2iit = r2iMap_.lower_bound(reg);
574    if (r2iit == r2iMap_.end() || r2iit->first != reg) {
575        intervals_.push_back(LiveInterval(reg));
576        r2iit = r2iMap_.insert(r2iit, std::make_pair(reg, --intervals_.end()));
577    }
578
579    return *r2iit->second;
580}
581
582LiveInterval::LiveInterval(unsigned r)
583    : reg(r),
584      weight((MRegisterInfo::isPhysicalRegister(r) ?  HUGE_VAL : 0.0F))
585{
586}
587
588bool LiveInterval::spilled() const
589{
590    return (weight == HUGE_VAL &&
591            MRegisterInfo::isVirtualRegister(reg));
592}
593
594// An example for liveAt():
595//
596// this = [1,4), liveAt(0) will return false. The instruction defining
597// this spans slots [0,3]. The interval belongs to an spilled
598// definition of the variable it represents. This is because slot 1 is
599// used (def slot) and spans up to slot 3 (store slot).
600//
601bool LiveInterval::liveAt(unsigned index) const
602{
603    Range dummy(index, index+1);
604    Ranges::const_iterator r = std::upper_bound(ranges.begin(),
605                                                ranges.end(),
606                                                dummy);
607    if (r == ranges.begin())
608        return false;
609
610    --r;
611    return index >= r->first && index < r->second;
612}
613
614// An example for overlaps():
615//
616// 0: A = ...
617// 4: B = ...
618// 8: C = A + B ;; last use of A
619//
620// The live intervals should look like:
621//
622// A = [3, 11)
623// B = [7, x)
624// C = [11, y)
625//
626// A->overlaps(C) should return false since we want to be able to join
627// A and C.
628bool LiveInterval::overlaps(const LiveInterval& other) const
629{
630    Ranges::const_iterator i = ranges.begin();
631    Ranges::const_iterator ie = ranges.end();
632    Ranges::const_iterator j = other.ranges.begin();
633    Ranges::const_iterator je = other.ranges.end();
634    if (i->first < j->first) {
635        i = std::upper_bound(i, ie, *j);
636        if (i != ranges.begin()) --i;
637    }
638    else if (j->first < i->first) {
639        j = std::upper_bound(j, je, *i);
640        if (j != other.ranges.begin()) --j;
641    }
642
643    while (i != ie && j != je) {
644        if (i->first == j->first) {
645            return true;
646        }
647        else {
648            if (i->first > j->first) {
649                swap(i, j);
650                swap(ie, je);
651            }
652            assert(i->first < j->first);
653
654            if (i->second > j->first) {
655                return true;
656            }
657            else {
658                ++i;
659            }
660        }
661    }
662
663    return false;
664}
665
666void LiveInterval::addRange(unsigned start, unsigned end)
667{
668    assert(start < end && "Invalid range to add!");
669    DEBUG(std::cerr << " +[" << start << ',' << end << ")");
670    //assert(start < end && "invalid range?");
671    Range range = std::make_pair(start, end);
672    Ranges::iterator it =
673        ranges.insert(std::upper_bound(ranges.begin(), ranges.end(), range),
674                      range);
675
676    it = mergeRangesForward(it);
677    it = mergeRangesBackward(it);
678}
679
680void LiveInterval::join(const LiveInterval& other)
681{
682    DEBUG(std::cerr << "\t\tjoining " << *this << " with " << other << '\n');
683    Ranges::iterator cur = ranges.begin();
684
685    for (Ranges::const_iterator i = other.ranges.begin(),
686             e = other.ranges.end(); i != e; ++i) {
687        cur = ranges.insert(std::upper_bound(cur, ranges.end(), *i), *i);
688        cur = mergeRangesForward(cur);
689        cur = mergeRangesBackward(cur);
690    }
691    weight += other.weight;
692    ++numJoins;
693}
694
695LiveInterval::Ranges::iterator LiveInterval::
696mergeRangesForward(Ranges::iterator it)
697{
698    Ranges::iterator n;
699    while ((n = next(it)) != ranges.end()) {
700        if (n->first > it->second)
701            break;
702        it->second = std::max(it->second, n->second);
703        n = ranges.erase(n);
704    }
705    return it;
706}
707
708LiveInterval::Ranges::iterator LiveInterval::
709mergeRangesBackward(Ranges::iterator it)
710{
711    while (it != ranges.begin()) {
712        Ranges::iterator p = prior(it);
713        if (it->first > p->second)
714            break;
715
716        it->first = std::min(it->first, p->first);
717        it->second = std::max(it->second, p->second);
718        it = ranges.erase(p);
719    }
720
721    return it;
722}
723
724std::ostream& llvm::operator<<(std::ostream& os, const LiveInterval& li)
725{
726    os << "%reg" << li.reg << ',' << li.weight;
727    if (li.empty())
728        return os << "EMPTY";
729
730    os << " = ";
731    for (LiveInterval::Ranges::const_iterator
732             i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
733        os << "[" << i->first << "," << i->second << ")";
734    }
735    return os;
736}
737