TargetInstrInfoImpl.cpp revision 5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd
1641055225092833197efe8e5bce01d50bcf1daaeChris Lattner//===-- TargetInstrInfoImpl.cpp - Target Instruction Information ----------===// 2641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// 3641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// The LLVM Compiler Infrastructure 4641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// 5641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// This file is distributed under the University of Illinois Open Source 6641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// License. See LICENSE.TXT for details. 7641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// 8641055225092833197efe8e5bce01d50bcf1daaeChris Lattner//===----------------------------------------------------------------------===// 9641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// 10641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// This file implements the TargetInstrInfoImpl class, it just provides default 11641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// implementations of various methods. 12641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// 13641055225092833197efe8e5bce01d50bcf1daaeChris Lattner//===----------------------------------------------------------------------===// 14641055225092833197efe8e5bce01d50bcf1daaeChris Lattner 15641055225092833197efe8e5bce01d50bcf1daaeChris Lattner#include "llvm/Target/TargetInstrInfo.h" 1686050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng#include "llvm/Target/TargetLowering.h" 17a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman#include "llvm/Target/TargetMachine.h" 18a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman#include "llvm/Target/TargetRegisterInfo.h" 1944eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson#include "llvm/ADT/SmallVector.h" 20c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman#include "llvm/CodeGen/MachineFrameInfo.h" 21641055225092833197efe8e5bce01d50bcf1daaeChris Lattner#include "llvm/CodeGen/MachineInstr.h" 2258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng#include "llvm/CodeGen/MachineInstrBuilder.h" 23c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman#include "llvm/CodeGen/MachineMemOperand.h" 24a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman#include "llvm/CodeGen/MachineRegisterInfo.h" 256b1207267f01877ff9b351786c902cb2ecd354c0Andrew Trick#include "llvm/CodeGen/ScoreboardHazardRecognizer.h" 26c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman#include "llvm/CodeGen/PseudoSourceValue.h" 27c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick#include "llvm/Support/CommandLine.h" 289fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen#include "llvm/Support/Debug.h" 2934c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng#include "llvm/Support/ErrorHandling.h" 3034c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng#include "llvm/Support/raw_ostream.h" 31641055225092833197efe8e5bce01d50bcf1daaeChris Lattnerusing namespace llvm; 32641055225092833197efe8e5bce01d50bcf1daaeChris Lattner 33c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trickstatic cl::opt<bool> DisableHazardRecognizer( 34c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick "disable-sched-hazard", cl::Hidden, cl::init(false), 35c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick cl::desc("Disable hazard detection during preRA scheduling")); 36c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick 374d54e5b2dd4a3d3bed38ff9c7aa57fc66adb5855Evan Cheng/// ReplaceTailWithBranchTo - Delete the instruction OldInst and everything 384d54e5b2dd4a3d3bed38ff9c7aa57fc66adb5855Evan Cheng/// after it, replacing it with an unconditional branch to NewDest. 3986050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Chengvoid 4086050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan ChengTargetInstrInfoImpl::ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail, 4186050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng MachineBasicBlock *NewDest) const { 4286050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng MachineBasicBlock *MBB = Tail->getParent(); 4386050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 4486050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // Remove all the old successors of MBB from the CFG. 4586050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng while (!MBB->succ_empty()) 4686050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng MBB->removeSuccessor(MBB->succ_begin()); 4786050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 4886050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // Remove all the dead instructions from the end of MBB. 4986050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng MBB->erase(Tail, MBB->end()); 5086050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 5186050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // If MBB isn't immediately before MBB, insert a branch to it. 5286050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng if (++MachineFunction::iterator(MBB) != MachineFunction::iterator(NewDest)) 5386050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng InsertBranch(*MBB, NewDest, 0, SmallVector<MachineOperand, 0>(), 5486050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng Tail->getDebugLoc()); 5586050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng MBB->addSuccessor(NewDest); 5686050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng} 5786050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 58641055225092833197efe8e5bce01d50bcf1daaeChris Lattner// commuteInstruction - The default implementation of this method just exchanges 5934c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng// the two operands returned by findCommutedOpIndices. 6058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan ChengMachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI, 6158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool NewMI) const { 62e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = MI->getDesc(); 63e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng bool HasDef = MCID.getNumDefs(); 6434c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng if (HasDef && !MI->getOperand(0).isReg()) 6534c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng // No idea how to commute this instruction. Target should implement its own. 6634c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng return 0; 6734c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng unsigned Idx1, Idx2; 6834c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng if (!findCommutedOpIndices(MI, Idx1, Idx2)) { 6934c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng std::string msg; 7034c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng raw_string_ostream Msg(msg); 7134c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng Msg << "Don't know how to commute: " << *MI; 7275361b69f3f327842b9dad69fa7f28ae3b688412Chris Lattner report_fatal_error(Msg.str()); 7334c75093f085c7958fa3bd31f3c4a50942d83505Evan Cheng } 74498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng 75498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() && 76641055225092833197efe8e5bce01d50bcf1daaeChris Lattner "This only knows how to commute register operands so far"); 77cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0; 78498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng unsigned Reg1 = MI->getOperand(Idx1).getReg(); 79498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng unsigned Reg2 = MI->getOperand(Idx2).getReg(); 80498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng bool Reg1IsKill = MI->getOperand(Idx1).isKill(); 81498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng bool Reg2IsKill = MI->getOperand(Idx2).isKill(); 82cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng // If destination is tied to either of the commuted source register, then 83cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng // it must be updated. 84cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng if (HasDef && Reg0 == Reg1 && 85cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { 86a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng Reg2IsKill = false; 87cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng Reg0 = Reg2; 88cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng } else if (HasDef && Reg0 == Reg2 && 89cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { 90cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng Reg1IsKill = false; 91cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng Reg0 = Reg1; 9258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng } 9358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 9458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng if (NewMI) { 9558dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng // Create a new instruction. 96498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng bool Reg0IsDead = HasDef ? MI->getOperand(0).isDead() : false; 978e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineFunction &MF = *MI->getParent()->getParent(); 98498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng if (HasDef) 99498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 100498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 101498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng .addReg(Reg2, getKillRegState(Reg2IsKill)) 102498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng .addReg(Reg1, getKillRegState(Reg2IsKill)); 103498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng else 104498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) 105498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng .addReg(Reg2, getKillRegState(Reg2IsKill)) 106498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng .addReg(Reg1, getKillRegState(Reg2IsKill)); 107a4d16a1f0dcdd1ab2862737105f900e2c577532dEvan Cheng } 10858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng 109cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng if (HasDef) 110cb08f18d5b88ffa4ba8efd7cac0b8820d6f0ec71Evan Cheng MI->getOperand(0).setReg(Reg0); 111498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng MI->getOperand(Idx2).setReg(Reg1); 112498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng MI->getOperand(Idx1).setReg(Reg2); 113498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng MI->getOperand(Idx2).setIsKill(Reg1IsKill); 114498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng MI->getOperand(Idx1).setIsKill(Reg2IsKill); 115641055225092833197efe8e5bce01d50bcf1daaeChris Lattner return MI; 116641055225092833197efe8e5bce01d50bcf1daaeChris Lattner} 117641055225092833197efe8e5bce01d50bcf1daaeChris Lattner 118261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng/// findCommutedOpIndices - If specified MI is commutable, return the two 119261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng/// operand indices that would swap value. Return true if the instruction 120261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng/// is not in a form which this routine understands. 121261ce1d5f89155d2e6f914f281db2004c89ee839Evan Chengbool TargetInstrInfoImpl::findCommutedOpIndices(MachineInstr *MI, 122261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng unsigned &SrcOpIdx1, 123261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng unsigned &SrcOpIdx2) const { 1245a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng assert(MI->getOpcode() != TargetOpcode::BUNDLE && 1255a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng "TargetInstrInfoImpl::findCommutedOpIndices() can't handle bundles"); 1265a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 127e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = MI->getDesc(); 128e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng if (!MCID.isCommutable()) 129498c2903e28b56b73b8056335ad7f1eb6347b8edEvan Cheng return false; 130261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng // This assumes v0 = op v1, v2 and commuting would swap v1 and v2. If this 131261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng // is not true, then the target must implement this. 132e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng SrcOpIdx1 = MCID.getNumDefs(); 133261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng SrcOpIdx2 = SrcOpIdx1 + 1; 134261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng if (!MI->getOperand(SrcOpIdx1).isReg() || 135261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng !MI->getOperand(SrcOpIdx2).isReg()) 136261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng // No idea. 137261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng return false; 138261ce1d5f89155d2e6f914f281db2004c89ee839Evan Cheng return true; 139f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng} 140f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng 141f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng 142641055225092833197efe8e5bce01d50bcf1daaeChris Lattnerbool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI, 14344eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Pred) const { 144641055225092833197efe8e5bce01d50bcf1daaeChris Lattner bool MadeChange = false; 1455a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 1465a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng assert(MI->getOpcode() != TargetOpcode::BUNDLE && 1475a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng "TargetInstrInfoImpl::PredicateInstruction() can't handle bundles"); 1485a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng 149e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng const MCInstrDesc &MCID = MI->getDesc(); 1505a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng if (!MI->isPredicable()) 151749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner return false; 1526b1207267f01877ff9b351786c902cb2ecd354c0Andrew Trick 153749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) { 154e837dead3c8dc3445ef6a0e2322179c57e264a13Evan Cheng if (MCID.OpInfo[i].isPredicate()) { 155749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MachineOperand &MO = MI->getOperand(i); 156d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MO.isReg()) { 157749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MO.setReg(Pred[j].getReg()); 158749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MadeChange = true; 159d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman } else if (MO.isImm()) { 160749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MO.setImm(Pred[j].getImm()); 161749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MadeChange = true; 162d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman } else if (MO.isMBB()) { 163749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MO.setMBB(Pred[j].getMBB()); 164749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner MadeChange = true; 165641055225092833197efe8e5bce01d50bcf1daaeChris Lattner } 166749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner ++j; 167641055225092833197efe8e5bce01d50bcf1daaeChris Lattner } 168641055225092833197efe8e5bce01d50bcf1daaeChris Lattner } 169641055225092833197efe8e5bce01d50bcf1daaeChris Lattner return MadeChange; 170641055225092833197efe8e5bce01d50bcf1daaeChris Lattner} 171ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng 1722df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesenbool TargetInstrInfoImpl::hasLoadFromStackSlot(const MachineInstr *MI, 1732df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen const MachineMemOperand *&MMO, 1742df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen int &FrameIndex) const { 1752df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen for (MachineInstr::mmo_iterator o = MI->memoperands_begin(), 1762df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen oe = MI->memoperands_end(); 1772df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen o != oe; 1782df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen ++o) { 1792df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen if ((*o)->isLoad() && (*o)->getValue()) 1802df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen if (const FixedStackPseudoSourceValue *Value = 1812df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen dyn_cast<const FixedStackPseudoSourceValue>((*o)->getValue())) { 1822df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen FrameIndex = Value->getFrameIndex(); 1832df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen MMO = *o; 1842df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen return true; 1852df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen } 1862df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen } 1872df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen return false; 1882df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen} 1892df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen 1902df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesenbool TargetInstrInfoImpl::hasStoreToStackSlot(const MachineInstr *MI, 1912df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen const MachineMemOperand *&MMO, 1922df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen int &FrameIndex) const { 1932df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen for (MachineInstr::mmo_iterator o = MI->memoperands_begin(), 1942df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen oe = MI->memoperands_end(); 1952df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen o != oe; 1962df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen ++o) { 1972df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen if ((*o)->isStore() && (*o)->getValue()) 1982df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen if (const FixedStackPseudoSourceValue *Value = 1992df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen dyn_cast<const FixedStackPseudoSourceValue>((*o)->getValue())) { 2002df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen FrameIndex = Value->getFrameIndex(); 2012df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen MMO = *o; 2022df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen return true; 2032df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen } 2042df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen } 2052df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen return false; 2062df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen} 2072df3f58a0b3937f2cbd76d3417d2905ca86cf8faJakob Stoklund Olesen 208ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Chengvoid TargetInstrInfoImpl::reMaterialize(MachineBasicBlock &MBB, 209ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng MachineBasicBlock::iterator I, 210ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng unsigned DestReg, 211378445303b10b092a898a75131141a8259cff50bEvan Cheng unsigned SubIdx, 212d57cdd5683ea926e489067364fb7ffe5fd5d35eeEvan Cheng const MachineInstr *Orig, 2139edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen const TargetRegisterInfo &TRI) const { 2148e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig); 2159edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen MI->substituteRegister(MI->getOperand(0).getReg(), DestReg, SubIdx, TRI); 216ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng MBB.insert(I, MI); 217ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng} 218ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng 2199fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Chengbool 2209fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan ChengTargetInstrInfoImpl::produceSameValue(const MachineInstr *MI0, 2219fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineInstr *MI1, 2229fe2009956fc40f3aea46fb3c38dcfb61c4aca46Evan Cheng const MachineRegisterInfo *MRI) const { 223506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng return MI0->isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); 224506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng} 225506049f29f4f202a8e45feb916cc0264440a7f6dEvan Cheng 22630ac0467ced4627a9b84d8a1d3ca5e8706ddad63Jakob Stoklund OlesenMachineInstr *TargetInstrInfoImpl::duplicate(MachineInstr *Orig, 22730ac0467ced4627a9b84d8a1d3ca5e8706ddad63Jakob Stoklund Olesen MachineFunction &MF) const { 2285a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng assert(!Orig->isNotDuplicable() && 22930ac0467ced4627a9b84d8a1d3ca5e8706ddad63Jakob Stoklund Olesen "Instruction cannot be duplicated"); 23030ac0467ced4627a9b84d8a1d3ca5e8706ddad63Jakob Stoklund Olesen return MF.CloneMachineInstr(Orig); 23130ac0467ced4627a9b84d8a1d3ca5e8706ddad63Jakob Stoklund Olesen} 23230ac0467ced4627a9b84d8a1d3ca5e8706ddad63Jakob Stoklund Olesen 2331f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen// If the COPY instruction in MI can be folded to a stack operation, return 2341f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen// the register class to use. 2351f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesenstatic const TargetRegisterClass *canFoldCopy(const MachineInstr *MI, 2361f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen unsigned FoldIdx) { 2371f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen assert(MI->isCopy() && "MI must be a COPY instruction"); 2381f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen if (MI->getNumOperands() != 2) 2391f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen return 0; 2401f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen assert(FoldIdx<2 && "FoldIdx refers no nonexistent operand"); 2411f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2421f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen const MachineOperand &FoldOp = MI->getOperand(FoldIdx); 2431f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen const MachineOperand &LiveOp = MI->getOperand(1-FoldIdx); 2441f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2451f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen if (FoldOp.getSubReg() || LiveOp.getSubReg()) 2461f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen return 0; 2471f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2481f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen unsigned FoldReg = FoldOp.getReg(); 2491f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen unsigned LiveReg = LiveOp.getReg(); 2501f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2511f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen assert(TargetRegisterInfo::isVirtualRegister(FoldReg) && 2521f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen "Cannot fold physregs"); 2531f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2541f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen const MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo(); 2551f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen const TargetRegisterClass *RC = MRI.getRegClass(FoldReg); 2561f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2571f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen if (TargetRegisterInfo::isPhysicalRegister(LiveOp.getReg())) 2581f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen return RC->contains(LiveOp.getReg()) ? RC : 0; 2591f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 260fa226bccaa90c520cac154df74069bbabb976eabJakob Stoklund Olesen if (RC->hasSubClassEq(MRI.getRegClass(LiveReg))) 2611f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen return RC; 2621f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2631f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen // FIXME: Allow folding when register classes are memory compatible. 2641f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen return 0; 2651f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen} 2661f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 2671f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesenbool TargetInstrInfoImpl:: 2681f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund OlesencanFoldMemoryOperand(const MachineInstr *MI, 2691f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen const SmallVectorImpl<unsigned> &Ops) const { 2701f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen return MI->isCopy() && Ops.size() == 1 && canFoldCopy(MI, Ops[0]); 2711f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen} 2721f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 273c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// foldMemoryOperand - Attempt to fold a load or store of the specified stack 274c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// slot into the specified machine instruction for the specified operand(s). 275c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// If this is possible, a new instruction is returned with the specified 276c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// operand folded, otherwise NULL is returned. The client is responsible for 277c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// removing the old instruction and adding the new one in the instruction 278c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// stream. 279c54baa2d43730f1804acfb4f4e738fba72f966bdDan GohmanMachineInstr* 280e05442d50806e2850eae1571958816028093df85Jakob Stoklund OlesenTargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI, 281c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman const SmallVectorImpl<unsigned> &Ops, 2821f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen int FI) const { 283c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman unsigned Flags = 0; 284c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman for (unsigned i = 0, e = Ops.size(); i != e; ++i) 285c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman if (MI->getOperand(Ops[i]).isDef()) 286c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman Flags |= MachineMemOperand::MOStore; 287c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman else 288c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman Flags |= MachineMemOperand::MOLoad; 289c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman 2901f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen MachineBasicBlock *MBB = MI->getParent(); 2911f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen assert(MBB && "foldMemoryOperand needs an inserted instruction"); 2921f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen MachineFunction &MF = *MBB->getParent(); 293e05442d50806e2850eae1571958816028093df85Jakob Stoklund Olesen 294c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman // Ask the target to do the actual folding. 2959fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen if (MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI)) { 2969fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen // Add a memory operand, foldMemoryOperandImpl doesn't do that. 2979fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen assert((!(Flags & MachineMemOperand::MOStore) || 2985a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng NewMI->mayStore()) && 2999fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen "Folded a def to a non-store!"); 3009fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen assert((!(Flags & MachineMemOperand::MOLoad) || 3015a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng NewMI->mayLoad()) && 3029fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen "Folded a use to a non-load!"); 3039fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen const MachineFrameInfo &MFI = *MF.getFrameInfo(); 3049fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen assert(MFI.getObjectOffset(FI) != -1); 3059fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen MachineMemOperand *MMO = 306f4a5084d06438fcd7f91684b6236b66c4c202e16Jay Foad MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI), 30793a95ae8a9d8eb19dc0d90281473be2fb1c05a17Chris Lattner Flags, MFI.getObjectSize(FI), 3089fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen MFI.getObjectAlignment(FI)); 3099fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen NewMI->addMemOperand(MF, MMO); 3101f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 3119fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen // FIXME: change foldMemoryOperandImpl semantics to also insert NewMI. 3129fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen return MBB->insert(MI, NewMI); 3139fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen } 3141f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 3159fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen // Straight COPY may fold as load/store. 3169fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen if (!MI->isCopy() || Ops.size() != 1) 3179fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen return 0; 3181f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 3199fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen const TargetRegisterClass *RC = canFoldCopy(MI, Ops[0]); 3209fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen if (!RC) 3219fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen return 0; 3221f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 3239fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen const MachineOperand &MO = MI->getOperand(1-Ops[0]); 3249fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen MachineBasicBlock::iterator Pos = MI; 3259fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3261f32340d95ac480bfc74bcfd00fd5cffbe078652Jakob Stoklund Olesen 3279fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen if (Flags == MachineMemOperand::MOStore) 3289fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen storeRegToStackSlot(*MBB, Pos, MO.getReg(), MO.isKill(), FI, RC, TRI); 3299fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen else 3309fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen loadRegFromStackSlot(*MBB, Pos, MO.getReg(), FI, RC, TRI); 3319fac4159ddf65d90ebcccd80a0ba513cd8e95be1Jakob Stoklund Olesen return --Pos; 332c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman} 333c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman 334c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// foldMemoryOperand - Same as the previous version except it allows folding 335c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// of any load and store from / to any address, not just from a specific 336c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman/// stack slot. 337c54baa2d43730f1804acfb4f4e738fba72f966bdDan GohmanMachineInstr* 338e05442d50806e2850eae1571958816028093df85Jakob Stoklund OlesenTargetInstrInfo::foldMemoryOperand(MachineBasicBlock::iterator MI, 339c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman const SmallVectorImpl<unsigned> &Ops, 340c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr* LoadMI) const { 3415a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng assert(LoadMI->canFoldAsLoad() && "LoadMI isn't foldable!"); 342c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman#ifndef NDEBUG 343c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman for (unsigned i = 0, e = Ops.size(); i != e; ++i) 344c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!"); 345c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman#endif 346e05442d50806e2850eae1571958816028093df85Jakob Stoklund Olesen MachineBasicBlock &MBB = *MI->getParent(); 347e05442d50806e2850eae1571958816028093df85Jakob Stoklund Olesen MachineFunction &MF = *MBB.getParent(); 348c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman 349c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman // Ask the target to do the actual folding. 350c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI); 351c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman if (!NewMI) return 0; 352c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman 353e05442d50806e2850eae1571958816028093df85Jakob Stoklund Olesen NewMI = MBB.insert(MI, NewMI); 354e05442d50806e2850eae1571958816028093df85Jakob Stoklund Olesen 355c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman // Copy the memoperands from the load to the folded instruction. 356c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman NewMI->setMemRefs(LoadMI->memoperands_begin(), 357c76909abfec876c6b751d693ebd3df07df686aa0Dan Gohman LoadMI->memoperands_end()); 358c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman 359c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman return NewMI; 360c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman} 361a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 36244acc24117b1a9eafb7b9b993731ca0115569ea2Evan Chengbool TargetInstrInfo:: 36344acc24117b1a9eafb7b9b993731ca0115569ea2Evan ChengisReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, 36444acc24117b1a9eafb7b9b993731ca0115569ea2Evan Cheng AliasAnalysis *AA) const { 365a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman const MachineFunction &MF = *MI->getParent()->getParent(); 366a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman const MachineRegisterInfo &MRI = MF.getRegInfo(); 367a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman const TargetMachine &TM = MF.getTarget(); 368a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman const TargetInstrInfo &TII = *TM.getInstrInfo(); 369a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman const TargetRegisterInfo &TRI = *TM.getRegisterInfo(); 370a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 3714a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen // Remat clients assume operand 0 is the defined register. 3724a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen if (!MI->getNumOperands() || !MI->getOperand(0).isReg()) 3734a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen return false; 3744a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen unsigned DefReg = MI->getOperand(0).getReg(); 3754a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen 3769d548d0343774636e72713d678a078c8e808ed29Jakob Stoklund Olesen // A sub-register definition can only be rematerialized if the instruction 3779d548d0343774636e72713d678a078c8e808ed29Jakob Stoklund Olesen // doesn't read the other parts of the register. Otherwise it is really a 3789d548d0343774636e72713d678a078c8e808ed29Jakob Stoklund Olesen // read-modify-write operation on the full virtual register which cannot be 3799d548d0343774636e72713d678a078c8e808ed29Jakob Stoklund Olesen // moved safely. 3804a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen if (TargetRegisterInfo::isVirtualRegister(DefReg) && 3814a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen MI->getOperand(0).getSubReg() && MI->readsVirtualRegister(DefReg)) 3829d548d0343774636e72713d678a078c8e808ed29Jakob Stoklund Olesen return false; 3839d548d0343774636e72713d678a078c8e808ed29Jakob Stoklund Olesen 384a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // A load from a fixed stack slot can be rematerialized. This may be 385a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // redundant with subsequent checks, but it's target-independent, 386a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // simple, and a common case. 387a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman int FrameIdx = 0; 388a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (TII.isLoadFromStackSlot(MI, FrameIdx) && 389a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman MF.getFrameInfo()->isImmutableObjectIndex(FrameIdx)) 390a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return true; 391a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 392a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // Avoid instructions obviously unsafe for remat. 3935a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng if (MI->isNotDuplicable() || MI->mayStore() || 394c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng MI->hasUnmodeledSideEffects()) 395c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng return false; 396c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng 397c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng // Don't remat inline asm. We have no idea how expensive it is 398c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng // even if it's side effect free. 399c36b7069b42bece963b7e6adf020353ce990ef76Evan Cheng if (MI->isInlineAsm()) 400a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 401a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 402a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // Avoid instructions which load from potentially varying memory. 4035a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng if (MI->mayLoad() && !MI->isInvariantLoad(AA)) 404a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 405a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 406a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // If any of the registers accessed are non-constant, conservatively assume 407a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // the instruction is not rematerializable. 408a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 409a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman const MachineOperand &MO = MI->getOperand(i); 410a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (!MO.isReg()) continue; 411a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman unsigned Reg = MO.getReg(); 412a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (Reg == 0) 413a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman continue; 414a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 415a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // Check for a well-behaved physical register. 416a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 417a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (MO.isUse()) { 418a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // If the physreg has no defs anywhere, it's just an ambient register 419a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // and we can freely move its uses. Alternatively, if it's allocatable, 420a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // it could get allocated to something with a def during allocation. 421a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (!MRI.def_empty(Reg)) 422a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 423a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman BitVector AllocatableRegs = TRI.getAllocatableSet(MF, 0); 424a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (AllocatableRegs.test(Reg)) 425a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 426a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // Check for a def among the register's aliases too. 427a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman for (const unsigned *Alias = TRI.getAliasSet(Reg); *Alias; ++Alias) { 428a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman unsigned AliasReg = *Alias; 429a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (!MRI.def_empty(AliasReg)) 430a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 431a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (AllocatableRegs.test(AliasReg)) 432a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 433a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman } 434a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman } else { 435a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // A physreg def. We can't remat it. 436a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 437a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman } 438a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman continue; 439a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman } 440a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 4414a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen // Only allow one virtual-register def. There may be multiple defs of the 4424a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen // same virtual register, though. 4434a0a18af4a9a47466a6077a158387ba4f57bf636Jakob Stoklund Olesen if (MO.isDef() && Reg != DefReg) 444a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 445a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 446a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // Don't allow any virtual-register uses. Rematting an instruction with 447a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // virtual register uses would length the live ranges of the uses, which 448a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // is not necessarily a good idea, certainly not "trivial". 449a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman if (MO.isUse()) 450a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return false; 451a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman } 452a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman 453a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman // Everything checked out. 454a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman return true; 455a70dca156fa76d452f54829b5c5f962ddfd94ef2Dan Gohman} 456774bc882fdb3bbb0558075360c6e5bc510a0bdadEvan Cheng 45786050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng/// isSchedulingBoundary - Test if the given instruction should be 45886050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng/// considered a scheduling boundary. This primarily includes labels 45986050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng/// and terminators. 46086050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Chengbool TargetInstrInfoImpl::isSchedulingBoundary(const MachineInstr *MI, 46186050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng const MachineBasicBlock *MBB, 46286050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng const MachineFunction &MF) const{ 46386050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // Terminators and labels can't be scheduled around. 4645a96b3dad2f634c9081c8b2b6c2575441dc5a2bdEvan Cheng if (MI->isTerminator() || MI->isLabel()) 46586050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng return true; 46686050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 46786050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // Don't attempt to schedule around any instruction that defines 46886050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // a stack-oriented pointer, as it's unlikely to be profitable. This 46986050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // saves compile time, because it doesn't require every single 47086050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // stack slot reference to depend on the instruction that does the 47186050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng // modification. 47286050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng const TargetLowering &TLI = *MF.getTarget().getTargetLowering(); 47386050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng if (MI->definesRegister(TLI.getStackPointerRegisterToSaveRestore())) 47486050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng return true; 47586050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 47686050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng return false; 47786050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng} 47886050dc8cc0aaea8c9dfeb89de02cafbd7f48d92Evan Cheng 479c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick// Provide a global flag for disabling the PreRA hazard recognizer that targets 480c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick// may choose to honor. 481c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trickbool TargetInstrInfoImpl::usePreRAHazardRecognizer() const { 482c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick return !DisableHazardRecognizer; 483c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick} 484c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick 485c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4Andrew Trick// Default implementation of CreateTargetRAHazardRecognizer. 4862da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickScheduleHazardRecognizer *TargetInstrInfoImpl:: 4872da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickCreateTargetHazardRecognizer(const TargetMachine *TM, 4882da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const ScheduleDAG *DAG) const { 4892da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick // Dummy hazard recognizer allows all instructions to issue. 4902da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick return new ScheduleHazardRecognizer(); 4912da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick} 4922da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick 493774bc882fdb3bbb0558075360c6e5bc510a0bdadEvan Cheng// Default implementation of CreateTargetPostRAHazardRecognizer. 494774bc882fdb3bbb0558075360c6e5bc510a0bdadEvan ChengScheduleHazardRecognizer *TargetInstrInfoImpl:: 4952da8bc8a5f7705ac131184cd247f48500da0d74eAndrew TrickCreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, 4962da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick const ScheduleDAG *DAG) const { 4972da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick return (ScheduleHazardRecognizer *) 4982da8bc8a5f7705ac131184cd247f48500da0d74eAndrew Trick new ScoreboardHazardRecognizer(II, DAG, "post-RA-sched"); 499774bc882fdb3bbb0558075360c6e5bc510a0bdadEvan Cheng} 500