ARMAsmPrinter.cpp revision 421b106872d9c8adb4f14d77a8c6a1afeaaa29f6
197f06937449c593a248dbbb1365e6ae408fb9decChris Lattner//===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===// 297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner// 37bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// The LLVM Compiler Infrastructure 47bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 67bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// License. See LICENSE.TXT for details. 77bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 87bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 97bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 107bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// This file contains a printer that converts from our internal representation 117bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// of machine-dependent LLVM code to GAS-format ARM assembly language. 127bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 137bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 147bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1595b2c7da5e83670881270c1cd231a240be0556d9Chris Lattner#define DEBUG_TYPE "asm-printer" 167bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "ARM.h" 17b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMAsmPrinter.h" 18a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "ARMAddressingModes.h" 19b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMBuildAttrs.h" 20b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMBaseRegisterInfo.h" 21a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "ARMConstantPoolValue.h" 2297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "ARMMachineFunctionInfo.h" 235de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng#include "ARMMCExpr.h" 2497f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "ARMTargetMachine.h" 2517b443df4368acfad853d09858c033c45c468d5cJason W Kim#include "ARMTargetObjectFile.h" 26b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "InstPrinter/ARMInstPrinter.h" 273f282aa94b80f4a93ff3cbc37cf3cd4a851c8432Dale Johannesen#include "llvm/Analysis/DebugInfo.h" 287bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Constants.h" 297bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Module.h" 30e55b15fa4753ef08cbfa2127d2d220b77aa07d87Benjamin Kramer#include "llvm/Type.h" 31cf20ac4fd12ea3510a8f32a24fff69eebe7b6f4aDan Gohman#include "llvm/Assembly/Writer.h" 32b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/CodeGen/MachineModuleInfoImpls.h" 337bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineFunctionPass.h" 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/MachineJumpTableInfo.h" 35b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/MC/MCAsmInfo.h" 36cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola#include "llvm/MC/MCAssembler.h" 37b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/MC/MCContext.h" 38becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling#include "llvm/MC/MCExpr.h" 3997f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "llvm/MC/MCInst.h" 40f9bdeddb96043559c61f176f8077e3b91a0c544fChris Lattner#include "llvm/MC/MCSectionMachO.h" 41cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola#include "llvm/MC/MCObjectStreamer.h" 426c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner#include "llvm/MC/MCStreamer.h" 43325d3dcfe4d5efc91db0f59b20a72a11dea024edChris Lattner#include "llvm/MC/MCSymbol.h" 44d62f1b4168d4327c119642d28c26c836ae6717abChris Lattner#include "llvm/Target/Mangler.h" 45b01c4bbb4573e0007444e218b683840e4519e0c8Rafael Espindola#include "llvm/Target/TargetData.h" 467bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Target/TargetMachine.h" 475be54b00bdbe1abd02dde46ca2c4b0e5aaf7b537Evan Cheng#include "llvm/Target/TargetOptions.h" 4851b198af83cb0080c2709b04c129a3d774c07765Daniel Dunbar#include "llvm/Target/TargetRegistry.h" 49c324ecb7bc93a1f09db29851438ec5ee72b143ebEvan Cheng#include "llvm/ADT/SmallPtrSet.h" 50c40d9f9bae70c83947bf8fa5f9ee97adbf1bb0c0Jim Grosbach#include "llvm/ADT/SmallString.h" 5154c78ef2fed32e82e6aea8cbeb89156814eaf27cBob Wilson#include "llvm/ADT/StringExtras.h" 5297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "llvm/Support/CommandLine.h" 5359135f49e1699daec9a43fc2d15715d55b910f54Devang Patel#include "llvm/Support/Debug.h" 543046470919e648ff7c011bda9c094163062c83dcTorok Edwin#include "llvm/Support/ErrorHandling.h" 55b23569aff0a6d2b231cb93cc4acd0ac060ba560fChris Lattner#include "llvm/Support/raw_ostream.h" 567bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include <cctype> 577bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolausing namespace llvm; 587bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 5995b2c7da5e83670881270c1cd231a240be0556d9Chris Lattnernamespace { 60cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 61cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // Per section and per symbol attributes are not supported. 62cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // To implement them we would need the ability to delay this emission 63cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // until the assembly file is fully parsed/generated as only then do we 64cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // know the symbol and section numbers. 65cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class AttributeEmitter { 66cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 67cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void MaybeSwitchVendor(StringRef Vendor) = 0; 68cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0; 69f009a961caa75465999ef3bc764984d97a7da331Jason W Kim virtual void EmitTextAttribute(unsigned Attribute, StringRef String) = 0; 70cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void Finish() = 0; 714921e2356ef8f3b3f9ebd0c154b091c3d5dd2ce4Rafael Espindola virtual ~AttributeEmitter() {} 72cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 73cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 74cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class AsmAttributeEmitter : public AttributeEmitter { 75cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCStreamer &Streamer; 76cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 77cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 78cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AsmAttributeEmitter(MCStreamer &Streamer_) : Streamer(Streamer_) {} 79cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void MaybeSwitchVendor(StringRef Vendor) { } 80cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 81cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void EmitAttribute(unsigned Attribute, unsigned Value) { 82cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer.EmitRawText("\t.eabi_attribute " + 83cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Twine(Attribute) + ", " + Twine(Value)); 84cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 85cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 86f009a961caa75465999ef3bc764984d97a7da331Jason W Kim void EmitTextAttribute(unsigned Attribute, StringRef String) { 87f009a961caa75465999ef3bc764984d97a7da331Jason W Kim switch (Attribute) { 88f009a961caa75465999ef3bc764984d97a7da331Jason W Kim case ARMBuildAttrs::CPU_name: 89c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim Streamer.EmitRawText(StringRef("\t.cpu ") + LowercaseString(String)); 90f009a961caa75465999ef3bc764984d97a7da331Jason W Kim break; 91728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* GAS requires .fpu to be emitted regardless of EABI attribute */ 92728ff0db783152ed4f21f7746bd7874b49708172Renato Golin case ARMBuildAttrs::Advanced_SIMD_arch: 93728ff0db783152ed4f21f7746bd7874b49708172Renato Golin case ARMBuildAttrs::VFP_arch: 94728ff0db783152ed4f21f7746bd7874b49708172Renato Golin Streamer.EmitRawText(StringRef("\t.fpu ") + LowercaseString(String)); 95728ff0db783152ed4f21f7746bd7874b49708172Renato Golin break; 96f009a961caa75465999ef3bc764984d97a7da331Jason W Kim default: assert(0 && "Unsupported Text attribute in ASM Mode"); break; 97f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 98f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 99cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void Finish() { } 100cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 101cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 102cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class ObjectAttributeEmitter : public AttributeEmitter { 103cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCObjectStreamer &Streamer; 104cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola StringRef CurrentVendor; 105cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola SmallString<64> Contents; 106cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 107cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 108cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola ObjectAttributeEmitter(MCObjectStreamer &Streamer_) : 109cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer(Streamer_), CurrentVendor("") { } 110cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 111cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void MaybeSwitchVendor(StringRef Vendor) { 112cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola assert(!Vendor.empty() && "Vendor cannot be empty."); 113cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 114cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola if (CurrentVendor.empty()) 115cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola CurrentVendor = Vendor; 116cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola else if (CurrentVendor == Vendor) 117cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola return; 118cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola else 119cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Finish(); 120cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 121cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola CurrentVendor = Vendor; 122cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1233336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola assert(Contents.size() == 0); 124cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 125cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 126cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void EmitAttribute(unsigned Attribute, unsigned Value) { 127cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // FIXME: should be ULEB 128cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Contents += Attribute; 129cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Contents += Value; 130cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 131cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 132f009a961caa75465999ef3bc764984d97a7da331Jason W Kim void EmitTextAttribute(unsigned Attribute, StringRef String) { 133f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Contents += Attribute; 134c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim Contents += UppercaseString(String); 135f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Contents += 0; 136f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 137f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 138cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void Finish() { 1393336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t ContentsSize = Contents.size(); 1403336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1413336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola // Vendor size + Vendor name + '\0' 1423336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t VendorHeaderSize = 4 + CurrentVendor.size() + 1; 143cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1443336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola // Tag + Tag Size 1453336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t TagHeaderSize = 1 + 4; 146cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1473336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(VendorHeaderSize + TagHeaderSize + ContentsSize, 4); 1483336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitBytes(CurrentVendor, 0); 1493336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(0, 1); // '\0' 1503336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1513336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(ARMBuildAttrs::File, 1); 1523336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(TagHeaderSize + ContentsSize, 4); 153cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 154cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer.EmitBytes(Contents, 0); 1553336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1563336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Contents.clear(); 157cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 158cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 159cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1607bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} // end of anonymous namespace 1617bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 162baf120fbe8056ef68fc91b16465590fdf2311c27Jim GrosbachMachineLocation ARMAsmPrinter:: 163baf120fbe8056ef68fc91b16465590fdf2311c27Jim GrosbachgetDebugValueLocation(const MachineInstr *MI) const { 164baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach MachineLocation Location; 165baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach assert(MI->getNumOperands() == 4 && "Invalid no. of machine operands!"); 166baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach // Frame address. Currently handles register +- offset only. 167baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm()) 168baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm()); 169baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach else { 170baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n"); 171baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach } 172baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach return Location; 173baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach} 174baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach 175c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel/// getDwarfRegOpSize - get size required to emit given machine location using 176c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel/// dwarf encoding. 177c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patelunsigned ARMAsmPrinter::getDwarfRegOpSize(const MachineLocation &MLoc) const { 178c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel const TargetRegisterInfo *RI = TM.getRegisterInfo(); 179c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) 180c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return AsmPrinter::getDwarfRegOpSize(MLoc); 181c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel else { 182c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned Reg = MLoc.getReg(); 183c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel if (Reg >= ARM::S0 && Reg <= ARM::S31) { 184c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); 185c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // S registers are described as bit-pieces of a register 186c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0) 187c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32) 188c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 189c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned SReg = Reg - ARM::S0; 190c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned Rx = 256 + (SReg >> 1); 191c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB 192c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // 1 + ULEB(Rx) + 1 + 1 + 1 193c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return 4 + MCAsmInfo::getULEB128Size(Rx); 194c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel } 195c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 196c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel if (Reg >= ARM::Q0 && Reg <= ARM::Q15) { 197c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering"); 198c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // Q registers Q0-Q15 are described by composing two D registers together. 199c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8) 200c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 201c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned QReg = Reg - ARM::Q0; 202c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned D1 = 256 + 2 * QReg; 203c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned D2 = D1 + 1; 204c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 205c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) + 206c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8); 207c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // 6 + ULEB(D1) + ULEB(D2) 208c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return 6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2); 209c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel } 210c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel } 211c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return 0; 212c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel} 213c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 21427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel/// EmitDwarfRegOp - Emit dwarf register operation. 2150be77dff1147488814b8eea6ec8619f56e3d9f5eDevang Patelvoid ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { 21627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel const TargetRegisterInfo *RI = TM.getRegisterInfo(); 21727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) 2180be77dff1147488814b8eea6ec8619f56e3d9f5eDevang Patel AsmPrinter::EmitDwarfRegOp(MLoc); 21927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel else { 22027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned Reg = MLoc.getReg(); 22127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (Reg >= ARM::S0 && Reg <= ARM::S31) { 2220a6ea83f393d06fb424c470777a1c3e8a8c50ab1Devang Patel assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); 22327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S registers are described as bit-pieces of a register 22427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0) 22527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32) 22627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 22727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned SReg = Reg - ARM::S0; 22827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel bool odd = SReg & 0x1; 22927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned Rx = 256 + (SReg >> 1); 23027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 23127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_regx for S register"); 23227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_regx); 23327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 23427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment(Twine(SReg)); 23527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(Rx); 23627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 23727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (odd) { 23827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_bit_piece 32 32"); 23927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_bit_piece); 24027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 24127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 24227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } else { 24327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_bit_piece 32 0"); 24427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_bit_piece); 24527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 24627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(0); 24727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 24871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel } else if (Reg >= ARM::Q0 && Reg <= ARM::Q15) { 2490a6ea83f393d06fb424c470777a1c3e8a8c50ab1Devang Patel assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering"); 25071f3f1146f2ba2773f0467767b67c12258960f34Devang Patel // Q registers Q0-Q15 are described by composing two D registers together. 25171f3f1146f2ba2773f0467767b67c12258960f34Devang Patel // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8) 25271f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 25371f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned QReg = Reg - ARM::Q0; 25471f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned D1 = 256 + 2 * QReg; 25571f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned D2 = D1 + 1; 25671f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 25771f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_regx for Q register: D1"); 25871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_regx); 25971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(D1); 26071f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_piece 8"); 26171f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_piece); 26271f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(8); 26371f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 26471f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_regx for Q register: D2"); 26571f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_regx); 26671f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(D2); 26771f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_piece 8"); 26871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_piece); 26971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(8); 27027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 27127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 27227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel} 27327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 274953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattnervoid ARMAsmPrinter::EmitFunctionEntryLabel() { 275953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner if (AFI->isThumbFunction()) { 276ce79299f78bb04e76e1860ab119b85d69f3a19c7Jim Grosbach OutStreamer.EmitAssemblerFlag(MCAF_Code16); 2776469540adf63d94a876c2b623cb4ca70479647f7Rafael Espindola OutStreamer.EmitThumbFunc(CurrentFnSym); 278953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner } 279b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 280953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner OutStreamer.EmitLabel(CurrentFnSym); 281953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner} 282953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner 2832317e40539aac11da00bd587b5f0def04d989769Jim Grosbach/// runOnMachineFunction - This uses the EmitInstruction() 2847bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola/// method to print assembly for each instruction. 2857bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola/// 2867bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolabool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { 287a8e2989ece6dc46df59b0768184028257f913843Evan Cheng AFI = MF.getInfo<ARMFunctionInfo>(); 2886d63a728586d56eb3e881905beb9db27f520f5d3Evan Cheng MCP = MF.getConstantPool(); 289a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 290d49fe1b6bc4615684c2ec71140a21e9c4cd69ce3Chris Lattner return AsmPrinter::runOnMachineFunction(MF); 29132bd5f4f6a374f9ab0fcbd2cf6a8561019a6fd56Rafael Espindola} 29232bd5f4f6a374f9ab0fcbd2cf6a8561019a6fd56Rafael Espindola 293055b0310f862b91f33699037ce67d3ab8137c20cEvan Chengvoid ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 29435c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner raw_ostream &O, const char *Modifier) { 295055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng const MachineOperand &MO = MI->getOperand(OpNum); 2965cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov unsigned TF = MO.getTargetFlags(); 2975cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov 2982f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola switch (MO.getType()) { 2998bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner default: 3008bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner assert(0 && "<unknown operand type>"); 3015bafff36c798608a189c517d37527e4a38863071Bob Wilson case MachineOperand::MO_Register: { 3025bafff36c798608a189c517d37527e4a38863071Bob Wilson unsigned Reg = MO.getReg(); 3038bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner assert(TargetRegisterInfo::isPhysicalRegister(Reg)); 30435636281c7ab6eb128b4ced6bf7ae0b6b8458dd2Jim Grosbach assert(!MO.getSubReg() && "Subregs should be eliminated!"); 30535636281c7ab6eb128b4ced6bf7ae0b6b8458dd2Jim Grosbach O << ARMInstPrinter::getRegisterName(Reg); 3062f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 3075bafff36c798608a189c517d37527e4a38863071Bob Wilson } 308a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_Immediate: { 3095adb66a646e2ec32265263739f5b01c3f50c176aEvan Cheng int64_t Imm = MO.getImm(); 310632606c724ebcfa6a9da71c443151e7a65829c99Anton Korobeynikov O << '#'; 3115cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov if ((Modifier && strcmp(Modifier, "lo16") == 0) || 312650b7d76afbc7db2dd1a4590149d50a162bb25d8Jason W Kim (TF == ARMII::MO_LO16)) 3135cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":lower16:"; 3145cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov else if ((Modifier && strcmp(Modifier, "hi16") == 0) || 315650b7d76afbc7db2dd1a4590149d50a162bb25d8Jason W Kim (TF == ARMII::MO_HI16)) 3165cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":upper16:"; 317632606c724ebcfa6a9da71c443151e7a65829c99Anton Korobeynikov O << Imm; 3182f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 319a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 3202f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola case MachineOperand::MO_MachineBasicBlock: 3211b2eb0e8a6aaf034675b17be6d853cb1c666200fChris Lattner O << *MO.getMBB()->getSymbol(); 3222f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola return; 32384b19be6ab9544f72eafb11048a1121f5ea77c95Rafael Espindola case MachineOperand::MO_GlobalAddress: { 32446510a73e977273ec67747eb34cbdb43f815e451Dan Gohman const GlobalValue *GV = MO.getGlobal(); 3255cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov if ((Modifier && strcmp(Modifier, "lo16") == 0) || 3265cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov (TF & ARMII::MO_LO16)) 3275cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":lower16:"; 3285cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov else if ((Modifier && strcmp(Modifier, "hi16") == 0) || 3295cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov (TF & ARMII::MO_HI16)) 3305cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":upper16:"; 331d62f1b4168d4327c119642d28c26c836ae6717abChris Lattner O << *Mang->getSymbol(GV); 3327751ad92daeea5a3502fbc266ae814baec5c03e6Anton Korobeynikov 3330c08d092049c025c9ccf7143e39f39dc4e30d6b4Chris Lattner printOffset(MO.getOffset(), O); 3341d6111c5ac97c321782637b2cd72e2c3e4d3d694Jim Grosbach if (TF == ARMII::MO_PLT) 3350ae4a3357a556261f25b1584a2d9914637c69e65Lauro Ramos Venancio O << "(PLT)"; 3362f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 337a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 338a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_ExternalSymbol: { 33910b318bcb39218d2ed525e4862c854bc8d1baf63Chris Lattner O << *GetExternalSymbolSymbol(MO.getSymbolName()); 3401d6111c5ac97c321782637b2cd72e2c3e4d3d694Jim Grosbach if (TF == ARMII::MO_PLT) 3410ae4a3357a556261f25b1584a2d9914637c69e65Lauro Ramos Venancio O << "(PLT)"; 3422f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 343a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 3442f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola case MachineOperand::MO_ConstantPoolIndex: 3451b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner O << *GetCPISymbol(MO.getIndex()); 3462f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 347a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_JumpTableIndex: 3481b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner O << *GetJTISymbol(MO.getIndex()); 349a8e2989ece6dc46df59b0768184028257f913843Evan Cheng break; 3502f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola } 3517bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 3527bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 353055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng//===--------------------------------------------------------------------===// 354055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng 3550890cf124f00da3dc943c1882f4221955e0281edChris LattnerMCSymbol *ARMAsmPrinter:: 3560890cf124f00da3dc943c1882f4221955e0281edChris LattnerGetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2, 3570890cf124f00da3dc943c1882f4221955e0281edChris Lattner const MachineBasicBlock *MBB) const { 3580890cf124f00da3dc943c1882f4221955e0281edChris Lattner SmallString<60> Name; 3590890cf124f00da3dc943c1882f4221955e0281edChris Lattner raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() 360bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner << getFunctionNumber() << '_' << uid << '_' << uid2 3610890cf124f00da3dc943c1882f4221955e0281edChris Lattner << "_set_" << MBB->getNumber(); 3629b97a73dedf736e14b04a3d1a153f10d25b2507bChris Lattner return OutContext.GetOrCreateSymbol(Name.str()); 3630890cf124f00da3dc943c1882f4221955e0281edChris Lattner} 3640890cf124f00da3dc943c1882f4221955e0281edChris Lattner 3650890cf124f00da3dc943c1882f4221955e0281edChris LattnerMCSymbol *ARMAsmPrinter:: 3660890cf124f00da3dc943c1882f4221955e0281edChris LattnerGetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const { 3670890cf124f00da3dc943c1882f4221955e0281edChris Lattner SmallString<60> Name; 3680890cf124f00da3dc943c1882f4221955e0281edChris Lattner raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI" 369281e7767df71b3f727ade80a16ff0c4fe5a49dd9Chris Lattner << getFunctionNumber() << '_' << uid << '_' << uid2; 3709b97a73dedf736e14b04a3d1a153f10d25b2507bChris Lattner return OutContext.GetOrCreateSymbol(Name.str()); 371bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner} 372bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner 373433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 374433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim GrosbachMCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel(void) const { 375433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach SmallString<60> Name; 376433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "SJLJEH" 377433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach << getFunctionNumber(); 378433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach return OutContext.GetOrCreateSymbol(Name.str()); 379433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach} 380433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 381055b0310f862b91f33699037ce67d3ab8137c20cEvan Chengbool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 382c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner unsigned AsmVariant, const char *ExtraCode, 383c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner raw_ostream &O) { 384a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Does this asm operand have a single letter operand modifier? 385a8e2989ece6dc46df59b0768184028257f913843Evan Cheng if (ExtraCode && ExtraCode[0]) { 386a8e2989ece6dc46df59b0768184028257f913843Evan Cheng if (ExtraCode[1] != 0) return true; // Unknown modifier. 3878e9ece75db5045ec057efbbdba6550fa0d85e695Anton Korobeynikov 388a8e2989ece6dc46df59b0768184028257f913843Evan Cheng switch (ExtraCode[0]) { 389a8e2989ece6dc46df59b0768184028257f913843Evan Cheng default: return true; // Unknown modifier. 3909b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson case 'a': // Print as a memory address. 3919b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson if (MI->getOperand(OpNum).isReg()) { 3922f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach O << "[" 3932f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 3942f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach << "]"; 3959b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson return false; 3969b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson } 3979b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson // Fallthrough 3989b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson case 'c': // Don't print "#" before an immediate operand. 3994f38b383d5089c49489a9a56d8efd0eb76048b3fBob Wilson if (!MI->getOperand(OpNum).isImm()) 4004f38b383d5089c49489a9a56d8efd0eb76048b3fBob Wilson return true; 4012317e40539aac11da00bd587b5f0def04d989769Jim Grosbach O << MI->getOperand(OpNum).getImm(); 4028f3434647d3d39b49475239e3be1b8afb06415cfBob Wilson return false; 403e21e39666e8a41ffd4971d8bb023b70b59297267Evan Cheng case 'P': // Print a VFP double precision register. 404d831cda3e74235704f163d5a18352584d537517aEvan Cheng case 'q': // Print a NEON quad precision register. 40535c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner printOperand(MI, OpNum, O); 40623a95704949b99ca07afe45c6946d0fa26baf9f3Evan Cheng return false; 4070628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher case 'y': // Print a VFP single precision register as indexed double. 4080628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher // This uses the ordering of the alias table to get the first 'd' register 4090628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher // that overlaps the 's' register. Also, s0 is an odd register, hence the 4100628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher // odd modulus check below. 4110628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher if (MI->getOperand(OpNum).isReg()) { 4120628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher unsigned Reg = MI->getOperand(OpNum).getReg(); 4130628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 4140628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher O << ARMInstPrinter::getRegisterName(TRI->getAliasSet(Reg)[0]) << 4150628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher (((Reg % 2) == 1) ? "[0]" : "[1]"); 4160628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher return false; 4170628d38085b28a59a4b13d7e35760cce54f0af7aEric Christopher } 4184db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher return true; 419fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'B': // Bitwise inverse of integer or symbol without a preceding #. 420e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher if (!MI->getOperand(OpNum).isImm()) 421e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher return true; 422e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher O << ~(MI->getOperand(OpNum).getImm()); 423e1739d598d2c980822cc42bbf9821b91ebbc829fEric Christopher return false; 424fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'L': // The low 16 bits of an immediate constant. 4254db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher if (!MI->getOperand(OpNum).isImm()) 4264db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher return true; 4274db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher O << (MI->getOperand(OpNum).getImm() & 0xffff); 4284db7dec70b06a1d50a265c3666e126065e09f396Eric Christopher return false; 429fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'M': // A register range suitable for LDM/STM. 430fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'p': // The high single-precision register of a VFP double-precision 431fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher // register. 432fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'e': // The low doubleword register of a NEON quad register. 433fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'f': // The high doubleword register of a NEON quad register. 434fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'h': // A range of VFP/NEON registers suitable for VLD1/VST1. 435fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'A': // A memory operand for a VLD1/VST1 instruction. 436fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'Q': // The least significant register of a pair. 437fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'R': // The most significant register of a pair. 438fef50062eae28fc6d893cd3ef528f8ca85cd50b0Eric Christopher case 'H': // The highest-numbered register of a pair. 4399bb43e167576d464637c480eccc5696e01e1887cBob Wilson // These modifiers are not yet supported. 440d984eb6073d5445f08fb0cea67a668b1b5e888e0Bob Wilson return true; 44184f60b7359e1aa90794bb19de2bbf4d25dc2f01dEvan Cheng } 442a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 443e9952213086c865eb678bd3f4c9c7d849f0249d2Jim Grosbach 44435c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner printOperand(MI, OpNum, O); 445a8e2989ece6dc46df59b0768184028257f913843Evan Cheng return false; 446a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 447a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 448224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilsonbool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 449055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng unsigned OpNum, unsigned AsmVariant, 450c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner const char *ExtraCode, 451c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner raw_ostream &O) { 4528f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher // Does this asm operand have a single letter operand modifier? 4538f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher if (ExtraCode && ExtraCode[0]) { 4548f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher if (ExtraCode[1] != 0) return true; // Unknown modifier. 4558f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher 4568f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher switch (ExtraCode[0]) { 4578f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher default: return true; // Unknown modifier. 4588f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher case 'm': // The base register of a memory operand. 4598f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher if (!MI->getOperand(OpNum).isReg()) 4608f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher return true; 4618f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher O << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()); 4628f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher return false; 4638f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher } 4648f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher } 4658f8946389418ce3cdbf69bbf34443efe0c874b40Eric Christopher 466765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson const MachineOperand &MO = MI->getOperand(OpNum); 467765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson assert(MO.isReg() && "unexpected inline asm memory operand"); 4682317e40539aac11da00bd587b5f0def04d989769Jim Grosbach O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]"; 469224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson return false; 470224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson} 471224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson 472812209a58c5520c604bc9279aa069e5ae066e860Bob Wilsonvoid ARMAsmPrinter::EmitStartOfAsmFile(Module &M) { 4730fb34683b9e33238288d2af1e090582464df8387Bob Wilson if (Subtarget->isTargetDarwin()) { 4740fb34683b9e33238288d2af1e090582464df8387Bob Wilson Reloc::Model RelocM = TM.getRelocationModel(); 4750fb34683b9e33238288d2af1e090582464df8387Bob Wilson if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) { 4760fb34683b9e33238288d2af1e090582464df8387Bob Wilson // Declare all the text sections up front (before the DWARF sections 4770fb34683b9e33238288d2af1e090582464df8387Bob Wilson // emitted by AsmPrinter::doInitialization) so the assembler will keep 4780fb34683b9e33238288d2af1e090582464df8387Bob Wilson // them together at the beginning of the object file. This helps 4790fb34683b9e33238288d2af1e090582464df8387Bob Wilson // avoid out-of-range branches that are due a fundamental limitation of 4800fb34683b9e33238288d2af1e090582464df8387Bob Wilson // the way symbol offsets are encoded with the current Darwin ARM 4810fb34683b9e33238288d2af1e090582464df8387Bob Wilson // relocations. 482b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach const TargetLoweringObjectFileMachO &TLOFMacho = 4830d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman static_cast<const TargetLoweringObjectFileMachO &>( 4840d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman getObjFileLowering()); 48529e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getTextSection()); 48629e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection()); 48729e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection()); 48829e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson if (RelocM == Reloc::DynamicNoPIC) { 48929e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson const MCSection *sect = 49022772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner OutContext.getMachOSection("__TEXT", "__symbol_stub4", 49122772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner MCSectionMachO::S_SYMBOL_STUBS, 49222772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner 12, SectionKind::getText()); 49329e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(sect); 49429e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson } else { 49529e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson const MCSection *sect = 49622772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner OutContext.getMachOSection("__TEXT", "__picsymbolstub4", 49722772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner MCSectionMachO::S_SYMBOL_STUBS, 49822772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner 16, SectionKind::getText()); 49929e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(sect); 50029e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson } 50163db594559dc8eac666204c7907bae664f5234daBob Wilson const MCSection *StaticInitSect = 50263db594559dc8eac666204c7907bae664f5234daBob Wilson OutContext.getMachOSection("__TEXT", "__StaticInit", 50363db594559dc8eac666204c7907bae664f5234daBob Wilson MCSectionMachO::S_REGULAR | 50463db594559dc8eac666204c7907bae664f5234daBob Wilson MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS, 50563db594559dc8eac666204c7907bae664f5234daBob Wilson SectionKind::getText()); 50663db594559dc8eac666204c7907bae664f5234daBob Wilson OutStreamer.SwitchSection(StaticInitSect); 5070fb34683b9e33238288d2af1e090582464df8387Bob Wilson } 5080fb34683b9e33238288d2af1e090582464df8387Bob Wilson } 5090fb34683b9e33238288d2af1e090582464df8387Bob Wilson 510e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach // Use unified assembler syntax. 511afd1cc25786f68ca56a63d29ea2bd297990e9f81Jason W Kim OutStreamer.EmitAssemblerFlag(MCAF_SyntaxUnified); 512d61eca533081580d56fabee38f86507d8019ca75Anton Korobeynikov 51388ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov // Emit ARM Build Attributes 51488ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov if (Subtarget->isTargetELF()) { 515b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 516def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim emitAttributes(); 51788ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov } 5187bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 5197bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 5200f3cc657387d44cd7c56e4ddea896a50ab9106b8Anton Korobeynikov 5214a071d667d995b00e7853243ff9c7c1269324478Chris Lattnervoid ARMAsmPrinter::EmitEndOfAsmFile(Module &M) { 5225be54b00bdbe1abd02dde46ca2c4b0e5aaf7b537Evan Cheng if (Subtarget->isTargetDarwin()) { 523f61159b574155b056dbd5d6d44f47f753d424056Chris Lattner // All darwin targets use mach-o. 5240d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman const TargetLoweringObjectFileMachO &TLOFMacho = 5250d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 526b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MachineModuleInfoMachO &MMIMacho = 527b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MMI->getObjFileInfo<MachineModuleInfoMachO>(); 528e9952213086c865eb678bd3f4c9c7d849f0249d2Jim Grosbach 529a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Output non-lazy-pointers for external and common global variables. 530b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 531cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling 532b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner if (!Stubs.empty()) { 533ff4bc460c52c1f285d8a56da173641bf92d49e3fChris Lattner // Switch with ".non_lazy_symbol_pointer" directive. 5346c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 535c076a9793936b140364671a5e39ee53bd266c6c3Chris Lattner EmitAlignment(2); 536b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 537becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // L_foo$stub: 538becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.EmitLabel(Stubs[i].first); 539becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // .indirect_symbol _foo 54052a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 54152a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol); 542cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 54352a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling if (MCSym.getInt()) 544cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling // External to current translation unit. 545cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); 546cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling else 547cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling // Internal to current translation unit. 5485e1b55d67288874f8669621b9176814ce449f8f5Bill Wendling // 5491b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // When we place the LSDA into the TEXT section, the type info 5501b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // pointers need to be indirect and pc-rel. We accomplish this by 5511b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // using NLPs; however, sometimes the types are local to the file. 5521b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // We need to fill in the value for the NLP in those cases. 55352a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(), 55452a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutContext), 555cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 4/*size*/, 0/*addrspace*/); 556ae94e594164b193236002516970aeec4c4574768Evan Cheng } 557becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling 558becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling Stubs.clear(); 559becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.AddBlankLine(); 560a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 561a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 562e4d9ea83c0d4bcc535bd978e1afa599eb3ebb893Chris Lattner Stubs = MMIMacho.GetHiddenGVStubList(); 563e4d9ea83c0d4bcc535bd978e1afa599eb3ebb893Chris Lattner if (!Stubs.empty()) { 5646c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner OutStreamer.SwitchSection(getObjFileLowering().getDataSection()); 565f3231de60bb64c3f6fc6770b3e6174f4f839a4f3Chris Lattner EmitAlignment(2); 566becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 567becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // L_foo$stub: 568becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.EmitLabel(Stubs[i].first); 569becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // .long _foo 570cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling OutStreamer.EmitValue(MCSymbolRefExpr:: 571cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling Create(Stubs[i].second.getPointer(), 572cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling OutContext), 573becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling 4/*size*/, 0/*addrspace*/); 574becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling } 575cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 576cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling Stubs.clear(); 577cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling OutStreamer.AddBlankLine(); 578ae94e594164b193236002516970aeec4c4574768Evan Cheng } 579ae94e594164b193236002516970aeec4c4574768Evan Cheng 580a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Funny Darwin hack: This flag tells the linker that no global symbols 581a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // contain code that falls through to other global symbols (e.g. the obvious 582a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // implementation of multiple entry points). If this doesn't occur, the 583a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // linker can safely perform dead code stripping. Since LLVM never 584a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // generates code that does this, it is always safe to set. 585a5ad93a10a5435f21090b09edb6b3a7e44967648Chris Lattner OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 586b01c4bbb4573e0007444e218b683840e4519e0c8Rafael Espindola } 5877bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 5880bd89712c03c59ea43ce37763685e7f7c0bdd977Anton Korobeynikov 58997f06937449c593a248dbbb1365e6ae408fb9decChris Lattner//===----------------------------------------------------------------------===// 590def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// Helper routines for EmitStartOfAsmFile() and EmitEndOfAsmFile() 591def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// FIXME: 592def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// The following seem like one-off assembler flags, but they actually need 593fa7fb64fad0e46e7329e4ba84a1edec5e979c31aJim Grosbach// to appear in the .ARM.attributes section in ELF. 594def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// Instead of subclassing the MCELFStreamer, we do the work here. 595def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 596def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kimvoid ARMAsmPrinter::emitAttributes() { 597fa7fb64fad0e46e7329e4ba84a1edec5e979c31aJim Grosbach 59817b443df4368acfad853d09858c033c45c468d5cJason W Kim emitARMAttributeSection(); 59917b443df4368acfad853d09858c033c45c468d5cJason W Kim 600728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* GAS expect .fpu to be emitted, regardless of VFP build attribute */ 601728ff0db783152ed4f21f7746bd7874b49708172Renato Golin bool emitFPU = false; 602cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttributeEmitter *AttrEmitter; 603728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (OutStreamer.hasRawTextSupport()) { 604cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter = new AsmAttributeEmitter(OutStreamer); 605728ff0db783152ed4f21f7746bd7874b49708172Renato Golin emitFPU = true; 606728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } else { 607cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCObjectStreamer &O = static_cast<MCObjectStreamer&>(OutStreamer); 608cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter = new ObjectAttributeEmitter(O); 609cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 610cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 611cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->MaybeSwitchVendor("aeabi"); 612cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 613def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim std::string CPUString = Subtarget->getCPUString(); 614f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 615f009a961caa75465999ef3bc764984d97a7da331Jason W Kim if (CPUString == "cortex-a8" || 616f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Subtarget->isCortexA8()) { 617c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "cortex-a8"); 618f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7); 619f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile, 620f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::ApplicationProfile); 621f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 622f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 623f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 624f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowThumb32); 625f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // Fixme: figure out when this is emitted. 626f009a961caa75465999ef3bc764984d97a7da331Jason W Kim //AttrEmitter->EmitAttribute(ARMBuildAttrs::WMMX_arch, 627f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // ARMBuildAttrs::AllowWMMXv1); 628f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // 629f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 630f009a961caa75465999ef3bc764984d97a7da331Jason W Kim /// ADD additional Else-cases here! 631b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola } else if (CPUString == "xscale") { 632b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v5TEJ); 633b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 634b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola ARMBuildAttrs::Allowed); 635b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 636b8adb8af0fa9d1405fcf2edb95f4b1b8d1904716Rafael Espindola ARMBuildAttrs::Allowed); 637f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } else if (CPUString == "generic") { 6387179d1e5c0acfbb0980eaf85f266cd8981dbd12dDale Johannesen // FIXME: Why these defaults? 6397179d1e5c0acfbb0980eaf85f266cd8981dbd12dDale Johannesen AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T); 640f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 641f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 642f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 643f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 644cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 645def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 646e89a05337a9946040251a5f19165c41b9a1a7b27Renato Golin if (Subtarget->hasNEON() && emitFPU) { 647728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* NEON is not exactly a VFP architecture, but GAS emit one of 648728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * neon/vfpv3/vfpv2 for .fpu parameters */ 649728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::Advanced_SIMD_arch, "neon"); 650728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* If emitted for NEON, omit from VFP below, since you can have both 651728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * NEON and VFP in build attributes but only one .fpu */ 652728ff0db783152ed4f21f7746bd7874b49708172Renato Golin emitFPU = false; 653728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 654728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 655728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* VFPv3 + .fpu */ 656728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (Subtarget->hasVFP3()) { 657728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 658728ff0db783152ed4f21f7746bd7874b49708172Renato Golin ARMBuildAttrs::AllowFPv3A); 659728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (emitFPU) 660728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "vfpv3"); 661728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 662728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* VFPv2 + .fpu */ 663728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } else if (Subtarget->hasVFP2()) { 664f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 665f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowFPv2); 666728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (emitFPU) 667728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "vfpv2"); 668728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 669728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 670728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* TODO: ARMBuildAttrs::Allowed is not completely accurate, 671728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * since NEON can have 1 (allowed) or 2 (fused MAC operations) */ 672728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (Subtarget->hasNEON()) { 673728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitAttribute(ARMBuildAttrs::Advanced_SIMD_arch, 674728ff0db783152ed4f21f7746bd7874b49708172Renato Golin ARMBuildAttrs::Allowed); 675728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 676def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 677def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // Signal various FP modes. 678def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (!UnsafeFPMath) { 679f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 680f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 681f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 682f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 683def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim } 684def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 685def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (NoInfsFPMath && NoNaNsFPMath) 686f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 687f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 688def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim else 689f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 690f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowIEE754); 691def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 692f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // FIXME: add more flags to ARMBuildAttrs.h 693def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // 8-bytes alignment stuff. 694cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1); 695cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1); 696def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 697def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // Hard float. Use both S and D registers and conform to AAPCS-VFP. 698def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) { 699cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_HardFP_use, 3); 700cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_VFP_args, 1); 701def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim } 702def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // FIXME: Should we signal R9 usage? 703cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 704f009a961caa75465999ef3bc764984d97a7da331Jason W Kim if (Subtarget->hasDivide()) 705f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1); 706cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 707cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->Finish(); 708cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola delete AttrEmitter; 709def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim} 710def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 71117b443df4368acfad853d09858c033c45c468d5cJason W Kimvoid ARMAsmPrinter::emitARMAttributeSection() { 71217b443df4368acfad853d09858c033c45c468d5cJason W Kim // <format-version> 71317b443df4368acfad853d09858c033c45c468d5cJason W Kim // [ <section-length> "vendor-name" 71417b443df4368acfad853d09858c033c45c468d5cJason W Kim // [ <file-tag> <size> <attribute>* 71517b443df4368acfad853d09858c033c45c468d5cJason W Kim // | <section-tag> <size> <section-number>* 0 <attribute>* 71617b443df4368acfad853d09858c033c45c468d5cJason W Kim // | <symbol-tag> <size> <symbol-number>* 0 <attribute>* 71717b443df4368acfad853d09858c033c45c468d5cJason W Kim // ]+ 71817b443df4368acfad853d09858c033c45c468d5cJason W Kim // ]* 71917b443df4368acfad853d09858c033c45c468d5cJason W Kim 72017b443df4368acfad853d09858c033c45c468d5cJason W Kim if (OutStreamer.hasRawTextSupport()) 72117b443df4368acfad853d09858c033c45c468d5cJason W Kim return; 72217b443df4368acfad853d09858c033c45c468d5cJason W Kim 72317b443df4368acfad853d09858c033c45c468d5cJason W Kim const ARMElfTargetObjectFile &TLOFELF = 72417b443df4368acfad853d09858c033c45c468d5cJason W Kim static_cast<const ARMElfTargetObjectFile &> 72517b443df4368acfad853d09858c033c45c468d5cJason W Kim (getObjFileLowering()); 72617b443df4368acfad853d09858c033c45c468d5cJason W Kim 72717b443df4368acfad853d09858c033c45c468d5cJason W Kim OutStreamer.SwitchSection(TLOFELF.getAttributesSection()); 728def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 729cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // Format version 730cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola OutStreamer.EmitIntValue(0x41, 1); 73117b443df4368acfad853d09858c033c45c468d5cJason W Kim} 73217b443df4368acfad853d09858c033c45c468d5cJason W Kim 733def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim//===----------------------------------------------------------------------===// 73497f06937449c593a248dbbb1365e6ae408fb9decChris Lattner 735988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbachstatic MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber, 736988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach unsigned LabelId, MCContext &Ctx) { 737988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach 738988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach MCSymbol *Label = Ctx.GetOrCreateSymbol(Twine(Prefix) 739988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId)); 740988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach return Label; 741988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach} 742988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach 7432c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbachstatic MCSymbolRefExpr::VariantKind 7442c4d5125c708bb35140fc2a40b02beb1add101dbJim GrosbachgetModifierVariantKind(ARMCP::ARMCPModifier Modifier) { 7452c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach switch (Modifier) { 7462c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach default: llvm_unreachable("Unknown modifier!"); 7472c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::no_modifier: return MCSymbolRefExpr::VK_None; 7482c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::TLSGD: return MCSymbolRefExpr::VK_ARM_TLSGD; 7492c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::TPOFF: return MCSymbolRefExpr::VK_ARM_TPOFF; 7502c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOTTPOFF: return MCSymbolRefExpr::VK_ARM_GOTTPOFF; 7512c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOT: return MCSymbolRefExpr::VK_ARM_GOT; 7522c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOTOFF: return MCSymbolRefExpr::VK_ARM_GOTOFF; 7532c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach } 7542c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach return MCSymbolRefExpr::VK_None; 7552c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach} 7562c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach 7575de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan ChengMCSymbol *ARMAsmPrinter::GetARMGVSymbol(const GlobalValue *GV) { 7585de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng bool isIndirect = Subtarget->isTargetDarwin() && 7595de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel()); 7605de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng if (!isIndirect) 7615de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return Mang->getSymbol(GV); 7625de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 7635de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // FIXME: Remove this when Darwin transition to @GOT like syntax. 7645de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *MCSym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 7655de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MachineModuleInfoMachO &MMIMachO = 7665de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MMI->getObjFileInfo<MachineModuleInfoMachO>(); 7675de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MachineModuleInfoImpl::StubValueTy &StubSym = 7685de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(MCSym) : 7695de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MMIMachO.getGVStubEntry(MCSym); 7705de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng if (StubSym.getPointer() == 0) 7715de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng StubSym = MachineModuleInfoImpl:: 7725de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); 7735de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return MCSym; 7745de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng} 7755de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 7765df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbachvoid ARMAsmPrinter:: 7775df08d8f55f47aafc671c358d971dbcc10dfdeefJim GrosbachEmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { 7785df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach int Size = TM.getTargetData()->getTypeAllocSize(MCPV->getType()); 7795df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7805df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV); 7815df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7827c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSymbol *MCSym; 7835df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach if (ACPV->isLSDA()) { 7847c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach SmallString<128> Str; 7857c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach raw_svector_ostream OS(Str); 7865df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach OS << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber(); 7877c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = OutContext.GetOrCreateSymbol(OS.str()); 7885df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else if (ACPV->isBlockAddress()) { 7897c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = GetBlockAddressSymbol(ACPV->getBlockAddress()); 7905df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else if (ACPV->isGlobalValue()) { 7915df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach const GlobalValue *GV = ACPV->getGV(); 7925de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSym = GetARMGVSymbol(GV); 7935df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else { 7945df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach assert(ACPV->isExtSymbol() && "unrecognized constant pool value"); 7957c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = GetExternalSymbolSymbol(ACPV->getSymbol()); 7965df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 7975df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7985df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach // Create an MCSymbol for the reference. 7992c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *Expr = 8002c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbolRefExpr::Create(MCSym, getModifierVariantKind(ACPV->getModifier()), 8012c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 8022c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach 8032c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach if (ACPV->getPCAdjustment()) { 8042c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbol *PCLabel = getPICLabel(MAI->getPrivateGlobalPrefix(), 8052c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach getFunctionNumber(), 8062c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach ACPV->getLabelId(), 8072c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 8082c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *PCRelExpr = MCSymbolRefExpr::Create(PCLabel, OutContext); 8092c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach PCRelExpr = 8102c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCBinaryExpr::CreateAdd(PCRelExpr, 8112c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCConstantExpr::Create(ACPV->getPCAdjustment(), 8122c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext), 8132c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 8142c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach if (ACPV->mustAddCurrentAddress()) { 8152c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach // We want "(<expr> - .)", but MC doesn't have a concept of the '.' 8162c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach // label, so just emit a local label end reference that instead. 8172c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbol *DotSym = OutContext.CreateTempSymbol(); 8182c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutStreamer.EmitLabel(DotSym); 8192c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *DotExpr = MCSymbolRefExpr::Create(DotSym, OutContext); 8202c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach PCRelExpr = MCBinaryExpr::CreateSub(PCRelExpr, DotExpr, OutContext); 8215df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 8222c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach Expr = MCBinaryExpr::CreateSub(Expr, PCRelExpr, OutContext); 8235df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 8242c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutStreamer.EmitValue(Expr, Size); 8255df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach} 8265df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 827a2244cb38781e596110023399c7902b5ee5087feJim Grosbachvoid ARMAsmPrinter::EmitJumpTable(const MachineInstr *MI) { 828a2244cb38781e596110023399c7902b5ee5087feJim Grosbach unsigned Opcode = MI->getOpcode(); 829a2244cb38781e596110023399c7902b5ee5087feJim Grosbach int OpNum = 1; 830a2244cb38781e596110023399c7902b5ee5087feJim Grosbach if (Opcode == ARM::BR_JTadd) 831a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OpNum = 2; 832a2244cb38781e596110023399c7902b5ee5087feJim Grosbach else if (Opcode == ARM::BR_JTm) 833a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OpNum = 3; 834a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 835a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineOperand &MO1 = MI->getOperand(OpNum); 836a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id 837a2244cb38781e596110023399c7902b5ee5087feJim Grosbach unsigned JTI = MO1.getIndex(); 838a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 839a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Emit a label for the jump table. 840a2244cb38781e596110023399c7902b5ee5087feJim Grosbach MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 841a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutStreamer.EmitLabel(JTISymbol); 842a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 843a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Emit each entry of the table. 844a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); 845a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); 846a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; 847a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 848a2244cb38781e596110023399c7902b5ee5087feJim Grosbach for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { 849a2244cb38781e596110023399c7902b5ee5087feJim Grosbach MachineBasicBlock *MBB = JTBBs[i]; 850a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Construct an MCExpr for the entry. We want a value of the form: 851a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // (BasicBlockAddr - TableBeginAddr) 852a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // 853a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // For example, a table with entries jumping to basic blocks BB0 and BB1 854a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // would look like: 855a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // LJTI_0_0: 856a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // .word (LBB0 - LJTI_0_0) 857a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // .word (LBB1 - LJTI_0_0) 858a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MCExpr *Expr = MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext); 859a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 860a2244cb38781e596110023399c7902b5ee5087feJim Grosbach if (TM.getRelocationModel() == Reloc::PIC_) 861a2244cb38781e596110023399c7902b5ee5087feJim Grosbach Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(JTISymbol, 862a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutContext), 863a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutContext); 864a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutStreamer.EmitValue(Expr, 4); 865a2244cb38781e596110023399c7902b5ee5087feJim Grosbach } 866a2244cb38781e596110023399c7902b5ee5087feJim Grosbach} 867a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 868882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbachvoid ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) { 869882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach unsigned Opcode = MI->getOpcode(); 870882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; 871882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineOperand &MO1 = MI->getOperand(OpNum); 872882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id 873882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach unsigned JTI = MO1.getIndex(); 874882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 875882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Emit a label for the jump table. 876882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 877882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitLabel(JTISymbol); 878882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 879882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Emit each entry of the table. 880882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); 881882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); 882882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; 883205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach unsigned OffsetWidth = 4; 884d092a87ba3f905a6801a0bdf816267329cf0391cJim Grosbach if (MI->getOpcode() == ARM::t2TBB_JT) 885205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OffsetWidth = 1; 886d092a87ba3f905a6801a0bdf816267329cf0391cJim Grosbach else if (MI->getOpcode() == ARM::t2TBH_JT) 887205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OffsetWidth = 2; 888882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 889882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { 890882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MachineBasicBlock *MBB = JTBBs[i]; 891205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::Create(MBB->getSymbol(), 892205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 893882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // If this isn't a TBB or TBH, the entries are direct branch instructions. 894205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach if (OffsetWidth == 4) { 895882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCInst BrInst; 896882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach BrInst.setOpcode(ARM::t2B); 897205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr)); 898882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitInstruction(BrInst); 899882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach continue; 900882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 901882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Otherwise it's an offset from the dispatch instruction. Construct an 902205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // MCExpr for the entry. We want a value of the form: 903205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // (BasicBlockAddr - TableBeginAddr) / 2 904205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // 905205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // For example, a TBB table with entries jumping to basic blocks BB0 and BB1 906205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // would look like: 907205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // LJTI_0_0: 908205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // .byte (LBB0 - LJTI_0_0) / 2 909205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // .byte (LBB1 - LJTI_0_0) / 2 910205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach const MCExpr *Expr = 911205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach MCBinaryExpr::CreateSub(MBBSymbolExpr, 912205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach MCSymbolRefExpr::Create(JTISymbol, OutContext), 913205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 914205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach Expr = MCBinaryExpr::CreateDiv(Expr, MCConstantExpr::Create(2, OutContext), 915205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 916205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutStreamer.EmitValue(Expr, OffsetWidth); 917882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 918882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach} 919882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 9202d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbachvoid ARMAsmPrinter::PrintDebugValueComment(const MachineInstr *MI, 9212d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach raw_ostream &OS) { 9222d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach unsigned NOps = MI->getNumOperands(); 9232d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach assert(NOps==4); 9242d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; 9252d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach // cast away const; DIetc do not take const operands for some reason. 9262d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata())); 9272d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << V.getName(); 9282d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << " <- "; 9292d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach // Frame address. Currently handles register +- offset only. 9302d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm()); 9312d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS); 9322d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << ']'; 9332d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << "+"; 9342d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach printOperand(MI, NOps-2, OS); 9352d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach} 9362d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach 93740edf73a62bf025eba4391e806fb1ddada662355Jim Grosbachstatic void populateADROperands(MCInst &Inst, unsigned Dest, 93840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach const MCSymbol *Label, 93940edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach unsigned pred, unsigned ccreg, 94040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MCContext &Ctx) { 94140edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, Ctx); 94240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateReg(Dest)); 94340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateExpr(SymbolExpr)); 94440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach // Add predicate operands. 94540edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateImm(pred)); 94640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateReg(ccreg)); 94740edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach} 94840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach 9494d7286083537833880901953d29786cf831affc4Anton Korobeynikovvoid ARMAsmPrinter::EmitPatchedInstruction(const MachineInstr *MI, 9504d7286083537833880901953d29786cf831affc4Anton Korobeynikov unsigned Opcode) { 9514d7286083537833880901953d29786cf831affc4Anton Korobeynikov MCInst TmpInst; 9524d7286083537833880901953d29786cf831affc4Anton Korobeynikov 9534d7286083537833880901953d29786cf831affc4Anton Korobeynikov // Emit the instruction as usual, just patch the opcode. 9544d7286083537833880901953d29786cf831affc4Anton Korobeynikov LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 9554d7286083537833880901953d29786cf831affc4Anton Korobeynikov TmpInst.setOpcode(Opcode); 9564d7286083537833880901953d29786cf831affc4Anton Korobeynikov OutStreamer.EmitInstruction(TmpInst); 9574d7286083537833880901953d29786cf831affc4Anton Korobeynikov} 9584d7286083537833880901953d29786cf831affc4Anton Korobeynikov 95957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikovvoid ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) { 96057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(MI->getFlag(MachineInstr::FrameSetup) && 96157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only instruction which are involved into frame setup code are allowed"); 96257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 96357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov const MachineFunction &MF = *MI->getParent()->getParent(); 96457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 965b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const ARMFunctionInfo &AFI = *MF.getInfo<ARMFunctionInfo>(); 96657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 96757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov unsigned FramePtr = RegInfo->getFrameRegister(MF); 96857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov unsigned Opc = MI->getOpcode(); 9697a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned SrcReg, DstReg; 9707a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov 9713daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov if (Opc == ARM::tPUSH || Opc == ARM::tLDRpci) { 9723daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // Two special cases: 9733daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // 1) tPUSH does not have src/dst regs. 9743daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // 2) for Thumb1 code we sometimes materialize the constant via constpool 9753daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // load. Yes, this is pretty fragile, but for now I don't see better 9763daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // way... :( 9777a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov SrcReg = DstReg = ARM::SP; 9787a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov } else { 9793daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov SrcReg = MI->getOperand(1).getReg(); 9807a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov DstReg = MI->getOperand(0).getReg(); 9817a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov } 98257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 98357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Try to figure out the unwinding opcode out of src / dst regs. 98457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (MI->getDesc().mayStore()) { 98557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Register saves. 98657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(DstReg == ARM::SP && 98757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a destination reg is supported"); 98857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 98957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov SmallVector<unsigned, 4> RegList; 9907a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Skip src & dst reg, and pred ops. 9917a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned StartOp = 2 + 2; 9927a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Use all the operands. 9937a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned NumOffset = 0; 9947a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov 99557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov switch (Opc) { 99657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov default: 99757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 99857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 9997a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tPUSH: 10007a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Special case here: no src & dst reg, but two extra imp ops. 10017a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov StartOp = 2; NumOffset = 2; 100257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::STMDB_UPD: 10037a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::t2STMDB_UPD: 100457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::VSTMDDB_UPD: 100557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(SrcReg == ARM::SP && 100657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a source reg is supported"); 10077a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; 10087a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov i != NumOps; ++i) 100957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov RegList.push_back(MI->getOperand(i).getReg()); 101057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 101157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::STR_PRE: 101257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(MI->getOperand(2).getReg() == ARM::SP && 101357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a source reg is supported"); 101457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov RegList.push_back(SrcReg); 101557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 101657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 101757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov OutStreamer.EmitRegSave(RegList, Opc == ARM::VSTMDDB_UPD); 101857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else { 101957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Changes of stack / frame pointer. 102057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (SrcReg == ARM::SP) { 102157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov int64_t Offset = 0; 102257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov switch (Opc) { 102357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov default: 102457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 102557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 102657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::MOVr: 10277a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tMOVgpr2gpr: 10283daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov case ARM::tMOVgpr2tgpr: 102957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = 0; 103057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 103157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::ADDri: 103257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = -MI->getOperand(2).getImm(); 103357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 103457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::SUBri: 10357a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::t2SUBrSPi: 103657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = MI->getOperand(2).getImm(); 103757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 10387a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tSUBspi: 10397a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov Offset = MI->getOperand(2).getImm()*4; 10407a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov break; 10417a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tADDspi: 10427a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tADDrSPi: 10437a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov Offset = -MI->getOperand(2).getImm()*4; 10447a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov break; 1045b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov case ARM::tLDRpci: { 1046b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // Grab the constpool index and check, whether it corresponds to 1047b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // original or cloned constpool entry. 1048b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov unsigned CPI = MI->getOperand(1).getIndex(); 1049b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const MachineConstantPool *MCP = MF.getConstantPool(); 1050b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov if (CPI >= MCP->getConstants().size()) 1051b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov CPI = AFI.getOriginalCPIdx(CPI); 1052b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov assert(CPI != -1U && "Invalid constpool index"); 1053b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov 1054b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // Derive the actual offset. 1055b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const MachineConstantPoolEntry &CPE = MCP->getConstants()[CPI]; 1056b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov assert(!CPE.isMachineConstantPoolEntry() && "Invalid constpool entry"); 1057b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // FIXME: Check for user, it should be "add" instruction! 1058b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov Offset = -cast<ConstantInt>(CPE.Val.ConstVal)->getSExtValue(); 10593daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov break; 106057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 1061b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov } 106257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 106357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (DstReg == FramePtr && FramePtr != ARM::SP) 1064e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // Set-up of the frame pointer. Positive values correspond to "add" 1065e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // instruction. 1066e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov OutStreamer.EmitSetFP(FramePtr, ARM::SP, -Offset); 106757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov else if (DstReg == ARM::SP) { 1068e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // Change of SP by an offset. Positive values correspond to "sub" 106957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // instruction. 107057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov OutStreamer.EmitPad(Offset); 107157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else { 107257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 107357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 107457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 107557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else if (DstReg == ARM::SP) { 107657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // FIXME: .movsp goes here 107757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 107857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 107957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 108057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov else { 108157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 108257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 108357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 108457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 108557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov} 108657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 108757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikovextern cl::opt<bool> EnableARMEHABI; 108857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 1089b454cdaebc6e4543099955ce043258c3903b1a0eJim Grosbachvoid ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { 10905de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng unsigned Opc = MI->getOpcode(); 10915de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng switch (Opc) { 10924d1522234192704f45dfd2527c2913fa60be616eChris Lattner default: break; 109372422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach case ARM::B: { 109472422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach // B is just a Bcc with an 'always' predicate. 109572422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach MCInst TmpInst; 109672422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 109772422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.setOpcode(ARM::Bcc); 109872422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach // Add predicate operands. 109972422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 110072422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 110172422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 110272422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach return; 110372422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach } 1104dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach case ARM::LDMIA_RET: { 1105dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // LDMIA_RET is just a normal LDMIA_UPD instruction that targets PC and as 1106dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // such has additional code-gen properties and scheduling information. 1107dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // To emit it, we just construct as normal and set the opcode to LDMIA_UPD. 1108dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach MCInst TmpInst; 1109dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 1110dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach TmpInst.setOpcode(ARM::LDMIA_UPD); 1111dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1112dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach return; 1113dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach } 11149702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2ADDrSPi: 11159702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2ADDrSPi12: 11169702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2SUBrSPi: 11179702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2SUBrSPi12: 1118766a63d20e89ad5a8b19aba2df0128c1f73174b3Jim Grosbach assert ((MI->getOperand(1).getReg() == ARM::SP) && 1119766a63d20e89ad5a8b19aba2df0128c1f73174b3Jim Grosbach "Unexpected source register!"); 11209702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach break; 11219702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach 1122112f2390e19774a54c2dd50391b99fb617da0973Chris Lattner case ARM::t2MOVi32imm: assert(0 && "Should be lowered by thumb2it pass"); 11232d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach case ARM::DBG_VALUE: { 11242d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach if (isVerbose() && OutStreamer.hasRawTextSupport()) { 11252d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach SmallString<128> TmpStr; 11262d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach raw_svector_ostream OS(TmpStr); 11272d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach PrintDebugValueComment(MI, OS); 11282d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OutStreamer.EmitRawText(StringRef(OS.str())); 11292d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach } 11302d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach return; 11312d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach } 11323efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach case ARM::tBfar: { 11333efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach MCInst TmpInst; 11343efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach TmpInst.setOpcode(ARM::tBL); 11353efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create( 11363efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach MI->getOperand(0).getMBB()->getSymbol(), OutContext))); 11373efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11383efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach return; 11393efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach } 114040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach case ARM::LEApcrel: 1141d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::tLEApcrel: 114240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach case ARM::t2LEApcrel: { 1143dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach // FIXME: Need to also handle globals and externals 1144dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach MCInst TmpInst; 1145d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrel ? ARM::t2ADR 1146d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : (MI->getOpcode() == ARM::tLEApcrel ? ARM::tADR 1147d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : ARM::ADR)); 114840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach populateADROperands(TmpInst, MI->getOperand(0).getReg(), 114940edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach GetCPISymbol(MI->getOperand(1).getIndex()), 115040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(2).getImm(), MI->getOperand(3).getReg(), 115140edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach OutContext); 1152dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1153dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach return; 1154dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach } 1155d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::LEApcrelJT: 1156d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::tLEApcrelJT: 1157d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::t2LEApcrelJT: { 11585d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach MCInst TmpInst; 1159d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrelJT ? ARM::t2ADR 1160d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : (MI->getOpcode() == ARM::tLEApcrelJT ? ARM::tADR 1161d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : ARM::ADR)); 116240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach populateADROperands(TmpInst, MI->getOperand(0).getReg(), 116340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach GetARMJTIPICJumpTableLabel2(MI->getOperand(1).getIndex(), 116440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(2).getImm()), 116540edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(3).getImm(), MI->getOperand(4).getReg(), 116640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach OutContext); 11675d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11685d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach return; 11695d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach } 11702e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach case ARM::MOVPCRX: { 11712e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach MCInst TmpInst; 11722e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 11732e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 11742e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 11752e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach // Add predicate operands. 11762e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 11772e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 11782e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach // Add 's' bit operand (always reg0 for this) 11792e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 11802e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1181f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach return; 1182f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach } 1183f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach // Darwin call instructions are just normal call instructions with different 1184f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach // clobber semantics (they clobber R9). 1185f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9: 1186f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9_pred: 1187f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9: 1188f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9_pred: { 1189f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach unsigned newOpc; 1190f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach switch (Opc) { 1191f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach default: assert(0); 1192f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9: newOpc = ARM::BL; break; 1193f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9_pred: newOpc = ARM::BL_pred; break; 1194f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9: newOpc = ARM::BLX; break; 1195f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9_pred: newOpc = ARM::BLX_pred; break; 1196f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach } 1197f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach MCInst TmpInst; 1198f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 1199f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach TmpInst.setOpcode(newOpc); 1200f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach OutStreamer.EmitInstruction(TmpInst); 12012e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach return; 12022e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach } 1203a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BXr9_CALL: 1204a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BX_CALL: { 1205a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1206a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1207a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1208a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1209a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1210a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1211a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1212a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1213a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1214a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1215a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1216a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1217a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1218a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1219a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::BX); 1220a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1221a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1222a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1223a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach return; 1224a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1225ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich case ARM::tBXr9_CALL: 1226ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich case ARM::tBX_CALL: { 1227ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich { 1228ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich MCInst TmpInst; 1229ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.setOpcode(ARM::tMOVr); 1230ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1231ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1232ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich OutStreamer.EmitInstruction(TmpInst); 1233ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich } 1234ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich { 1235ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich MCInst TmpInst; 1236ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.setOpcode(ARM::tBX); 1237ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1238ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich // Add predicate operands. 1239ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1240ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich TmpInst.addOperand(MCOperand::CreateReg(0)); 1241ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich OutStreamer.EmitInstruction(TmpInst); 1242ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich } 1243ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich return; 1244ad70f6d2b1eacdc2c85e7cfec24e4c470325ef4eCameron Zwarich } 1245a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BMOVPCRXr9_CALL: 1246a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BMOVPCRX_CALL: { 1247a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1248a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1249a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1250a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1251a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1252a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1253a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1254a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1255a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1256a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1257a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1258a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1259a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1260a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1261a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1262a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1263a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1264a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1265a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1266a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1267a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1268a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1269a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1270a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1271a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach return; 1272a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 127353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOVi16_ga_pcrel: 127453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOVi16_ga_pcrel: { 12755de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCInst TmpInst; 127653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); 12775de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 12785de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 127953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned TF = MI->getOperand(1).getTargetFlags(); 128053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = TF == ARMII::MO_LO16_NONLAZY_PIC; 12815de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const GlobalValue *GV = MI->getOperand(1).getGlobal(); 12825de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *GVSym = GetARMGVSymbol(GV); 12835de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext); 128453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (isPIC) { 128553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(), 128653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng getFunctionNumber(), 128753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI->getOperand(2).getImm(), OutContext); 128853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext); 128953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4; 129053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *PCRelExpr = 129153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ARMMCExpr::CreateLower16(MCBinaryExpr::CreateSub(GVSymExpr, 129253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCBinaryExpr::CreateAdd(LabelSymExpr, 129353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCConstantExpr::Create(PCAdj, OutContext), 12945de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutContext), OutContext), OutContext); 129553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); 129653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } else { 129753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *RefExpr= ARMMCExpr::CreateLower16(GVSymExpr, OutContext); 129853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); 129953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 130053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 13015de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add predicate operands. 13025de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 13035de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13045de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add 's' bit operand (always reg0 for this) 13055de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13065de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutStreamer.EmitInstruction(TmpInst); 13075de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return; 13085de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 130953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOVTi16_ga_pcrel: 131053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOVTi16_ga_pcrel: { 13115de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCInst TmpInst; 131253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel 131353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARM::MOVTi16 : ARM::t2MOVTi16); 13145de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 13155de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 13165de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 131753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned TF = MI->getOperand(2).getTargetFlags(); 131853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = TF == ARMII::MO_HI16_NONLAZY_PIC; 13195de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const GlobalValue *GV = MI->getOperand(2).getGlobal(); 13205de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *GVSym = GetARMGVSymbol(GV); 13215de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext); 132253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (isPIC) { 132353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(), 132453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng getFunctionNumber(), 132553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI->getOperand(3).getImm(), OutContext); 132653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext); 132753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4; 132853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *PCRelExpr = 132953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ARMMCExpr::CreateUpper16(MCBinaryExpr::CreateSub(GVSymExpr, 133053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCBinaryExpr::CreateAdd(LabelSymExpr, 133153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCConstantExpr::Create(PCAdj, OutContext), 13325de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutContext), OutContext), OutContext); 133353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); 133453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } else { 133553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *RefExpr= ARMMCExpr::CreateUpper16(GVSymExpr, OutContext); 133653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); 133753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 13385de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add predicate operands. 13395de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 13405de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13415de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add 's' bit operand (always reg0 for this) 13425de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 13435de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutStreamer.EmitInstruction(TmpInst); 13445de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return; 13455de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 1346fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach case ARM::tPICADD: { 1347fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // This is a pseudo op for a label + instruction sequence, which looks like: 1348fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // LPC0: 1349fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // add r0, pc 1350fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // This adds the address of LPC0 to r0. 1351fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach 1352fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Emit the label. 1353988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1354988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1355988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1356fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach 1357fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Form and emit the add. 1358fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach MCInst AddInst; 1359fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.setOpcode(ARM::tADDhirr); 1360fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1361fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1362fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1363fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Add predicate operands. 1364fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1365fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(0)); 1366fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach OutStreamer.EmitInstruction(AddInst); 1367fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach return; 1368fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach } 1369a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::PICADD: { 13704d1522234192704f45dfd2527c2913fa60be616eChris Lattner // This is a pseudo op for a label + instruction sequence, which looks like: 13714d1522234192704f45dfd2527c2913fa60be616eChris Lattner // LPC0: 13724d1522234192704f45dfd2527c2913fa60be616eChris Lattner // add r0, pc, r0 13734d1522234192704f45dfd2527c2913fa60be616eChris Lattner // This adds the address of LPC0 to r0. 1374b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 13754d1522234192704f45dfd2527c2913fa60be616eChris Lattner // Emit the label. 1376988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1377988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1378988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1379b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 1380f3f09527e6484143fcdef2ddfef0b2f016881e36Jim Grosbach // Form and emit the add. 13814d1522234192704f45dfd2527c2913fa60be616eChris Lattner MCInst AddInst; 13824d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.setOpcode(ARM::ADDrr); 13834d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 13844d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); 13854d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 13865b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach // Add predicate operands. 13875b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); 13885b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); 13895b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach // Add 's' bit operand (always reg0 for this) 13905b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(0)); 1391850d2e2a1b58ea30abed10ca955259d60d07d97aChris Lattner OutStreamer.EmitInstruction(AddInst); 13924d1522234192704f45dfd2527c2913fa60be616eChris Lattner return; 1393b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach } 1394a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTR: 1395a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRB: 1396a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRH: 1397a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDR: 1398a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRB: 1399a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRH: 1400a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSB: 1401a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSH: { 1402b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // This is a pseudo op for a label + instruction sequence, which looks like: 1403b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // LPC0: 1404a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach // OP r0, [pc, r0] 1405b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // The LCP0 label is referenced by a constant pool entry in order to get 1406b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // a PC-relative address at the ldr instruction. 1407b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1408b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Emit the label. 1409988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1410988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1411988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1412b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1413b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Form and emit the load 1414a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach unsigned Opcode; 1415a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach switch (MI->getOpcode()) { 1416a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach default: 1417a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach llvm_unreachable("Unexpected opcode!"); 14187e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach case ARM::PICSTR: Opcode = ARM::STRrs; break; 14197e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach case ARM::PICSTRB: Opcode = ARM::STRBrs; break; 1420a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRH: Opcode = ARM::STRH; break; 14213e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach case ARM::PICLDR: Opcode = ARM::LDRrs; break; 1422c1d30212e911d1e55ff6b25bffefb503708883c3Jim Grosbach case ARM::PICLDRB: Opcode = ARM::LDRBrs; break; 1423a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRH: Opcode = ARM::LDRH; break; 1424a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSB: Opcode = ARM::LDRSB; break; 1425a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSH: Opcode = ARM::LDRSH; break; 1426a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach } 1427a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach MCInst LdStInst; 1428a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.setOpcode(Opcode); 1429a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1430a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1431a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 1432a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateImm(0)); 1433b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Add predicate operands. 1434a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); 1435a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); 1436a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach OutStreamer.EmitInstruction(LdStInst); 1437b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1438b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach return; 14394d1522234192704f45dfd2527c2913fa60be616eChris Lattner } 1440a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::CONSTPOOL_ENTRY: { 1441a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool 1442a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// in the function. The first operand is the ID# for this instruction, the 1443a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// second is the index into the MachineConstantPool that this is, the third 1444a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// is the size in bytes of this constant pool entry. 1445a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner unsigned LabelId = (unsigned)MI->getOperand(0).getImm(); 1446a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex(); 1447a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner 1448a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitAlignment(2); 14491b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner OutStreamer.EmitLabel(GetCPISymbol(LabelId)); 1450a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner 1451a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx]; 1452a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner if (MCPE.isMachineConstantPoolEntry()) 1453a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal); 1454a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner else 1455a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitGlobalConstant(MCPE.Val.ConstVal); 1456b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 1457a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner return; 1458a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner } 1459882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach case ARM::t2BR_JT: { 1460882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 1461882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCInst TmpInst; 14625ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::tMOVgpr2gpr); 14635ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14645ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14655ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14665ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14675ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14685ca66696e734f963b613de51e3df3684395daf1cJim Grosbach OutStreamer.EmitInstruction(TmpInst); 14695ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 14705ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitJump2Table(MI); 14715ca66696e734f963b613de51e3df3684395daf1cJim Grosbach return; 14725ca66696e734f963b613de51e3df3684395daf1cJim Grosbach } 14735ca66696e734f963b613de51e3df3684395daf1cJim Grosbach case ARM::t2TBB_JT: { 14745ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14755ca66696e734f963b613de51e3df3684395daf1cJim Grosbach MCInst TmpInst; 14765ca66696e734f963b613de51e3df3684395daf1cJim Grosbach 14775ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::t2TBB); 14785ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14795ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14805ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14815ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14825ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14835ca66696e734f963b613de51e3df3684395daf1cJim Grosbach OutStreamer.EmitInstruction(TmpInst); 14845ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 14855ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitJump2Table(MI); 14865ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Make sure the next instruction is 2-byte aligned. 14875ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitAlignment(1); 14885ca66696e734f963b613de51e3df3684395daf1cJim Grosbach return; 14895ca66696e734f963b613de51e3df3684395daf1cJim Grosbach } 14905ca66696e734f963b613de51e3df3684395daf1cJim Grosbach case ARM::t2TBH_JT: { 14915ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14925ca66696e734f963b613de51e3df3684395daf1cJim Grosbach MCInst TmpInst; 14935ca66696e734f963b613de51e3df3684395daf1cJim Grosbach 14945ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::t2TBH); 14955ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14965ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14975ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14985ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14995ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1500882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 15015ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 1502882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach EmitJump2Table(MI); 1503882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach return; 1504882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 1505f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach case ARM::tBR_JTr: 15062dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach case ARM::BR_JTr: { 15072dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 15082dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // mov pc, target 15092dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 15105ca66696e734f963b613de51e3df3684395daf1cJim Grosbach unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? 15115ca66696e734f963b613de51e3df3684395daf1cJim Grosbach ARM::MOVr : ARM::tMOVgpr2gpr; 1512f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach TmpInst.setOpcode(Opc); 15132dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15142dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15152dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Add predicate operands. 15162dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15172dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1518a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1519a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach if (Opc == ARM::MOVr) 1520a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15212dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 15222dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach 1523f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach // Make sure the Thumb jump table is 4-byte aligned. 1524a68a4fdf37676794ce69624d1fd4e4627c377902Bill Wendling if (Opc == ARM::tMOVgpr2gpr) 1525f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach EmitAlignment(2); 1526f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach 15272dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Output the data for the jump table itself 15282dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach EmitJumpTable(MI); 15292dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach return; 15302dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } 15312dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach case ARM::BR_JTm: { 15322dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 15332dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // ldr pc, target 15342dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 15352dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach if (MI->getOperand(1).getReg() == 0) { 15362dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // literal offset 15372dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 15382dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15392dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15402dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); 15412dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } else { 15422dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::LDRrs); 15432dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15442dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15452dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 15462dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 15472dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } 15482dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Add predicate operands. 15492dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15502dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15512dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 15522dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach 15532dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Output the data for the jump table itself 1554a2244cb38781e596110023399c7902b5ee5087feJim Grosbach EmitJumpTable(MI); 1555a2244cb38781e596110023399c7902b5ee5087feJim Grosbach return; 1556a2244cb38781e596110023399c7902b5ee5087feJim Grosbach } 1557f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach case ARM::BR_JTadd: { 1558f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 1559f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // add pc, target, idx 15602dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 15612dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::ADDrr); 15622dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 15632dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 15642dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 1565f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Add predicate operands. 15662dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15672dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1568f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Add 's' bit operand (always reg0 for this) 15692dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15702dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1571f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach 1572f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Output the data for the jump table itself 1573f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach EmitJumpTable(MI); 1574f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach return; 1575f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach } 15762e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach case ARM::TRAP: { 15772e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // Non-Darwin binutils don't yet support the "trap" mnemonic. 15782e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // FIXME: Remove this special case when they do. 15792e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach if (!Subtarget->isTargetDarwin()) { 158078890f41f404fad3663408edd4adf2e13c1e13b5Jim Grosbach //.long 0xe7ffdefe @ trap 1581b2dda4bd346fe9a2795f83f659c0e60191b2e6a0Jim Grosbach uint32_t Val = 0xe7ffdefeUL; 15822e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.AddComment("trap"); 15832e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.EmitIntValue(Val, 4); 15842e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach return; 15852e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15862e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach break; 15872e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15882e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach case ARM::tTRAP: { 15892e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // Non-Darwin binutils don't yet support the "trap" mnemonic. 15902e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // FIXME: Remove this special case when they do. 15912e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach if (!Subtarget->isTargetDarwin()) { 159278890f41f404fad3663408edd4adf2e13c1e13b5Jim Grosbach //.short 57086 @ trap 1593c8ab9eb066f6d35880e3a24436baf21236c921caBenjamin Kramer uint16_t Val = 0xdefe; 15942e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.AddComment("trap"); 15952e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.EmitIntValue(Val, 2); 15962e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach return; 15972e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15982e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach break; 15992e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 1600433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach case ARM::t2Int_eh_sjlj_setjmp: 1601433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach case ARM::t2Int_eh_sjlj_setjmp_nofp: 1602a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::tInt_eh_sjlj_setjmp: { 1603433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Two incoming args: GPR:$src, GPR:$val 1604433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // mov $val, pc 1605433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // adds $val, #7 1606433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // str $val, [$src, #4] 1607433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // movs r0, #0 1608433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // b 1f 1609433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // movs r0, #1 1610433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 1: 1611433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1612433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach unsigned ValReg = MI->getOperand(1).getReg(); 1613433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCSymbol *Label = GetARMSJLJEHLabel(); 1614433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1615433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1616433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVgpr2tgpr); 1617433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1618433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1619433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 's' bit operand 1620433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1621433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.AddComment("eh_setjmp begin"); 1622433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1623433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1624433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1625433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1626433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tADDi3); 1627433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1628433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 's' bit operand 1629433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1630433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1631433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(7)); 1632433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1633433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1634433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1635433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1636433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1637433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1638433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1639f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tSTRi); 1640433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1641433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1642433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // The offset immediate is #4. The operand value is scaled by 4 for the 1643433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // tSTR instruction. 1644433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1645433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1646433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1647433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1648433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1649433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1650433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1651433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1652433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVi8); 1653433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1654433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1655433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1656433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1657433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1658433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1659433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1660433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1661433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1662433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, OutContext); 1663433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1664433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tB); 1665433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr)); 1666433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1667433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1668433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1669433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1670433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVi8); 1671433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1672433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1673433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1674433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1675433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1676433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1677433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.AddComment("eh_setjmp end"); 1678433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1679433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1680433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitLabel(Label); 1681433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach return; 1682433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1683433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 1684453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach case ARM::Int_eh_sjlj_setjmp_nofp: 1685a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::Int_eh_sjlj_setjmp: { 1686453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Two incoming args: GPR:$src, GPR:$val 1687453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // add $val, pc, #8 1688453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // str $val, [$src, #+4] 1689453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // mov r0, #0 1690453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // add pc, pc, #0 1691453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // mov r0, #1 1692453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1693453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach unsigned ValReg = MI->getOperand(1).getReg(); 1694453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach 1695453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1696453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1697453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::ADDri); 1698453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1699453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1700453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(8)); 1701453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1702453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1703453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1704453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1705453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1706453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.AddComment("eh_setjmp begin"); 1707453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1708453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1709453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1710453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 17117e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach TmpInst.setOpcode(ARM::STRi12); 1712453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1713453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1714453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(4)); 1715453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1716453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1717453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1718453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1719453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1720453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1721453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1722453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::MOVi); 1723453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1724453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1725453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1726453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1727453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1728453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1729453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1730453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1731453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1732453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1733453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1734453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::ADDri); 1735453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1736453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1737453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1738453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1739453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1740453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1741453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1742453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1743453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1744453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1745453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1746453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1747453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::MOVi); 1748453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1749453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1750453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1751453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1752453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1753453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1754453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1755453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.AddComment("eh_setjmp end"); 1756453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1757453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1758453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach return; 1759453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 17605acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach case ARM::Int_eh_sjlj_longjmp: { 17615acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr sp, [$src, #8] 17625acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr $scratch, [$src, #4] 17635acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr r7, [$src] 17645acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // bx $scratch 17655acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 17665acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach unsigned ScratchReg = MI->getOperand(1).getReg(); 17675acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17685acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17693e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17705acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); 17715acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17725acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(8)); 17735acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17745acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17755acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17765acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17775acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17785acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17795acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17803e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17815acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 17825acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17835acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(4)); 17845acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17855acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17865acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17875acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17885acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17895acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17905acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17913e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17925acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); 17935acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17945acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 17955acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17965acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17975acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17985acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17995acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18005acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 18015acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 18026e46d84eea97792a66c0bb64f26aad3976a23365Bill Wendling TmpInst.setOpcode(ARM::BX); 18035acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 18045acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 18055acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 18065acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1807385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1808385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1809385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach return; 1810385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1811385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach case ARM::tInt_eh_sjlj_longjmp: { 1812385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr $scratch, [$src, #8] 1813385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // mov sp, $scratch 1814385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr $scratch, [$src, #4] 1815385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr r7, [$src] 1816385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // bx $scratch 1817385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1818385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach unsigned ScratchReg = MI->getOperand(1).getReg(); 1819385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1820385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1821f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRi); 1822385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1823385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1824385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // The offset immediate is #8. The operand value is scaled by 4 for the 1825f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling // tLDR instruction. 1826385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(2)); 1827385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1828385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1829385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1830385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1831385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1832385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1833385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1834385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.setOpcode(ARM::tMOVtgpr2gpr); 1835385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); 1836385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1837385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1838385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1839385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1840385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1841385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1842385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1843385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1844f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRi); 1845385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1846385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1847385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1848385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1849385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1850385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1851385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1852385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1853385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1854385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1855f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRr); 1856385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); 1857385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1858385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1859385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1860385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1861385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1862385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1863385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1864385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1865385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1866421b106872d9c8adb4f14d77a8c6a1afeaaa29f6Cameron Zwarich TmpInst.setOpcode(ARM::tBX); 1867385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1868385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1869385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1870385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18715acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 18725acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18735acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach return; 18745acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18755edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Tail jump branches are really just branch instructions with additional 18767a2bdde0a0eebcd2125055e0eacaca040f0b766cChris Lattner // code-gen attributes. Convert them to the canonical form here. 18775edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPd: 18785edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPdND: { 18795edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst, TmpInst2; 18805edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Lower the instruction as-is to get the operands properly converted. 18815edf24efac40062766c643e08f11bc509d373370Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst2, *this); 18825edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(ARM::Bcc); 18835edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(TmpInst2.getOperand(0)); 18845edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Add predicate operands. 18855edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 18865edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18875edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 18885edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 18895edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 18905edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 18915edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPd: 18925edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPdND: { 18935edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst, TmpInst2; 18945edf24efac40062766c643e08f11bc509d373370Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst2, *this); 1895d34d429401187f4251c38323a1bc517bc96763b9Cameron Zwarich // The Darwin toolchain doesn't support tail call relocations of 16-bit 1896d34d429401187f4251c38323a1bc517bc96763b9Cameron Zwarich // branches. 1897d34d429401187f4251c38323a1bc517bc96763b9Cameron Zwarich TmpInst.setOpcode(Opc == ARM::tTAILJMPd ? ARM::t2B : ARM::tB); 18985edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(TmpInst2.getOperand(0)); 18995edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 19005edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 19015edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 19025edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 19035edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPrND: 19045edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPrND: 19055edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPr: 19065edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPr: { 19075edf24efac40062766c643e08f11bc509d373370Jim Grosbach unsigned newOpc = (Opc == ARM::TAILJMPr || Opc == ARM::TAILJMPrND) 1908106acd4158768ff1948accc654a1892caa9e010bCameron Zwarich ? ARM::BX : ARM::tBX; 19095edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst; 19105edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(newOpc); 19115edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 19125edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Predicate. 19135edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 19145edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 19155edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 19165edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 19175edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 19185edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 19195edf24efac40062766c643e08f11bc509d373370Jim Grosbach 19204d7286083537833880901953d29786cf831affc4Anton Korobeynikov // These are the pseudos created to comply with stricter operand restrictions 19214d7286083537833880901953d29786cf831affc4Anton Korobeynikov // on ARMv5. Lower them now to "normal" instructions, since all the 19224d7286083537833880901953d29786cf831affc4Anton Korobeynikov // restrictions are already satisfied. 19234d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::MULv5: 19244d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::MUL); 19254d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19264d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::MLAv5: 19274d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::MLA); 19284d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19294d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::SMULLv5: 19304d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::SMULL); 19314d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19324d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMULLv5: 19334d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMULL); 19344d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19354d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::SMLALv5: 19364d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::SMLAL); 19374d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19384d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMLALv5: 19394d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMLAL); 19404d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 19414d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMAALv5: 19424d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMAAL); 19434d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 194497f06937449c593a248dbbb1365e6ae408fb9decChris Lattner } 1945b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 194697f06937449c593a248dbbb1365e6ae408fb9decChris Lattner MCInst TmpInst; 194730e2cc254be72601b11383dda01f495741ffd56cChris Lattner LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 194857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 194957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Emit unwinding stuff for frame-related instructions 195057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (EnableARMEHABI && MI->getFlag(MachineInstr::FrameSetup)) 195157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov EmitUnwindingInstruction(MI); 195257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 1953850d2e2a1b58ea30abed10ca955259d60d07d97aChris Lattner OutStreamer.EmitInstruction(TmpInst); 195497f06937449c593a248dbbb1365e6ae408fb9decChris Lattner} 19552685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19562685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar//===----------------------------------------------------------------------===// 19572685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar// Target Registry Stuff 19582685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar//===----------------------------------------------------------------------===// 19592685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19602685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbarstatic MCInstPrinter *createARMMCInstPrinter(const Target &T, 1961a5c177e70a42f48e4885075c4c48aad0816a2817Bill Wendling TargetMachine &TM, 19622685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar unsigned SyntaxVariant, 1963d374087be5360a353a4239a155b1227057145f48Chris Lattner const MCAsmInfo &MAI) { 19642685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar if (SyntaxVariant == 0) 1965a5c177e70a42f48e4885075c4c48aad0816a2817Bill Wendling return new ARMInstPrinter(TM, MAI); 19662685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar return 0; 19672685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar} 19682685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19692685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar// Force static initialization. 19702685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbarextern "C" void LLVMInitializeARMAsmPrinter() { 19712685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget); 19722685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget); 19732685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19742685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter); 19752685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter); 19762685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar} 19772685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 1978