ARMAsmPrinter.cpp revision 6469540adf63d94a876c2b623cb4ca70479647f7
197f06937449c593a248dbbb1365e6ae408fb9decChris Lattner//===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===// 297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner// 37bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// The LLVM Compiler Infrastructure 47bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 67bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// License. See LICENSE.TXT for details. 77bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 87bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 97bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 107bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// This file contains a printer that converts from our internal representation 117bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// of machine-dependent LLVM code to GAS-format ARM assembly language. 127bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 137bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 147bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1595b2c7da5e83670881270c1cd231a240be0556d9Chris Lattner#define DEBUG_TYPE "asm-printer" 167bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "ARM.h" 17b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMAsmPrinter.h" 18a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "ARMAddressingModes.h" 19b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMBuildAttrs.h" 20b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "ARMBaseRegisterInfo.h" 21a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "ARMConstantPoolValue.h" 2297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "ARMMachineFunctionInfo.h" 235de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng#include "ARMMCExpr.h" 2497f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "ARMTargetMachine.h" 2517b443df4368acfad853d09858c033c45c468d5cJason W Kim#include "ARMTargetObjectFile.h" 26b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bdEvan Cheng#include "InstPrinter/ARMInstPrinter.h" 273f282aa94b80f4a93ff3cbc37cf3cd4a851c8432Dale Johannesen#include "llvm/Analysis/DebugInfo.h" 287bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Constants.h" 297bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Module.h" 30e55b15fa4753ef08cbfa2127d2d220b77aa07d87Benjamin Kramer#include "llvm/Type.h" 31cf20ac4fd12ea3510a8f32a24fff69eebe7b6f4aDan Gohman#include "llvm/Assembly/Writer.h" 32b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/CodeGen/MachineModuleInfoImpls.h" 337bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineFunctionPass.h" 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/MachineJumpTableInfo.h" 35b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/MC/MCAsmInfo.h" 36cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola#include "llvm/MC/MCAssembler.h" 37b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner#include "llvm/MC/MCContext.h" 38becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling#include "llvm/MC/MCExpr.h" 3997f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "llvm/MC/MCInst.h" 40f9bdeddb96043559c61f176f8077e3b91a0c544fChris Lattner#include "llvm/MC/MCSectionMachO.h" 41cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola#include "llvm/MC/MCObjectStreamer.h" 426c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner#include "llvm/MC/MCStreamer.h" 43325d3dcfe4d5efc91db0f59b20a72a11dea024edChris Lattner#include "llvm/MC/MCSymbol.h" 44d62f1b4168d4327c119642d28c26c836ae6717abChris Lattner#include "llvm/Target/Mangler.h" 45b01c4bbb4573e0007444e218b683840e4519e0c8Rafael Espindola#include "llvm/Target/TargetData.h" 467bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Target/TargetMachine.h" 475be54b00bdbe1abd02dde46ca2c4b0e5aaf7b537Evan Cheng#include "llvm/Target/TargetOptions.h" 4851b198af83cb0080c2709b04c129a3d774c07765Daniel Dunbar#include "llvm/Target/TargetRegistry.h" 49c324ecb7bc93a1f09db29851438ec5ee72b143ebEvan Cheng#include "llvm/ADT/SmallPtrSet.h" 50c40d9f9bae70c83947bf8fa5f9ee97adbf1bb0c0Jim Grosbach#include "llvm/ADT/SmallString.h" 5154c78ef2fed32e82e6aea8cbeb89156814eaf27cBob Wilson#include "llvm/ADT/StringExtras.h" 5297f06937449c593a248dbbb1365e6ae408fb9decChris Lattner#include "llvm/Support/CommandLine.h" 5359135f49e1699daec9a43fc2d15715d55b910f54Devang Patel#include "llvm/Support/Debug.h" 543046470919e648ff7c011bda9c094163062c83dcTorok Edwin#include "llvm/Support/ErrorHandling.h" 55b23569aff0a6d2b231cb93cc4acd0ac060ba560fChris Lattner#include "llvm/Support/raw_ostream.h" 567bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include <cctype> 577bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolausing namespace llvm; 587bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 5995b2c7da5e83670881270c1cd231a240be0556d9Chris Lattnernamespace { 60cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 61cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // Per section and per symbol attributes are not supported. 62cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // To implement them we would need the ability to delay this emission 63cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // until the assembly file is fully parsed/generated as only then do we 64cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // know the symbol and section numbers. 65cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class AttributeEmitter { 66cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 67cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void MaybeSwitchVendor(StringRef Vendor) = 0; 68cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0; 69f009a961caa75465999ef3bc764984d97a7da331Jason W Kim virtual void EmitTextAttribute(unsigned Attribute, StringRef String) = 0; 70cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola virtual void Finish() = 0; 714921e2356ef8f3b3f9ebd0c154b091c3d5dd2ce4Rafael Espindola virtual ~AttributeEmitter() {} 72cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 73cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 74cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class AsmAttributeEmitter : public AttributeEmitter { 75cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCStreamer &Streamer; 76cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 77cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 78cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AsmAttributeEmitter(MCStreamer &Streamer_) : Streamer(Streamer_) {} 79cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void MaybeSwitchVendor(StringRef Vendor) { } 80cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 81cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void EmitAttribute(unsigned Attribute, unsigned Value) { 82cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer.EmitRawText("\t.eabi_attribute " + 83cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Twine(Attribute) + ", " + Twine(Value)); 84cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 85cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 86f009a961caa75465999ef3bc764984d97a7da331Jason W Kim void EmitTextAttribute(unsigned Attribute, StringRef String) { 87f009a961caa75465999ef3bc764984d97a7da331Jason W Kim switch (Attribute) { 88f009a961caa75465999ef3bc764984d97a7da331Jason W Kim case ARMBuildAttrs::CPU_name: 89c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim Streamer.EmitRawText(StringRef("\t.cpu ") + LowercaseString(String)); 90f009a961caa75465999ef3bc764984d97a7da331Jason W Kim break; 91728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* GAS requires .fpu to be emitted regardless of EABI attribute */ 92728ff0db783152ed4f21f7746bd7874b49708172Renato Golin case ARMBuildAttrs::Advanced_SIMD_arch: 93728ff0db783152ed4f21f7746bd7874b49708172Renato Golin case ARMBuildAttrs::VFP_arch: 94728ff0db783152ed4f21f7746bd7874b49708172Renato Golin Streamer.EmitRawText(StringRef("\t.fpu ") + LowercaseString(String)); 95728ff0db783152ed4f21f7746bd7874b49708172Renato Golin break; 96f009a961caa75465999ef3bc764984d97a7da331Jason W Kim default: assert(0 && "Unsupported Text attribute in ASM Mode"); break; 97f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 98f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 99cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void Finish() { } 100cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 101cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 102cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola class ObjectAttributeEmitter : public AttributeEmitter { 103cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCObjectStreamer &Streamer; 104cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola StringRef CurrentVendor; 105cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola SmallString<64> Contents; 106cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 107cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola public: 108cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola ObjectAttributeEmitter(MCObjectStreamer &Streamer_) : 109cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer(Streamer_), CurrentVendor("") { } 110cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 111cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void MaybeSwitchVendor(StringRef Vendor) { 112cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola assert(!Vendor.empty() && "Vendor cannot be empty."); 113cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 114cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola if (CurrentVendor.empty()) 115cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola CurrentVendor = Vendor; 116cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola else if (CurrentVendor == Vendor) 117cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola return; 118cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola else 119cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Finish(); 120cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 121cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola CurrentVendor = Vendor; 122cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1233336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola assert(Contents.size() == 0); 124cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 125cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 126cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void EmitAttribute(unsigned Attribute, unsigned Value) { 127cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // FIXME: should be ULEB 128cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Contents += Attribute; 129cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Contents += Value; 130cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 131cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 132f009a961caa75465999ef3bc764984d97a7da331Jason W Kim void EmitTextAttribute(unsigned Attribute, StringRef String) { 133f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Contents += Attribute; 134c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim Contents += UppercaseString(String); 135f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Contents += 0; 136f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } 137f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 138cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola void Finish() { 1393336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t ContentsSize = Contents.size(); 1403336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1413336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola // Vendor size + Vendor name + '\0' 1423336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t VendorHeaderSize = 4 + CurrentVendor.size() + 1; 143cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1443336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola // Tag + Tag Size 1453336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola const size_t TagHeaderSize = 1 + 4; 146cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1473336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(VendorHeaderSize + TagHeaderSize + ContentsSize, 4); 1483336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitBytes(CurrentVendor, 0); 1493336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(0, 1); // '\0' 1503336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1513336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(ARMBuildAttrs::File, 1); 1523336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Streamer.EmitIntValue(TagHeaderSize + ContentsSize, 4); 153cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 154cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola Streamer.EmitBytes(Contents, 0); 1553336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola 1563336384239e563bdc5f3dbb8affec6c1e9ffbc47Rafael Espindola Contents.clear(); 157cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 158cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola }; 159cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 1607bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} // end of anonymous namespace 1617bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 162baf120fbe8056ef68fc91b16465590fdf2311c27Jim GrosbachMachineLocation ARMAsmPrinter:: 163baf120fbe8056ef68fc91b16465590fdf2311c27Jim GrosbachgetDebugValueLocation(const MachineInstr *MI) const { 164baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach MachineLocation Location; 165baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach assert(MI->getNumOperands() == 4 && "Invalid no. of machine operands!"); 166baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach // Frame address. Currently handles register +- offset only. 167baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm()) 168baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm()); 169baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach else { 170baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n"); 171baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach } 172baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach return Location; 173baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach} 174baf120fbe8056ef68fc91b16465590fdf2311c27Jim Grosbach 175c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel/// getDwarfRegOpSize - get size required to emit given machine location using 176c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel/// dwarf encoding. 177c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patelunsigned ARMAsmPrinter::getDwarfRegOpSize(const MachineLocation &MLoc) const { 178c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel const TargetRegisterInfo *RI = TM.getRegisterInfo(); 179c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) 180c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return AsmPrinter::getDwarfRegOpSize(MLoc); 181c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel else { 182c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned Reg = MLoc.getReg(); 183c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel if (Reg >= ARM::S0 && Reg <= ARM::S31) { 184c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); 185c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // S registers are described as bit-pieces of a register 186c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0) 187c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32) 188c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 189c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned SReg = Reg - ARM::S0; 190c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned Rx = 256 + (SReg >> 1); 191c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB 192c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // 1 + ULEB(Rx) + 1 + 1 + 1 193c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return 4 + MCAsmInfo::getULEB128Size(Rx); 194c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel } 195c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 196c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel if (Reg >= ARM::Q0 && Reg <= ARM::Q15) { 197c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering"); 198c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // Q registers Q0-Q15 are described by composing two D registers together. 199c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8) 200c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 201c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned QReg = Reg - ARM::Q0; 202c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned D1 = 256 + 2 * QReg; 203c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel unsigned D2 = D1 + 1; 204c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 205c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) + 206c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8); 207c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel // 6 + ULEB(D1) + ULEB(D2) 208c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return 6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2); 209c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel } 210c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel } 211c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel return 0; 212c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel} 213c26f5447e39b43a6dd9c1a9d88227f4adf3b5600Devang Patel 21427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel/// EmitDwarfRegOp - Emit dwarf register operation. 2150be77dff1147488814b8eea6ec8619f56e3d9f5eDevang Patelvoid ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { 21627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel const TargetRegisterInfo *RI = TM.getRegisterInfo(); 21727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) 2180be77dff1147488814b8eea6ec8619f56e3d9f5eDevang Patel AsmPrinter::EmitDwarfRegOp(MLoc); 21927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel else { 22027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned Reg = MLoc.getReg(); 22127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (Reg >= ARM::S0 && Reg <= ARM::S31) { 2220a6ea83f393d06fb424c470777a1c3e8a8c50ab1Devang Patel assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); 22327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S registers are described as bit-pieces of a register 22427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S[2x] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 0) 22527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel // S[2x+1] = DW_OP_regx(256 + (x>>1)) DW_OP_bit_piece(32, 32) 22627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 22727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned SReg = Reg - ARM::S0; 22827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel bool odd = SReg & 0x1; 22927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel unsigned Rx = 256 + (SReg >> 1); 23027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 23127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_regx for S register"); 23227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_regx); 23327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 23427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment(Twine(SReg)); 23527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(Rx); 23627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 23727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel if (odd) { 23827f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_bit_piece 32 32"); 23927f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_bit_piece); 24027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 24127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 24227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } else { 24327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel OutStreamer.AddComment("DW_OP_bit_piece 32 0"); 24427f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitInt8(dwarf::DW_OP_bit_piece); 24527f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(32); 24627f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel EmitULEB128(0); 24727f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 24871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel } else if (Reg >= ARM::Q0 && Reg <= ARM::Q15) { 2490a6ea83f393d06fb424c470777a1c3e8a8c50ab1Devang Patel assert(ARM::Q0 + 15 == ARM::Q15 && "Unexpected ARM Q register numbering"); 25071f3f1146f2ba2773f0467767b67c12258960f34Devang Patel // Q registers Q0-Q15 are described by composing two D registers together. 25171f3f1146f2ba2773f0467767b67c12258960f34Devang Patel // Qx = DW_OP_regx(256+2x) DW_OP_piece(8) DW_OP_regx(256+2x+1) DW_OP_piece(8) 25271f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 25371f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned QReg = Reg - ARM::Q0; 25471f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned D1 = 256 + 2 * QReg; 25571f3f1146f2ba2773f0467767b67c12258960f34Devang Patel unsigned D2 = D1 + 1; 25671f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 25771f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_regx for Q register: D1"); 25871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_regx); 25971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(D1); 26071f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_piece 8"); 26171f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_piece); 26271f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(8); 26371f3f1146f2ba2773f0467767b67c12258960f34Devang Patel 26471f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_regx for Q register: D2"); 26571f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_regx); 26671f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(D2); 26771f3f1146f2ba2773f0467767b67c12258960f34Devang Patel OutStreamer.AddComment("DW_OP_piece 8"); 26871f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitInt8(dwarf::DW_OP_piece); 26971f3f1146f2ba2773f0467767b67c12258960f34Devang Patel EmitULEB128(8); 27027f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 27127f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel } 27227f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel} 27327f5acb7d49c3ca2e3f7fe13d97cc19a78b15e1aDevang Patel 274953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattnervoid ARMAsmPrinter::EmitFunctionEntryLabel() { 275953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner if (AFI->isThumbFunction()) { 276ce79299f78bb04e76e1860ab119b85d69f3a19c7Jim Grosbach OutStreamer.EmitAssemblerFlag(MCAF_Code16); 2776469540adf63d94a876c2b623cb4ca70479647f7Rafael Espindola OutStreamer.EmitThumbFunc(CurrentFnSym); 278953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner } 279b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 280953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner OutStreamer.EmitLabel(CurrentFnSym); 281953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner} 282953ebb769ada06d22f8ae4963651530b9cb84830Chris Lattner 2832317e40539aac11da00bd587b5f0def04d989769Jim Grosbach/// runOnMachineFunction - This uses the EmitInstruction() 2847bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola/// method to print assembly for each instruction. 2857bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola/// 2867bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolabool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { 287a8e2989ece6dc46df59b0768184028257f913843Evan Cheng AFI = MF.getInfo<ARMFunctionInfo>(); 2886d63a728586d56eb3e881905beb9db27f520f5d3Evan Cheng MCP = MF.getConstantPool(); 289a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 290d49fe1b6bc4615684c2ec71140a21e9c4cd69ce3Chris Lattner return AsmPrinter::runOnMachineFunction(MF); 29132bd5f4f6a374f9ab0fcbd2cf6a8561019a6fd56Rafael Espindola} 29232bd5f4f6a374f9ab0fcbd2cf6a8561019a6fd56Rafael Espindola 293055b0310f862b91f33699037ce67d3ab8137c20cEvan Chengvoid ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 29435c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner raw_ostream &O, const char *Modifier) { 295055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng const MachineOperand &MO = MI->getOperand(OpNum); 2965cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov unsigned TF = MO.getTargetFlags(); 2975cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov 2982f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola switch (MO.getType()) { 2998bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner default: 3008bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner assert(0 && "<unknown operand type>"); 3015bafff36c798608a189c517d37527e4a38863071Bob Wilson case MachineOperand::MO_Register: { 3025bafff36c798608a189c517d37527e4a38863071Bob Wilson unsigned Reg = MO.getReg(); 3038bc86cba60fbb35fbfb52cc32b9e451e6b903a27Chris Lattner assert(TargetRegisterInfo::isPhysicalRegister(Reg)); 30435636281c7ab6eb128b4ced6bf7ae0b6b8458dd2Jim Grosbach assert(!MO.getSubReg() && "Subregs should be eliminated!"); 30535636281c7ab6eb128b4ced6bf7ae0b6b8458dd2Jim Grosbach O << ARMInstPrinter::getRegisterName(Reg); 3062f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 3075bafff36c798608a189c517d37527e4a38863071Bob Wilson } 308a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_Immediate: { 3095adb66a646e2ec32265263739f5b01c3f50c176aEvan Cheng int64_t Imm = MO.getImm(); 310632606c724ebcfa6a9da71c443151e7a65829c99Anton Korobeynikov O << '#'; 3115cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov if ((Modifier && strcmp(Modifier, "lo16") == 0) || 312650b7d76afbc7db2dd1a4590149d50a162bb25d8Jason W Kim (TF == ARMII::MO_LO16)) 3135cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":lower16:"; 3145cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov else if ((Modifier && strcmp(Modifier, "hi16") == 0) || 315650b7d76afbc7db2dd1a4590149d50a162bb25d8Jason W Kim (TF == ARMII::MO_HI16)) 3165cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":upper16:"; 317632606c724ebcfa6a9da71c443151e7a65829c99Anton Korobeynikov O << Imm; 3182f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 319a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 3202f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola case MachineOperand::MO_MachineBasicBlock: 3211b2eb0e8a6aaf034675b17be6d853cb1c666200fChris Lattner O << *MO.getMBB()->getSymbol(); 3222f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola return; 32384b19be6ab9544f72eafb11048a1121f5ea77c95Rafael Espindola case MachineOperand::MO_GlobalAddress: { 32446510a73e977273ec67747eb34cbdb43f815e451Dan Gohman const GlobalValue *GV = MO.getGlobal(); 3255cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov if ((Modifier && strcmp(Modifier, "lo16") == 0) || 3265cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov (TF & ARMII::MO_LO16)) 3275cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":lower16:"; 3285cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov else if ((Modifier && strcmp(Modifier, "hi16") == 0) || 3295cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov (TF & ARMII::MO_HI16)) 3305cdc3a949af0cef7f2163f8a7acbf3049c226321Anton Korobeynikov O << ":upper16:"; 331d62f1b4168d4327c119642d28c26c836ae6717abChris Lattner O << *Mang->getSymbol(GV); 3327751ad92daeea5a3502fbc266ae814baec5c03e6Anton Korobeynikov 3330c08d092049c025c9ccf7143e39f39dc4e30d6b4Chris Lattner printOffset(MO.getOffset(), O); 3341d6111c5ac97c321782637b2cd72e2c3e4d3d694Jim Grosbach if (TF == ARMII::MO_PLT) 3350ae4a3357a556261f25b1584a2d9914637c69e65Lauro Ramos Venancio O << "(PLT)"; 3362f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 337a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 338a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_ExternalSymbol: { 33910b318bcb39218d2ed525e4862c854bc8d1baf63Chris Lattner O << *GetExternalSymbolSymbol(MO.getSymbolName()); 3401d6111c5ac97c321782637b2cd72e2c3e4d3d694Jim Grosbach if (TF == ARMII::MO_PLT) 3410ae4a3357a556261f25b1584a2d9914637c69e65Lauro Ramos Venancio O << "(PLT)"; 3422f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 343a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 3442f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola case MachineOperand::MO_ConstantPoolIndex: 3451b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner O << *GetCPISymbol(MO.getIndex()); 3462f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola break; 347a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case MachineOperand::MO_JumpTableIndex: 3481b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner O << *GetJTISymbol(MO.getIndex()); 349a8e2989ece6dc46df59b0768184028257f913843Evan Cheng break; 3502f99b6bd9601ae8d4fd248f9bb701283795c38a8Rafael Espindola } 3517bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 3527bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 353055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng//===--------------------------------------------------------------------===// 354055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng 3550890cf124f00da3dc943c1882f4221955e0281edChris LattnerMCSymbol *ARMAsmPrinter:: 3560890cf124f00da3dc943c1882f4221955e0281edChris LattnerGetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2, 3570890cf124f00da3dc943c1882f4221955e0281edChris Lattner const MachineBasicBlock *MBB) const { 3580890cf124f00da3dc943c1882f4221955e0281edChris Lattner SmallString<60> Name; 3590890cf124f00da3dc943c1882f4221955e0281edChris Lattner raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() 360bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner << getFunctionNumber() << '_' << uid << '_' << uid2 3610890cf124f00da3dc943c1882f4221955e0281edChris Lattner << "_set_" << MBB->getNumber(); 3629b97a73dedf736e14b04a3d1a153f10d25b2507bChris Lattner return OutContext.GetOrCreateSymbol(Name.str()); 3630890cf124f00da3dc943c1882f4221955e0281edChris Lattner} 3640890cf124f00da3dc943c1882f4221955e0281edChris Lattner 3650890cf124f00da3dc943c1882f4221955e0281edChris LattnerMCSymbol *ARMAsmPrinter:: 3660890cf124f00da3dc943c1882f4221955e0281edChris LattnerGetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const { 3670890cf124f00da3dc943c1882f4221955e0281edChris Lattner SmallString<60> Name; 3680890cf124f00da3dc943c1882f4221955e0281edChris Lattner raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI" 369281e7767df71b3f727ade80a16ff0c4fe5a49dd9Chris Lattner << getFunctionNumber() << '_' << uid << '_' << uid2; 3709b97a73dedf736e14b04a3d1a153f10d25b2507bChris Lattner return OutContext.GetOrCreateSymbol(Name.str()); 371bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner} 372bfcb09688c7db15a9f9415d717a5a31c499a2208Chris Lattner 373433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 374433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim GrosbachMCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel(void) const { 375433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach SmallString<60> Name; 376433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "SJLJEH" 377433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach << getFunctionNumber(); 378433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach return OutContext.GetOrCreateSymbol(Name.str()); 379433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach} 380433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 381055b0310f862b91f33699037ce67d3ab8137c20cEvan Chengbool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 382c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner unsigned AsmVariant, const char *ExtraCode, 383c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner raw_ostream &O) { 384a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Does this asm operand have a single letter operand modifier? 385a8e2989ece6dc46df59b0768184028257f913843Evan Cheng if (ExtraCode && ExtraCode[0]) { 386a8e2989ece6dc46df59b0768184028257f913843Evan Cheng if (ExtraCode[1] != 0) return true; // Unknown modifier. 3878e9ece75db5045ec057efbbdba6550fa0d85e695Anton Korobeynikov 388a8e2989ece6dc46df59b0768184028257f913843Evan Cheng switch (ExtraCode[0]) { 389a8e2989ece6dc46df59b0768184028257f913843Evan Cheng default: return true; // Unknown modifier. 3909b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson case 'a': // Print as a memory address. 3919b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson if (MI->getOperand(OpNum).isReg()) { 3922f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach O << "[" 3932f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 3942f24c4ece09f1157c5cb29357d91d2a0d77eb57cJim Grosbach << "]"; 3959b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson return false; 3969b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson } 3979b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson // Fallthrough 3989b4b00ad436daeac6f97f77e9b5a3cc67ada150cBob Wilson case 'c': // Don't print "#" before an immediate operand. 3994f38b383d5089c49489a9a56d8efd0eb76048b3fBob Wilson if (!MI->getOperand(OpNum).isImm()) 4004f38b383d5089c49489a9a56d8efd0eb76048b3fBob Wilson return true; 4012317e40539aac11da00bd587b5f0def04d989769Jim Grosbach O << MI->getOperand(OpNum).getImm(); 4028f3434647d3d39b49475239e3be1b8afb06415cfBob Wilson return false; 403e21e39666e8a41ffd4971d8bb023b70b59297267Evan Cheng case 'P': // Print a VFP double precision register. 404d831cda3e74235704f163d5a18352584d537517aEvan Cheng case 'q': // Print a NEON quad precision register. 40535c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner printOperand(MI, OpNum, O); 40623a95704949b99ca07afe45c6946d0fa26baf9f3Evan Cheng return false; 407a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case 'Q': 408a8e2989ece6dc46df59b0768184028257f913843Evan Cheng case 'R': 409d984eb6073d5445f08fb0cea67a668b1b5e888e0Bob Wilson case 'H': 4109bb43e167576d464637c480eccc5696e01e1887cBob Wilson // These modifiers are not yet supported. 411d984eb6073d5445f08fb0cea67a668b1b5e888e0Bob Wilson return true; 41284f60b7359e1aa90794bb19de2bbf4d25dc2f01dEvan Cheng } 413a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 414e9952213086c865eb678bd3f4c9c7d849f0249d2Jim Grosbach 41535c33bd772b3cfb34fdc6b5c9171f955454d0043Chris Lattner printOperand(MI, OpNum, O); 416a8e2989ece6dc46df59b0768184028257f913843Evan Cheng return false; 417a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 418a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 419224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilsonbool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 420055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng unsigned OpNum, unsigned AsmVariant, 421c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner const char *ExtraCode, 422c75c028a15a13786eee585aa634b4faf694dd00aChris Lattner raw_ostream &O) { 423224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson if (ExtraCode && ExtraCode[0]) 424224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson return true; // Unknown modifier. 425765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson 426765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson const MachineOperand &MO = MI->getOperand(OpNum); 427765cc0b9d59bf63dfcb02e3d126ea1c63e16f86fBob Wilson assert(MO.isReg() && "unexpected inline asm memory operand"); 4282317e40539aac11da00bd587b5f0def04d989769Jim Grosbach O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]"; 429224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson return false; 430224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson} 431224c244f56025c10e70e4204daceadfb3cdd2c06Bob Wilson 432812209a58c5520c604bc9279aa069e5ae066e860Bob Wilsonvoid ARMAsmPrinter::EmitStartOfAsmFile(Module &M) { 4330fb34683b9e33238288d2af1e090582464df8387Bob Wilson if (Subtarget->isTargetDarwin()) { 4340fb34683b9e33238288d2af1e090582464df8387Bob Wilson Reloc::Model RelocM = TM.getRelocationModel(); 4350fb34683b9e33238288d2af1e090582464df8387Bob Wilson if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) { 4360fb34683b9e33238288d2af1e090582464df8387Bob Wilson // Declare all the text sections up front (before the DWARF sections 4370fb34683b9e33238288d2af1e090582464df8387Bob Wilson // emitted by AsmPrinter::doInitialization) so the assembler will keep 4380fb34683b9e33238288d2af1e090582464df8387Bob Wilson // them together at the beginning of the object file. This helps 4390fb34683b9e33238288d2af1e090582464df8387Bob Wilson // avoid out-of-range branches that are due a fundamental limitation of 4400fb34683b9e33238288d2af1e090582464df8387Bob Wilson // the way symbol offsets are encoded with the current Darwin ARM 4410fb34683b9e33238288d2af1e090582464df8387Bob Wilson // relocations. 442b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach const TargetLoweringObjectFileMachO &TLOFMacho = 4430d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman static_cast<const TargetLoweringObjectFileMachO &>( 4440d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman getObjFileLowering()); 44529e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getTextSection()); 44629e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection()); 44729e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection()); 44829e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson if (RelocM == Reloc::DynamicNoPIC) { 44929e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson const MCSection *sect = 45022772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner OutContext.getMachOSection("__TEXT", "__symbol_stub4", 45122772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner MCSectionMachO::S_SYMBOL_STUBS, 45222772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner 12, SectionKind::getText()); 45329e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(sect); 45429e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson } else { 45529e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson const MCSection *sect = 45622772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner OutContext.getMachOSection("__TEXT", "__picsymbolstub4", 45722772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner MCSectionMachO::S_SYMBOL_STUBS, 45822772214de79aa1c5ca38c4fb1da137d8fb30a05Chris Lattner 16, SectionKind::getText()); 45929e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson OutStreamer.SwitchSection(sect); 46029e066965fb84b3aad2840815c6d0602dafb0b17Bob Wilson } 46163db594559dc8eac666204c7907bae664f5234daBob Wilson const MCSection *StaticInitSect = 46263db594559dc8eac666204c7907bae664f5234daBob Wilson OutContext.getMachOSection("__TEXT", "__StaticInit", 46363db594559dc8eac666204c7907bae664f5234daBob Wilson MCSectionMachO::S_REGULAR | 46463db594559dc8eac666204c7907bae664f5234daBob Wilson MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS, 46563db594559dc8eac666204c7907bae664f5234daBob Wilson SectionKind::getText()); 46663db594559dc8eac666204c7907bae664f5234daBob Wilson OutStreamer.SwitchSection(StaticInitSect); 4670fb34683b9e33238288d2af1e090582464df8387Bob Wilson } 4680fb34683b9e33238288d2af1e090582464df8387Bob Wilson } 4690fb34683b9e33238288d2af1e090582464df8387Bob Wilson 470e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach // Use unified assembler syntax. 471afd1cc25786f68ca56a63d29ea2bd297990e9f81Jason W Kim OutStreamer.EmitAssemblerFlag(MCAF_SyntaxUnified); 472d61eca533081580d56fabee38f86507d8019ca75Anton Korobeynikov 47388ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov // Emit ARM Build Attributes 47488ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov if (Subtarget->isTargetELF()) { 475b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 476def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim emitAttributes(); 47788ce667003a33e008d9ecc6811584681787e8150Anton Korobeynikov } 4787bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 4797bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 4800f3cc657387d44cd7c56e4ddea896a50ab9106b8Anton Korobeynikov 4814a071d667d995b00e7853243ff9c7c1269324478Chris Lattnervoid ARMAsmPrinter::EmitEndOfAsmFile(Module &M) { 4825be54b00bdbe1abd02dde46ca2c4b0e5aaf7b537Evan Cheng if (Subtarget->isTargetDarwin()) { 483f61159b574155b056dbd5d6d44f47f753d424056Chris Lattner // All darwin targets use mach-o. 4840d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman const TargetLoweringObjectFileMachO &TLOFMacho = 4850d805c33d134d88169e3dc4a3272cff9a5713ce7Dan Gohman static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 486b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MachineModuleInfoMachO &MMIMacho = 487b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MMI->getObjFileInfo<MachineModuleInfoMachO>(); 488e9952213086c865eb678bd3f4c9c7d849f0249d2Jim Grosbach 489a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Output non-lazy-pointers for external and common global variables. 490b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 491cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling 492b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner if (!Stubs.empty()) { 493ff4bc460c52c1f285d8a56da173641bf92d49e3fChris Lattner // Switch with ".non_lazy_symbol_pointer" directive. 4946c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 495c076a9793936b140364671a5e39ee53bd266c6c3Chris Lattner EmitAlignment(2); 496b0f294c14b4e7098e5170ecfd528bcc9682ce0c7Chris Lattner for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 497becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // L_foo$stub: 498becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.EmitLabel(Stubs[i].first); 499becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // .indirect_symbol _foo 50052a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 50152a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol); 502cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 50352a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling if (MCSym.getInt()) 504cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling // External to current translation unit. 505cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); 506cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling else 507cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling // Internal to current translation unit. 5085e1b55d67288874f8669621b9176814ce449f8f5Bill Wendling // 5091b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // When we place the LSDA into the TEXT section, the type info 5101b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // pointers need to be indirect and pc-rel. We accomplish this by 5111b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // using NLPs; however, sometimes the types are local to the file. 5121b935a3d2e2619c7de2488163fc1501285b53fa3Jim Grosbach // We need to fill in the value for the NLP in those cases. 51352a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(), 51452a50e5d0e6ac08d86706dbdd8f4a5dbb44da4cbBill Wendling OutContext), 515cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 4/*size*/, 0/*addrspace*/); 516ae94e594164b193236002516970aeec4c4574768Evan Cheng } 517becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling 518becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling Stubs.clear(); 519becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.AddBlankLine(); 520a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 521a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 522e4d9ea83c0d4bcc535bd978e1afa599eb3ebb893Chris Lattner Stubs = MMIMacho.GetHiddenGVStubList(); 523e4d9ea83c0d4bcc535bd978e1afa599eb3ebb893Chris Lattner if (!Stubs.empty()) { 5246c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7fChris Lattner OutStreamer.SwitchSection(getObjFileLowering().getDataSection()); 525f3231de60bb64c3f6fc6770b3e6174f4f839a4f3Chris Lattner EmitAlignment(2); 526becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 527becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // L_foo$stub: 528becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling OutStreamer.EmitLabel(Stubs[i].first); 529becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling // .long _foo 530cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling OutStreamer.EmitValue(MCSymbolRefExpr:: 531cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling Create(Stubs[i].second.getPointer(), 532cebae36f57456fe6b0e13726acd1e0250654f02dBill Wendling OutContext), 533becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling 4/*size*/, 0/*addrspace*/); 534becd83e3f4eb996f8e43189ce482267b3b8351a8Bill Wendling } 535cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling 536cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling Stubs.clear(); 537cf6f28d84af09b38e96307007cd93760a7ca42d7Bill Wendling OutStreamer.AddBlankLine(); 538ae94e594164b193236002516970aeec4c4574768Evan Cheng } 539ae94e594164b193236002516970aeec4c4574768Evan Cheng 540a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // Funny Darwin hack: This flag tells the linker that no global symbols 541a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // contain code that falls through to other global symbols (e.g. the obvious 542a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // implementation of multiple entry points). If this doesn't occur, the 543a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // linker can safely perform dead code stripping. Since LLVM never 544a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // generates code that does this, it is always safe to set. 545a5ad93a10a5435f21090b09edb6b3a7e44967648Chris Lattner OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 546b01c4bbb4573e0007444e218b683840e4519e0c8Rafael Espindola } 5477bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 5480bd89712c03c59ea43ce37763685e7f7c0bdd977Anton Korobeynikov 54997f06937449c593a248dbbb1365e6ae408fb9decChris Lattner//===----------------------------------------------------------------------===// 550def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// Helper routines for EmitStartOfAsmFile() and EmitEndOfAsmFile() 551def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// FIXME: 552def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// The following seem like one-off assembler flags, but they actually need 553fa7fb64fad0e46e7329e4ba84a1edec5e979c31aJim Grosbach// to appear in the .ARM.attributes section in ELF. 554def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim// Instead of subclassing the MCELFStreamer, we do the work here. 555def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 556def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kimvoid ARMAsmPrinter::emitAttributes() { 557fa7fb64fad0e46e7329e4ba84a1edec5e979c31aJim Grosbach 55817b443df4368acfad853d09858c033c45c468d5cJason W Kim emitARMAttributeSection(); 55917b443df4368acfad853d09858c033c45c468d5cJason W Kim 560728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* GAS expect .fpu to be emitted, regardless of VFP build attribute */ 561728ff0db783152ed4f21f7746bd7874b49708172Renato Golin bool emitFPU = false; 562cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttributeEmitter *AttrEmitter; 563728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (OutStreamer.hasRawTextSupport()) { 564cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter = new AsmAttributeEmitter(OutStreamer); 565728ff0db783152ed4f21f7746bd7874b49708172Renato Golin emitFPU = true; 566728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } else { 567cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola MCObjectStreamer &O = static_cast<MCObjectStreamer&>(OutStreamer); 568cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter = new ObjectAttributeEmitter(O); 569cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 570cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 571cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->MaybeSwitchVendor("aeabi"); 572cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 573def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim std::string CPUString = Subtarget->getCPUString(); 574f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 575f009a961caa75465999ef3bc764984d97a7da331Jason W Kim if (CPUString == "cortex-a8" || 576f009a961caa75465999ef3bc764984d97a7da331Jason W Kim Subtarget->isCortexA8()) { 577c046d64f1b5f19cb06616e519a45bc4b0693f9d3Jason W Kim AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "cortex-a8"); 578f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7); 579f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile, 580f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::ApplicationProfile); 581f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 582f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 583f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 584f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowThumb32); 585f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // Fixme: figure out when this is emitted. 586f009a961caa75465999ef3bc764984d97a7da331Jason W Kim //AttrEmitter->EmitAttribute(ARMBuildAttrs::WMMX_arch, 587f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // ARMBuildAttrs::AllowWMMXv1); 588f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // 589f009a961caa75465999ef3bc764984d97a7da331Jason W Kim 590f009a961caa75465999ef3bc764984d97a7da331Jason W Kim /// ADD additional Else-cases here! 591f009a961caa75465999ef3bc764984d97a7da331Jason W Kim } else if (CPUString == "generic") { 5927179d1e5c0acfbb0980eaf85f266cd8981dbd12dDale Johannesen // FIXME: Why these defaults? 5937179d1e5c0acfbb0980eaf85f266cd8981dbd12dDale Johannesen AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T); 594f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 595f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 596f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 597f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 598cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola } 599def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 600e89a05337a9946040251a5f19165c41b9a1a7b27Renato Golin if (Subtarget->hasNEON() && emitFPU) { 601728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* NEON is not exactly a VFP architecture, but GAS emit one of 602728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * neon/vfpv3/vfpv2 for .fpu parameters */ 603728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::Advanced_SIMD_arch, "neon"); 604728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* If emitted for NEON, omit from VFP below, since you can have both 605728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * NEON and VFP in build attributes but only one .fpu */ 606728ff0db783152ed4f21f7746bd7874b49708172Renato Golin emitFPU = false; 607728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 608728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 609728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* VFPv3 + .fpu */ 610728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (Subtarget->hasVFP3()) { 611728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 612728ff0db783152ed4f21f7746bd7874b49708172Renato Golin ARMBuildAttrs::AllowFPv3A); 613728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (emitFPU) 614728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "vfpv3"); 615728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 616728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* VFPv2 + .fpu */ 617728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } else if (Subtarget->hasVFP2()) { 618f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 619f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowFPv2); 620728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (emitFPU) 621728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitTextAttribute(ARMBuildAttrs::VFP_arch, "vfpv2"); 622728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 623728ff0db783152ed4f21f7746bd7874b49708172Renato Golin 624728ff0db783152ed4f21f7746bd7874b49708172Renato Golin /* TODO: ARMBuildAttrs::Allowed is not completely accurate, 625728ff0db783152ed4f21f7746bd7874b49708172Renato Golin * since NEON can have 1 (allowed) or 2 (fused MAC operations) */ 626728ff0db783152ed4f21f7746bd7874b49708172Renato Golin if (Subtarget->hasNEON()) { 627728ff0db783152ed4f21f7746bd7874b49708172Renato Golin AttrEmitter->EmitAttribute(ARMBuildAttrs::Advanced_SIMD_arch, 628728ff0db783152ed4f21f7746bd7874b49708172Renato Golin ARMBuildAttrs::Allowed); 629728ff0db783152ed4f21f7746bd7874b49708172Renato Golin } 630def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 631def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // Signal various FP modes. 632def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (!UnsafeFPMath) { 633f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 634f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 635f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 636f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 637def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim } 638def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 639def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (NoInfsFPMath && NoNaNsFPMath) 640f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 641f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::Allowed); 642def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim else 643f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 644f009a961caa75465999ef3bc764984d97a7da331Jason W Kim ARMBuildAttrs::AllowIEE754); 645def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 646f009a961caa75465999ef3bc764984d97a7da331Jason W Kim // FIXME: add more flags to ARMBuildAttrs.h 647def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // 8-bytes alignment stuff. 648cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1); 649cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1); 650def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 651def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // Hard float. Use both S and D registers and conform to AAPCS-VFP. 652def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) { 653cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_HardFP_use, 3); 654cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_VFP_args, 1); 655def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim } 656def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim // FIXME: Should we signal R9 usage? 657cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 658f009a961caa75465999ef3bc764984d97a7da331Jason W Kim if (Subtarget->hasDivide()) 659f009a961caa75465999ef3bc764984d97a7da331Jason W Kim AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1); 660cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola 661cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola AttrEmitter->Finish(); 662cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola delete AttrEmitter; 663def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim} 664def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 66517b443df4368acfad853d09858c033c45c468d5cJason W Kimvoid ARMAsmPrinter::emitARMAttributeSection() { 66617b443df4368acfad853d09858c033c45c468d5cJason W Kim // <format-version> 66717b443df4368acfad853d09858c033c45c468d5cJason W Kim // [ <section-length> "vendor-name" 66817b443df4368acfad853d09858c033c45c468d5cJason W Kim // [ <file-tag> <size> <attribute>* 66917b443df4368acfad853d09858c033c45c468d5cJason W Kim // | <section-tag> <size> <section-number>* 0 <attribute>* 67017b443df4368acfad853d09858c033c45c468d5cJason W Kim // | <symbol-tag> <size> <symbol-number>* 0 <attribute>* 67117b443df4368acfad853d09858c033c45c468d5cJason W Kim // ]+ 67217b443df4368acfad853d09858c033c45c468d5cJason W Kim // ]* 67317b443df4368acfad853d09858c033c45c468d5cJason W Kim 67417b443df4368acfad853d09858c033c45c468d5cJason W Kim if (OutStreamer.hasRawTextSupport()) 67517b443df4368acfad853d09858c033c45c468d5cJason W Kim return; 67617b443df4368acfad853d09858c033c45c468d5cJason W Kim 67717b443df4368acfad853d09858c033c45c468d5cJason W Kim const ARMElfTargetObjectFile &TLOFELF = 67817b443df4368acfad853d09858c033c45c468d5cJason W Kim static_cast<const ARMElfTargetObjectFile &> 67917b443df4368acfad853d09858c033c45c468d5cJason W Kim (getObjFileLowering()); 68017b443df4368acfad853d09858c033c45c468d5cJason W Kim 68117b443df4368acfad853d09858c033c45c468d5cJason W Kim OutStreamer.SwitchSection(TLOFELF.getAttributesSection()); 682def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim 683cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola // Format version 684cecbc3d28277ff4916326311cbf87335ed05d106Rafael Espindola OutStreamer.EmitIntValue(0x41, 1); 68517b443df4368acfad853d09858c033c45c468d5cJason W Kim} 68617b443df4368acfad853d09858c033c45c468d5cJason W Kim 687def9ac48b779a4cb0b1d1486286cda157a2fe86eJason W Kim//===----------------------------------------------------------------------===// 68897f06937449c593a248dbbb1365e6ae408fb9decChris Lattner 689988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbachstatic MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber, 690988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach unsigned LabelId, MCContext &Ctx) { 691988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach 692988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach MCSymbol *Label = Ctx.GetOrCreateSymbol(Twine(Prefix) 693988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId)); 694988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach return Label; 695988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach} 696988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach 6972c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbachstatic MCSymbolRefExpr::VariantKind 6982c4d5125c708bb35140fc2a40b02beb1add101dbJim GrosbachgetModifierVariantKind(ARMCP::ARMCPModifier Modifier) { 6992c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach switch (Modifier) { 7002c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach default: llvm_unreachable("Unknown modifier!"); 7012c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::no_modifier: return MCSymbolRefExpr::VK_None; 7022c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::TLSGD: return MCSymbolRefExpr::VK_ARM_TLSGD; 7032c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::TPOFF: return MCSymbolRefExpr::VK_ARM_TPOFF; 7042c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOTTPOFF: return MCSymbolRefExpr::VK_ARM_GOTTPOFF; 7052c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOT: return MCSymbolRefExpr::VK_ARM_GOT; 7062c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach case ARMCP::GOTOFF: return MCSymbolRefExpr::VK_ARM_GOTOFF; 7072c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach } 7082c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach return MCSymbolRefExpr::VK_None; 7092c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach} 7102c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach 7115de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan ChengMCSymbol *ARMAsmPrinter::GetARMGVSymbol(const GlobalValue *GV) { 7125de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng bool isIndirect = Subtarget->isTargetDarwin() && 7135de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel()); 7145de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng if (!isIndirect) 7155de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return Mang->getSymbol(GV); 7165de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 7175de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // FIXME: Remove this when Darwin transition to @GOT like syntax. 7185de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *MCSym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 7195de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MachineModuleInfoMachO &MMIMachO = 7205de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MMI->getObjFileInfo<MachineModuleInfoMachO>(); 7215de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MachineModuleInfoImpl::StubValueTy &StubSym = 7225de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(MCSym) : 7235de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MMIMachO.getGVStubEntry(MCSym); 7245de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng if (StubSym.getPointer() == 0) 7255de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng StubSym = MachineModuleInfoImpl:: 7265de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); 7275de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return MCSym; 7285de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng} 7295de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 7305df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbachvoid ARMAsmPrinter:: 7315df08d8f55f47aafc671c358d971dbcc10dfdeefJim GrosbachEmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { 7325df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach int Size = TM.getTargetData()->getTypeAllocSize(MCPV->getType()); 7335df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7345df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV); 7355df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7367c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSymbol *MCSym; 7375df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach if (ACPV->isLSDA()) { 7387c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach SmallString<128> Str; 7397c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach raw_svector_ostream OS(Str); 7405df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach OS << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber(); 7417c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = OutContext.GetOrCreateSymbol(OS.str()); 7425df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else if (ACPV->isBlockAddress()) { 7437c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = GetBlockAddressSymbol(ACPV->getBlockAddress()); 7445df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else if (ACPV->isGlobalValue()) { 7455df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach const GlobalValue *GV = ACPV->getGV(); 7465de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSym = GetARMGVSymbol(GV); 7475df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } else { 7485df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach assert(ACPV->isExtSymbol() && "unrecognized constant pool value"); 7497c7ddb21c3cc65ea08de8f90bb97cbdead3173f8Jim Grosbach MCSym = GetExternalSymbolSymbol(ACPV->getSymbol()); 7505df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 7515df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 7525df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach // Create an MCSymbol for the reference. 7532c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *Expr = 7542c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbolRefExpr::Create(MCSym, getModifierVariantKind(ACPV->getModifier()), 7552c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 7562c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach 7572c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach if (ACPV->getPCAdjustment()) { 7582c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbol *PCLabel = getPICLabel(MAI->getPrivateGlobalPrefix(), 7592c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach getFunctionNumber(), 7602c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach ACPV->getLabelId(), 7612c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 7622c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *PCRelExpr = MCSymbolRefExpr::Create(PCLabel, OutContext); 7632c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach PCRelExpr = 7642c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCBinaryExpr::CreateAdd(PCRelExpr, 7652c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCConstantExpr::Create(ACPV->getPCAdjustment(), 7662c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext), 7672c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutContext); 7682c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach if (ACPV->mustAddCurrentAddress()) { 7692c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach // We want "(<expr> - .)", but MC doesn't have a concept of the '.' 7702c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach // label, so just emit a local label end reference that instead. 7712c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach MCSymbol *DotSym = OutContext.CreateTempSymbol(); 7722c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutStreamer.EmitLabel(DotSym); 7732c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach const MCExpr *DotExpr = MCSymbolRefExpr::Create(DotSym, OutContext); 7742c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach PCRelExpr = MCBinaryExpr::CreateSub(PCRelExpr, DotExpr, OutContext); 7755df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 7762c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach Expr = MCBinaryExpr::CreateSub(Expr, PCRelExpr, OutContext); 7775df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach } 7782c4d5125c708bb35140fc2a40b02beb1add101dbJim Grosbach OutStreamer.EmitValue(Expr, Size); 7795df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach} 7805df08d8f55f47aafc671c358d971dbcc10dfdeefJim Grosbach 781a2244cb38781e596110023399c7902b5ee5087feJim Grosbachvoid ARMAsmPrinter::EmitJumpTable(const MachineInstr *MI) { 782a2244cb38781e596110023399c7902b5ee5087feJim Grosbach unsigned Opcode = MI->getOpcode(); 783a2244cb38781e596110023399c7902b5ee5087feJim Grosbach int OpNum = 1; 784a2244cb38781e596110023399c7902b5ee5087feJim Grosbach if (Opcode == ARM::BR_JTadd) 785a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OpNum = 2; 786a2244cb38781e596110023399c7902b5ee5087feJim Grosbach else if (Opcode == ARM::BR_JTm) 787a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OpNum = 3; 788a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 789a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineOperand &MO1 = MI->getOperand(OpNum); 790a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id 791a2244cb38781e596110023399c7902b5ee5087feJim Grosbach unsigned JTI = MO1.getIndex(); 792a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 793a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Emit a label for the jump table. 794a2244cb38781e596110023399c7902b5ee5087feJim Grosbach MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 795a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutStreamer.EmitLabel(JTISymbol); 796a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 797a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Emit each entry of the table. 798a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); 799a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); 800a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; 801a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 802a2244cb38781e596110023399c7902b5ee5087feJim Grosbach for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { 803a2244cb38781e596110023399c7902b5ee5087feJim Grosbach MachineBasicBlock *MBB = JTBBs[i]; 804a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // Construct an MCExpr for the entry. We want a value of the form: 805a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // (BasicBlockAddr - TableBeginAddr) 806a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // 807a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // For example, a table with entries jumping to basic blocks BB0 and BB1 808a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // would look like: 809a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // LJTI_0_0: 810a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // .word (LBB0 - LJTI_0_0) 811a2244cb38781e596110023399c7902b5ee5087feJim Grosbach // .word (LBB1 - LJTI_0_0) 812a2244cb38781e596110023399c7902b5ee5087feJim Grosbach const MCExpr *Expr = MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext); 813a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 814a2244cb38781e596110023399c7902b5ee5087feJim Grosbach if (TM.getRelocationModel() == Reloc::PIC_) 815a2244cb38781e596110023399c7902b5ee5087feJim Grosbach Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(JTISymbol, 816a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutContext), 817a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutContext); 818a2244cb38781e596110023399c7902b5ee5087feJim Grosbach OutStreamer.EmitValue(Expr, 4); 819a2244cb38781e596110023399c7902b5ee5087feJim Grosbach } 820a2244cb38781e596110023399c7902b5ee5087feJim Grosbach} 821a2244cb38781e596110023399c7902b5ee5087feJim Grosbach 822882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbachvoid ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) { 823882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach unsigned Opcode = MI->getOpcode(); 824882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; 825882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineOperand &MO1 = MI->getOperand(OpNum); 826882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id 827882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach unsigned JTI = MO1.getIndex(); 828882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 829882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Emit a label for the jump table. 830882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 831882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitLabel(JTISymbol); 832882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 833882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Emit each entry of the table. 834882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); 835882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); 836882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; 837205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach unsigned OffsetWidth = 4; 838d092a87ba3f905a6801a0bdf816267329cf0391cJim Grosbach if (MI->getOpcode() == ARM::t2TBB_JT) 839205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OffsetWidth = 1; 840d092a87ba3f905a6801a0bdf816267329cf0391cJim Grosbach else if (MI->getOpcode() == ARM::t2TBH_JT) 841205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OffsetWidth = 2; 842882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 843882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { 844882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MachineBasicBlock *MBB = JTBBs[i]; 845205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::Create(MBB->getSymbol(), 846205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 847882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // If this isn't a TBB or TBH, the entries are direct branch instructions. 848205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach if (OffsetWidth == 4) { 849882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCInst BrInst; 850882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach BrInst.setOpcode(ARM::t2B); 851205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr)); 852882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitInstruction(BrInst); 853882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach continue; 854882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 855882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Otherwise it's an offset from the dispatch instruction. Construct an 856205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // MCExpr for the entry. We want a value of the form: 857205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // (BasicBlockAddr - TableBeginAddr) / 2 858205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // 859205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // For example, a TBB table with entries jumping to basic blocks BB0 and BB1 860205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // would look like: 861205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // LJTI_0_0: 862205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // .byte (LBB0 - LJTI_0_0) / 2 863205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach // .byte (LBB1 - LJTI_0_0) / 2 864205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach const MCExpr *Expr = 865205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach MCBinaryExpr::CreateSub(MBBSymbolExpr, 866205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach MCSymbolRefExpr::Create(JTISymbol, OutContext), 867205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 868205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach Expr = MCBinaryExpr::CreateDiv(Expr, MCConstantExpr::Create(2, OutContext), 869205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutContext); 870205a5fa8e4233cdcdc71152c0f8c4334ea9ce2ebJim Grosbach OutStreamer.EmitValue(Expr, OffsetWidth); 871882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 872882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach} 873882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach 8742d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbachvoid ARMAsmPrinter::PrintDebugValueComment(const MachineInstr *MI, 8752d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach raw_ostream &OS) { 8762d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach unsigned NOps = MI->getNumOperands(); 8772d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach assert(NOps==4); 8782d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; 8792d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach // cast away const; DIetc do not take const operands for some reason. 8802d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata())); 8812d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << V.getName(); 8822d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << " <- "; 8832d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach // Frame address. Currently handles register +- offset only. 8842d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm()); 8852d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS); 8862d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << ']'; 8872d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OS << "+"; 8882d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach printOperand(MI, NOps-2, OS); 8892d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach} 8902d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach 89140edf73a62bf025eba4391e806fb1ddada662355Jim Grosbachstatic void populateADROperands(MCInst &Inst, unsigned Dest, 89240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach const MCSymbol *Label, 89340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach unsigned pred, unsigned ccreg, 89440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MCContext &Ctx) { 89540edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, Ctx); 89640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateReg(Dest)); 89740edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateExpr(SymbolExpr)); 89840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach // Add predicate operands. 89940edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateImm(pred)); 90040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach Inst.addOperand(MCOperand::CreateReg(ccreg)); 90140edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach} 90240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach 9034d7286083537833880901953d29786cf831affc4Anton Korobeynikovvoid ARMAsmPrinter::EmitPatchedInstruction(const MachineInstr *MI, 9044d7286083537833880901953d29786cf831affc4Anton Korobeynikov unsigned Opcode) { 9054d7286083537833880901953d29786cf831affc4Anton Korobeynikov MCInst TmpInst; 9064d7286083537833880901953d29786cf831affc4Anton Korobeynikov 9074d7286083537833880901953d29786cf831affc4Anton Korobeynikov // Emit the instruction as usual, just patch the opcode. 9084d7286083537833880901953d29786cf831affc4Anton Korobeynikov LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 9094d7286083537833880901953d29786cf831affc4Anton Korobeynikov TmpInst.setOpcode(Opcode); 9104d7286083537833880901953d29786cf831affc4Anton Korobeynikov OutStreamer.EmitInstruction(TmpInst); 9114d7286083537833880901953d29786cf831affc4Anton Korobeynikov} 9124d7286083537833880901953d29786cf831affc4Anton Korobeynikov 91357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikovvoid ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) { 91457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(MI->getFlag(MachineInstr::FrameSetup) && 91557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only instruction which are involved into frame setup code are allowed"); 91657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 91757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov const MachineFunction &MF = *MI->getParent()->getParent(); 91857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 919b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const ARMFunctionInfo &AFI = *MF.getInfo<ARMFunctionInfo>(); 92057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 92157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov unsigned FramePtr = RegInfo->getFrameRegister(MF); 92257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov unsigned Opc = MI->getOpcode(); 9237a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned SrcReg, DstReg; 9247a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov 9253daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov if (Opc == ARM::tPUSH || Opc == ARM::tLDRpci) { 9263daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // Two special cases: 9273daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // 1) tPUSH does not have src/dst regs. 9283daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // 2) for Thumb1 code we sometimes materialize the constant via constpool 9293daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // load. Yes, this is pretty fragile, but for now I don't see better 9303daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov // way... :( 9317a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov SrcReg = DstReg = ARM::SP; 9327a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov } else { 9333daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov SrcReg = MI->getOperand(1).getReg(); 9347a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov DstReg = MI->getOperand(0).getReg(); 9357a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov } 93657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 93757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Try to figure out the unwinding opcode out of src / dst regs. 93857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (MI->getDesc().mayStore()) { 93957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Register saves. 94057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(DstReg == ARM::SP && 94157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a destination reg is supported"); 94257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 94357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov SmallVector<unsigned, 4> RegList; 9447a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Skip src & dst reg, and pred ops. 9457a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned StartOp = 2 + 2; 9467a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Use all the operands. 9477a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov unsigned NumOffset = 0; 9487a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov 94957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov switch (Opc) { 95057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov default: 95157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 95257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 9537a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tPUSH: 9547a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov // Special case here: no src & dst reg, but two extra imp ops. 9557a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov StartOp = 2; NumOffset = 2; 95657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::STMDB_UPD: 9577a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::t2STMDB_UPD: 95857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::VSTMDDB_UPD: 95957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(SrcReg == ARM::SP && 96057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a source reg is supported"); 9617a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; 9627a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov i != NumOps; ++i) 96357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov RegList.push_back(MI->getOperand(i).getReg()); 96457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 96557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::STR_PRE: 96657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(MI->getOperand(2).getReg() == ARM::SP && 96757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov "Only stack pointer as a source reg is supported"); 96857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov RegList.push_back(SrcReg); 96957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 97057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 97157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov OutStreamer.EmitRegSave(RegList, Opc == ARM::VSTMDDB_UPD); 97257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else { 97357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Changes of stack / frame pointer. 97457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (SrcReg == ARM::SP) { 97557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov int64_t Offset = 0; 97657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov switch (Opc) { 97757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov default: 97857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 97957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 98057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::MOVr: 9817a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tMOVgpr2gpr: 9823daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov case ARM::tMOVgpr2tgpr: 98357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = 0; 98457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 98557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::ADDri: 98657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = -MI->getOperand(2).getImm(); 98757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 98857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov case ARM::SUBri: 9897a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::t2SUBrSPi: 99057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov Offset = MI->getOperand(2).getImm(); 99157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov break; 9927a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tSUBspi: 9937a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov Offset = MI->getOperand(2).getImm()*4; 9947a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov break; 9957a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tADDspi: 9967a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov case ARM::tADDrSPi: 9977a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov Offset = -MI->getOperand(2).getImm()*4; 9987a764168b9b3b3ebeaea224ed8c6ef93381c74d4Anton Korobeynikov break; 999b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov case ARM::tLDRpci: { 1000b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // Grab the constpool index and check, whether it corresponds to 1001b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // original or cloned constpool entry. 1002b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov unsigned CPI = MI->getOperand(1).getIndex(); 1003b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const MachineConstantPool *MCP = MF.getConstantPool(); 1004b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov if (CPI >= MCP->getConstants().size()) 1005b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov CPI = AFI.getOriginalCPIdx(CPI); 1006b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov assert(CPI != -1U && "Invalid constpool index"); 1007b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov 1008b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // Derive the actual offset. 1009b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov const MachineConstantPoolEntry &CPE = MCP->getConstants()[CPI]; 1010b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov assert(!CPE.isMachineConstantPoolEntry() && "Invalid constpool entry"); 1011b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov // FIXME: Check for user, it should be "add" instruction! 1012b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov Offset = -cast<ConstantInt>(CPE.Val.ConstVal)->getSExtValue(); 10133daccd82d3151fa3629de430b55698a81084fc9eAnton Korobeynikov break; 101457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 1015b3fcc06d2124f9d01e3b48097b44cc141309908eAnton Korobeynikov } 101657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 101757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (DstReg == FramePtr && FramePtr != ARM::SP) 1018e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // Set-up of the frame pointer. Positive values correspond to "add" 1019e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // instruction. 1020e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov OutStreamer.EmitSetFP(FramePtr, ARM::SP, -Offset); 102157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov else if (DstReg == ARM::SP) { 1022e516379d2a2fd1ad7583b2fa289051da517d8a42Anton Korobeynikov // Change of SP by an offset. Positive values correspond to "sub" 102357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // instruction. 102457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov OutStreamer.EmitPad(Offset); 102557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else { 102657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 102757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 102857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 102957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } else if (DstReg == ARM::SP) { 103057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // FIXME: .movsp goes here 103157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 103257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 103357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 103457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov else { 103557caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov MI->dump(); 103657caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov assert(0 && "Unsupported opcode for unwinding information"); 103757caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 103857caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov } 103957caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov} 104057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 104157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikovextern cl::opt<bool> EnableARMEHABI; 104257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 1043b454cdaebc6e4543099955ce043258c3903b1a0eJim Grosbachvoid ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { 10445de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng unsigned Opc = MI->getOpcode(); 10455de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng switch (Opc) { 10464d1522234192704f45dfd2527c2913fa60be616eChris Lattner default: break; 104772422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach case ARM::B: { 104872422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach // B is just a Bcc with an 'always' predicate. 104972422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach MCInst TmpInst; 105072422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 105172422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.setOpcode(ARM::Bcc); 105272422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach // Add predicate operands. 105372422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 105472422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 105572422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 105672422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach return; 105772422d38ba6fb2fb0bb9c0c75fe450b3e939ea21Jim Grosbach } 1058dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach case ARM::LDMIA_RET: { 1059dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // LDMIA_RET is just a normal LDMIA_UPD instruction that targets PC and as 1060dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // such has additional code-gen properties and scheduling information. 1061dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach // To emit it, we just construct as normal and set the opcode to LDMIA_UPD. 1062dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach MCInst TmpInst; 1063dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 1064dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach TmpInst.setOpcode(ARM::LDMIA_UPD); 1065dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1066dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach return; 1067dd11988c999c23eba2467e35892a2f42858c886bJim Grosbach } 10689702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2ADDrSPi: 10699702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2ADDrSPi12: 10709702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2SUBrSPi: 10719702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach case ARM::t2SUBrSPi12: 1072766a63d20e89ad5a8b19aba2df0128c1f73174b3Jim Grosbach assert ((MI->getOperand(1).getReg() == ARM::SP) && 1073766a63d20e89ad5a8b19aba2df0128c1f73174b3Jim Grosbach "Unexpected source register!"); 10749702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach break; 10759702e6075c3e4cd508fd787e3bf6b3e64eb029abJim Grosbach 1076112f2390e19774a54c2dd50391b99fb617da0973Chris Lattner case ARM::t2MOVi32imm: assert(0 && "Should be lowered by thumb2it pass"); 10772d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach case ARM::DBG_VALUE: { 10782d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach if (isVerbose() && OutStreamer.hasRawTextSupport()) { 10792d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach SmallString<128> TmpStr; 10802d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach raw_svector_ostream OS(TmpStr); 10812d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach PrintDebugValueComment(MI, OS); 10822d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach OutStreamer.EmitRawText(StringRef(OS.str())); 10832d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach } 10842d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach return; 10852d0f53bd6348be3b28ffa53c37e3079bb33dd170Jim Grosbach } 10863efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach case ARM::tBfar: { 10873efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach MCInst TmpInst; 10883efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach TmpInst.setOpcode(ARM::tBL); 10893efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create( 10903efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach MI->getOperand(0).getMBB()->getSymbol(), OutContext))); 10913efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach OutStreamer.EmitInstruction(TmpInst); 10923efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach return; 10933efad8fad41f6ba8141befcc3fc6662246b663adJim Grosbach } 109440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach case ARM::LEApcrel: 1095d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::tLEApcrel: 109640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach case ARM::t2LEApcrel: { 1097dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach // FIXME: Need to also handle globals and externals 1098dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach MCInst TmpInst; 1099d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrel ? ARM::t2ADR 1100d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : (MI->getOpcode() == ARM::tLEApcrel ? ARM::tADR 1101d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : ARM::ADR)); 110240edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach populateADROperands(TmpInst, MI->getOperand(0).getReg(), 110340edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach GetCPISymbol(MI->getOperand(1).getIndex()), 110440edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(2).getImm(), MI->getOperand(3).getReg(), 110540edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach OutContext); 1106dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1107dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach return; 1108dff84b03258514463ede477af38f1246b95b0cd0Jim Grosbach } 1109d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::LEApcrelJT: 1110d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::tLEApcrelJT: 1111d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach case ARM::t2LEApcrelJT: { 11125d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach MCInst TmpInst; 1113d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach TmpInst.setOpcode(MI->getOpcode() == ARM::t2LEApcrelJT ? ARM::t2ADR 1114d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : (MI->getOpcode() == ARM::tLEApcrelJT ? ARM::tADR 1115d40963c4065432ec7e47879d3ca665a54ee903b6Jim Grosbach : ARM::ADR)); 111640edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach populateADROperands(TmpInst, MI->getOperand(0).getReg(), 111740edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach GetARMJTIPICJumpTableLabel2(MI->getOperand(1).getIndex(), 111840edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(2).getImm()), 111940edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach MI->getOperand(3).getImm(), MI->getOperand(4).getReg(), 112040edf73a62bf025eba4391e806fb1ddada662355Jim Grosbach OutContext); 11215d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11225d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach return; 11235d14f9be7ba64162c7b996f36d419b11d8cdbe9aJim Grosbach } 11242e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach case ARM::MOVPCRX: { 11252e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach MCInst TmpInst; 11262e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 11272e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 11282e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 11292e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach // Add predicate operands. 11302e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 11312e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 11322e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach // Add 's' bit operand (always reg0 for this) 11332e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 11342e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1135f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach return; 1136f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach } 1137f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach // Darwin call instructions are just normal call instructions with different 1138f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach // clobber semantics (they clobber R9). 1139f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9: 1140f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9_pred: 1141f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9: 1142f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9_pred: { 1143f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach unsigned newOpc; 1144f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach switch (Opc) { 1145f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach default: assert(0); 1146f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9: newOpc = ARM::BL; break; 1147f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLr9_pred: newOpc = ARM::BL_pred; break; 1148f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9: newOpc = ARM::BLX; break; 1149f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach case ARM::BLXr9_pred: newOpc = ARM::BLX_pred; break; 1150f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach } 1151f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach MCInst TmpInst; 1152f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 1153f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach TmpInst.setOpcode(newOpc); 1154f859a545de30bbc848d1b0896b7ef8fa84fd631bJim Grosbach OutStreamer.EmitInstruction(TmpInst); 11552e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach return; 11562e812e1635422d0ec71cb4bda3f4d654857913f1Jim Grosbach } 1157a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BXr9_CALL: 1158a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BX_CALL: { 1159a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1160a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1161a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1162a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1163a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1164a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1165a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1166a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1167a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1168a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1169a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1170a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1171a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1172a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1173a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::BX); 1174a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1175a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1176a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1177a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach return; 1178a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1179a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BMOVPCRXr9_CALL: 1180a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach case ARM::BMOVPCRX_CALL: { 1181a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1182a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1183a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1184a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); 1185a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1186a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1187a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1188a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1189a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1190a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1191a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1192a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1193a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach { 1194a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach MCInst TmpInst; 1195a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.setOpcode(ARM::MOVr); 1196a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1197a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1198a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add predicate operands. 1199a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1200a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1201a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1202a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1203a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1204a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 1205a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach return; 1206a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach } 120753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOVi16_ga_pcrel: 120853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOVi16_ga_pcrel: { 12095de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCInst TmpInst; 121053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); 12115de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 12125de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 121353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned TF = MI->getOperand(1).getTargetFlags(); 121453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = TF == ARMII::MO_LO16_NONLAZY_PIC; 12155de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const GlobalValue *GV = MI->getOperand(1).getGlobal(); 12165de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *GVSym = GetARMGVSymbol(GV); 12175de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext); 121853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (isPIC) { 121953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(), 122053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng getFunctionNumber(), 122153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI->getOperand(2).getImm(), OutContext); 122253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext); 122353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4; 122453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *PCRelExpr = 122553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ARMMCExpr::CreateLower16(MCBinaryExpr::CreateSub(GVSymExpr, 122653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCBinaryExpr::CreateAdd(LabelSymExpr, 122753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCConstantExpr::Create(PCAdj, OutContext), 12285de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutContext), OutContext), OutContext); 122953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); 123053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } else { 123153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *RefExpr= ARMMCExpr::CreateLower16(GVSymExpr, OutContext); 123253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); 123353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 123453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 12355de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add predicate operands. 12365de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 12375de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 12385de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add 's' bit operand (always reg0 for this) 12395de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 12405de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutStreamer.EmitInstruction(TmpInst); 12415de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return; 12425de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 124353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::MOVTi16_ga_pcrel: 124453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng case ARM::t2MOVTi16_ga_pcrel: { 12455de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCInst TmpInst; 124653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel 124753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ? ARM::MOVTi16 : ARM::t2MOVTi16); 12485de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 12495de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 12505de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 125153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned TF = MI->getOperand(2).getTargetFlags(); 125253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng bool isPIC = TF == ARMII::MO_HI16_NONLAZY_PIC; 12535de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const GlobalValue *GV = MI->getOperand(2).getGlobal(); 12545de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MCSymbol *GVSym = GetARMGVSymbol(GV); 12555de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext); 125653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng if (isPIC) { 125753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(), 125853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng getFunctionNumber(), 125953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MI->getOperand(3).getImm(), OutContext); 126053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext); 126153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4; 126253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *PCRelExpr = 126353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng ARMMCExpr::CreateUpper16(MCBinaryExpr::CreateSub(GVSymExpr, 126453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCBinaryExpr::CreateAdd(LabelSymExpr, 126553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MCConstantExpr::Create(PCAdj, OutContext), 12665de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutContext), OutContext), OutContext); 126753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); 126853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } else { 126953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng const MCExpr *RefExpr= ARMMCExpr::CreateUpper16(GVSymExpr, OutContext); 127053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); 127153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng } 12725de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add predicate operands. 12735de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 12745de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 12755de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // Add 's' bit operand (always reg0 for this) 12765de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng TmpInst.addOperand(MCOperand::CreateReg(0)); 12775de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng OutStreamer.EmitInstruction(TmpInst); 12785de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng return; 12795de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng } 1280fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach case ARM::tPICADD: { 1281fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // This is a pseudo op for a label + instruction sequence, which looks like: 1282fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // LPC0: 1283fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // add r0, pc 1284fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // This adds the address of LPC0 to r0. 1285fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach 1286fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Emit the label. 1287988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1288988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1289988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1290fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach 1291fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Form and emit the add. 1292fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach MCInst AddInst; 1293fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.setOpcode(ARM::tADDhirr); 1294fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1295fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1296fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1297fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach // Add predicate operands. 1298fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1299fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(0)); 1300fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach OutStreamer.EmitInstruction(AddInst); 1301fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach return; 1302fbd1873041783f388de1c36c5d46c82a9ad46ef3Jim Grosbach } 1303a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::PICADD: { 13044d1522234192704f45dfd2527c2913fa60be616eChris Lattner // This is a pseudo op for a label + instruction sequence, which looks like: 13054d1522234192704f45dfd2527c2913fa60be616eChris Lattner // LPC0: 13064d1522234192704f45dfd2527c2913fa60be616eChris Lattner // add r0, pc, r0 13074d1522234192704f45dfd2527c2913fa60be616eChris Lattner // This adds the address of LPC0 to r0. 1308b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 13094d1522234192704f45dfd2527c2913fa60be616eChris Lattner // Emit the label. 1310988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1311988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1312988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1313b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 1314f3f09527e6484143fcdef2ddfef0b2f016881e36Jim Grosbach // Form and emit the add. 13154d1522234192704f45dfd2527c2913fa60be616eChris Lattner MCInst AddInst; 13164d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.setOpcode(ARM::ADDrr); 13174d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 13184d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); 13194d1522234192704f45dfd2527c2913fa60be616eChris Lattner AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 13205b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach // Add predicate operands. 13215b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); 13225b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); 13235b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach // Add 's' bit operand (always reg0 for this) 13245b46d62c4459dbfd56bb6ac650a271cd02365092Jim Grosbach AddInst.addOperand(MCOperand::CreateReg(0)); 1325850d2e2a1b58ea30abed10ca955259d60d07d97aChris Lattner OutStreamer.EmitInstruction(AddInst); 13264d1522234192704f45dfd2527c2913fa60be616eChris Lattner return; 1327b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach } 1328a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTR: 1329a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRB: 1330a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRH: 1331a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDR: 1332a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRB: 1333a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRH: 1334a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSB: 1335a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSH: { 1336b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // This is a pseudo op for a label + instruction sequence, which looks like: 1337b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // LPC0: 1338a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach // OP r0, [pc, r0] 1339b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // The LCP0 label is referenced by a constant pool entry in order to get 1340b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // a PC-relative address at the ldr instruction. 1341b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1342b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Emit the label. 1343988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), 1344988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach getFunctionNumber(), MI->getOperand(2).getImm(), 1345988ce097b7774ebc935ea539f3d88c2dcc3405b2Jim Grosbach OutContext)); 1346b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1347b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Form and emit the load 1348a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach unsigned Opcode; 1349a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach switch (MI->getOpcode()) { 1350a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach default: 1351a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach llvm_unreachable("Unexpected opcode!"); 13527e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach case ARM::PICSTR: Opcode = ARM::STRrs; break; 13537e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach case ARM::PICSTRB: Opcode = ARM::STRBrs; break; 1354a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICSTRH: Opcode = ARM::STRH; break; 13553e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach case ARM::PICLDR: Opcode = ARM::LDRrs; break; 1356c1d30212e911d1e55ff6b25bffefb503708883c3Jim Grosbach case ARM::PICLDRB: Opcode = ARM::LDRBrs; break; 1357a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRH: Opcode = ARM::LDRH; break; 1358a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSB: Opcode = ARM::LDRSB; break; 1359a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach case ARM::PICLDRSH: Opcode = ARM::LDRSH; break; 1360a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach } 1361a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach MCInst LdStInst; 1362a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.setOpcode(Opcode); 1363a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 1364a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1365a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 1366a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateImm(0)); 1367b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach // Add predicate operands. 1368a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); 1369a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); 1370a28abbe24568d39414be7ccb7a1f659f40e487e2Jim Grosbach OutStreamer.EmitInstruction(LdStInst); 1371b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach 1372b74ca9d63104c94b800f2763a654d19f3eb30304Jim Grosbach return; 13734d1522234192704f45dfd2527c2913fa60be616eChris Lattner } 1374a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::CONSTPOOL_ENTRY: { 1375a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool 1376a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// in the function. The first operand is the ID# for this instruction, the 1377a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// second is the index into the MachineConstantPool that this is, the third 1378a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner /// is the size in bytes of this constant pool entry. 1379a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner unsigned LabelId = (unsigned)MI->getOperand(0).getImm(); 1380a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex(); 1381a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner 1382a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitAlignment(2); 13831b46f433e02155daba8ed3b1269c86ce63c9713bChris Lattner OutStreamer.EmitLabel(GetCPISymbol(LabelId)); 1384a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner 1385a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx]; 1386a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner if (MCPE.isMachineConstantPoolEntry()) 1387a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal); 1388a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner else 1389a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner EmitGlobalConstant(MCPE.Val.ConstVal); 1390b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 1391a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner return; 1392a70e644820db9c58f201bd27ed3c28f81261a0d9Chris Lattner } 1393882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach case ARM::t2BR_JT: { 1394882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 1395882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach MCInst TmpInst; 13965ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::tMOVgpr2gpr); 13975ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 13985ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 13995ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14005ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14015ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14025ca66696e734f963b613de51e3df3684395daf1cJim Grosbach OutStreamer.EmitInstruction(TmpInst); 14035ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 14045ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitJump2Table(MI); 14055ca66696e734f963b613de51e3df3684395daf1cJim Grosbach return; 14065ca66696e734f963b613de51e3df3684395daf1cJim Grosbach } 14075ca66696e734f963b613de51e3df3684395daf1cJim Grosbach case ARM::t2TBB_JT: { 14085ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14095ca66696e734f963b613de51e3df3684395daf1cJim Grosbach MCInst TmpInst; 14105ca66696e734f963b613de51e3df3684395daf1cJim Grosbach 14115ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::t2TBB); 14125ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14135ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14145ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14155ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14165ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14175ca66696e734f963b613de51e3df3684395daf1cJim Grosbach OutStreamer.EmitInstruction(TmpInst); 14185ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 14195ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitJump2Table(MI); 14205ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Make sure the next instruction is 2-byte aligned. 14215ca66696e734f963b613de51e3df3684395daf1cJim Grosbach EmitAlignment(1); 14225ca66696e734f963b613de51e3df3684395daf1cJim Grosbach return; 14235ca66696e734f963b613de51e3df3684395daf1cJim Grosbach } 14245ca66696e734f963b613de51e3df3684395daf1cJim Grosbach case ARM::t2TBH_JT: { 14255ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14265ca66696e734f963b613de51e3df3684395daf1cJim Grosbach MCInst TmpInst; 14275ca66696e734f963b613de51e3df3684395daf1cJim Grosbach 14285ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.setOpcode(ARM::t2TBH); 14295ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14305ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14315ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Add predicate operands. 14325ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14335ca66696e734f963b613de51e3df3684395daf1cJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1434882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 14355ca66696e734f963b613de51e3df3684395daf1cJim Grosbach // Output the data for the jump table itself 1436882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach EmitJump2Table(MI); 1437882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach return; 1438882ef2b76a09cdc39d38756fca71cf6cf25ae590Jim Grosbach } 1439f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach case ARM::tBR_JTr: 14402dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach case ARM::BR_JTr: { 14412dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14422dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // mov pc, target 14432dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 14445ca66696e734f963b613de51e3df3684395daf1cJim Grosbach unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? 14455ca66696e734f963b613de51e3df3684395daf1cJim Grosbach ARM::MOVr : ARM::tMOVgpr2gpr; 1446f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach TmpInst.setOpcode(Opc); 14472dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14482dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14492dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Add predicate operands. 14502dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14512dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1452a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach // Add 's' bit operand (always reg0 for this) 1453a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach if (Opc == ARM::MOVr) 1454a0d2c8a40f890345237abfa9cece16c517e1e280Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14552dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 14562dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach 1457f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach // Make sure the Thumb jump table is 4-byte aligned. 1458a68a4fdf37676794ce69624d1fd4e4627c377902Bill Wendling if (Opc == ARM::tMOVgpr2gpr) 1459f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach EmitAlignment(2); 1460f1aa47dc1aed018e2f70ffe7d32dba51e2ac45feJim Grosbach 14612dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Output the data for the jump table itself 14622dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach EmitJumpTable(MI); 14632dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach return; 14642dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } 14652dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach case ARM::BR_JTm: { 14662dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Lower and emit the instruction itself, then the jump table following it. 14672dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // ldr pc, target 14682dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 14692dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach if (MI->getOperand(1).getReg() == 0) { 14702dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // literal offset 14712dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 14722dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14732dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14742dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); 14752dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } else { 14762dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::LDRrs); 14772dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14782dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14792dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 14802dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 14812dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach } 14822dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Add predicate operands. 14832dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 14842dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 14852dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 14862dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach 14872dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach // Output the data for the jump table itself 1488a2244cb38781e596110023399c7902b5ee5087feJim Grosbach EmitJumpTable(MI); 1489a2244cb38781e596110023399c7902b5ee5087feJim Grosbach return; 1490a2244cb38781e596110023399c7902b5ee5087feJim Grosbach } 1491f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach case ARM::BR_JTadd: { 1492f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Lower and emit the instruction itself, then the jump table following it. 1493f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // add pc, target, idx 14942dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach MCInst TmpInst; 14952dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.setOpcode(ARM::ADDrr); 14962dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 14972dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 14982dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); 1499f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Add predicate operands. 15002dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 15012dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1502f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Add 's' bit operand (always reg0 for this) 15032dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 15042dc7768d73c9afa3a23b86ee7827bc8de426f459Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1505f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach 1506f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach // Output the data for the jump table itself 1507f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach EmitJumpTable(MI); 1508f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach return; 1509f8dabac6041b2a38307a5ab0beb330ededb7514bJim Grosbach } 15102e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach case ARM::TRAP: { 15112e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // Non-Darwin binutils don't yet support the "trap" mnemonic. 15122e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // FIXME: Remove this special case when they do. 15132e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach if (!Subtarget->isTargetDarwin()) { 151478890f41f404fad3663408edd4adf2e13c1e13b5Jim Grosbach //.long 0xe7ffdefe @ trap 1515b2dda4bd346fe9a2795f83f659c0e60191b2e6a0Jim Grosbach uint32_t Val = 0xe7ffdefeUL; 15162e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.AddComment("trap"); 15172e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.EmitIntValue(Val, 4); 15182e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach return; 15192e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15202e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach break; 15212e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15222e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach case ARM::tTRAP: { 15232e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // Non-Darwin binutils don't yet support the "trap" mnemonic. 15242e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach // FIXME: Remove this special case when they do. 15252e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach if (!Subtarget->isTargetDarwin()) { 152678890f41f404fad3663408edd4adf2e13c1e13b5Jim Grosbach //.short 57086 @ trap 1527c8ab9eb066f6d35880e3a24436baf21236c921caBenjamin Kramer uint16_t Val = 0xdefe; 15282e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.AddComment("trap"); 15292e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach OutStreamer.EmitIntValue(Val, 2); 15302e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach return; 15312e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 15322e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach break; 15332e6ae13bf6e09d844b76b0a12861d25be0842b03Jim Grosbach } 1534433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach case ARM::t2Int_eh_sjlj_setjmp: 1535433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach case ARM::t2Int_eh_sjlj_setjmp_nofp: 1536a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::tInt_eh_sjlj_setjmp: { 1537433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Two incoming args: GPR:$src, GPR:$val 1538433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // mov $val, pc 1539433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // adds $val, #7 1540433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // str $val, [$src, #4] 1541433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // movs r0, #0 1542433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // b 1f 1543433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // movs r0, #1 1544433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 1: 1545433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1546433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach unsigned ValReg = MI->getOperand(1).getReg(); 1547433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCSymbol *Label = GetARMSJLJEHLabel(); 1548433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1549433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1550433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVgpr2tgpr); 1551433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1552433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1553433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 's' bit operand 1554433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1555433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.AddComment("eh_setjmp begin"); 1556433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1557433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1558433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1559433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1560433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tADDi3); 1561433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1562433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // 's' bit operand 1563433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1564433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1565433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(7)); 1566433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1567433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1568433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1569433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1570433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1571433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1572433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1573f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tSTRi); 1574433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1575433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1576433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // The offset immediate is #4. The operand value is scaled by 4 for the 1577433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // tSTR instruction. 1578433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1579433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1580433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1581433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1582433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1583433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1584433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1585433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1586433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVi8); 1587433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1588433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1589433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1590433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1591433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1592433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1593433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1594433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1595433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1596433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, OutContext); 1597433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1598433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tB); 1599433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr)); 1600433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1601433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1602433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach { 1603433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach MCInst TmpInst; 1604433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.setOpcode(ARM::tMOVi8); 1605433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1606433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); 1607433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1608433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach // Predicate. 1609433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1610433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1611433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.AddComment("eh_setjmp end"); 1612433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitInstruction(TmpInst); 1613433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1614433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach OutStreamer.EmitLabel(Label); 1615433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach return; 1616433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach } 1617433a5785cc8201a8a384f0a5648d3dbac87f9fbcJim Grosbach 1618453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach case ARM::Int_eh_sjlj_setjmp_nofp: 1619a3fbadfcd882f9f15bda7c1213b5ff52d6582a10Jim Grosbach case ARM::Int_eh_sjlj_setjmp: { 1620453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Two incoming args: GPR:$src, GPR:$val 1621453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // add $val, pc, #8 1622453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // str $val, [$src, #+4] 1623453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // mov r0, #0 1624453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // add pc, pc, #0 1625453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // mov r0, #1 1626453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1627453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach unsigned ValReg = MI->getOperand(1).getReg(); 1628453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach 1629453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1630453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1631453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::ADDri); 1632453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1633453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1634453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(8)); 1635453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1636453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1637453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1638453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1639453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1640453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.AddComment("eh_setjmp begin"); 1641453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1642453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1643453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1644453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 16457e3383c007f53b3a00675af225e428cb66ddf404Jim Grosbach TmpInst.setOpcode(ARM::STRi12); 1646453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ValReg)); 1647453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1648453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(4)); 1649453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1650453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1651453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1652453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1653453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1654453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1655453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1656453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::MOVi); 1657453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1658453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1659453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1660453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1661453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1662453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1663453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1664453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1665453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1666453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1667453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1668453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::ADDri); 1669453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1670453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); 1671453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 1672453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1673453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1674453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1675453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1676453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1677453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1678453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1679453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach { 1680453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach MCInst TmpInst; 1681453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.setOpcode(ARM::MOVi); 1682453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); 1683453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1684453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // Predicate. 1685453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1686453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1687453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach // 's' bit operand (always reg0 for this). 1688453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1689453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.AddComment("eh_setjmp end"); 1690453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1691453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 1692453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach return; 1693453900814e5245fd823b2b24ee9da9b5e8b4bfc4Jim Grosbach } 16945acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach case ARM::Int_eh_sjlj_longjmp: { 16955acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr sp, [$src, #8] 16965acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr $scratch, [$src, #4] 16975acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // ldr r7, [$src] 16985acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // bx $scratch 16995acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 17005acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach unsigned ScratchReg = MI->getOperand(1).getReg(); 17015acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17025acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17033e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17045acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); 17055acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17065acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(8)); 17075acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17085acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17095acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17105acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17115acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17125acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17135acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17143e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17155acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 17165acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17175acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(4)); 17185acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17195acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17205acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17215acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17225acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17235acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17245acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17253e5561247202bae994dd259a2d8dc4eff8f799f3Jim Grosbach TmpInst.setOpcode(ARM::LDRi12); 17265acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); 17275acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 17285acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(0)); 17295acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17305acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17315acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 17325acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 17335acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 17345acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach { 17355acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach MCInst TmpInst; 17366e46d84eea97792a66c0bb64f26aad3976a23365Bill Wendling TmpInst.setOpcode(ARM::BX); 17375acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 17385acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach // Predicate. 17395acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 17405acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1741385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1742385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1743385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach return; 1744385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1745385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach case ARM::tInt_eh_sjlj_longjmp: { 1746385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr $scratch, [$src, #8] 1747385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // mov sp, $scratch 1748385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr $scratch, [$src, #4] 1749385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // ldr r7, [$src] 1750385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // bx $scratch 1751385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach unsigned SrcReg = MI->getOperand(0).getReg(); 1752385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach unsigned ScratchReg = MI->getOperand(1).getReg(); 1753385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1754385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1755f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRi); 1756385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1757385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1758385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // The offset immediate is #8. The operand value is scaled by 4 for the 1759f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling // tLDR instruction. 1760385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(2)); 1761385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1762385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1763385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1764385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1765385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1766385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1767385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1768385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.setOpcode(ARM::tMOVtgpr2gpr); 1769385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); 1770385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1771385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1772385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1773385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1774385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1775385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1776385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1777385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1778f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRi); 1779385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1780385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1781385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(1)); 1782385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1783385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1784385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1785385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1786385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1787385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1788385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1789f4caf69720d807573c50d41aa06bcec1c99bdbbdBill Wendling TmpInst.setOpcode(ARM::tLDRr); 1790385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); 1791385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); 1792385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1793385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1794385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1795385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 1796385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 1797385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach } 1798385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach { 1799385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach MCInst TmpInst; 1800385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.setOpcode(ARM::tBX_RET_vararg); 1801385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); 1802385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach // Predicate. 1803385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 1804385cc5eede9f81717b03121baf47b7aa185b5128Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18055acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach OutStreamer.EmitInstruction(TmpInst); 18065acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18075acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach return; 18085acb3de8b7cfd5a104722526b731a3c87bb1a46eJim Grosbach } 18095edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Tail jump branches are really just branch instructions with additional 18107a2bdde0a0eebcd2125055e0eacaca040f0b766cChris Lattner // code-gen attributes. Convert them to the canonical form here. 18115edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPd: 18125edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPdND: { 18135edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst, TmpInst2; 18145edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Lower the instruction as-is to get the operands properly converted. 18155edf24efac40062766c643e08f11bc509d373370Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst2, *this); 18165edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(ARM::Bcc); 18175edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(TmpInst2.getOperand(0)); 18185edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Add predicate operands. 18195edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 18205edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18215edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 18225edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 18235edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 18245edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 18255edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPd: 18265edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPdND: { 18275edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst, TmpInst2; 18285edf24efac40062766c643e08f11bc509d373370Jim Grosbach LowerARMMachineInstrToMCInst(MI, TmpInst2, *this); 18295edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(ARM::tB); 18305edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(TmpInst2.getOperand(0)); 18315edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 18325edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 18335edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 18345edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 18355edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPrND: 18365edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPrND: 18375edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::TAILJMPr: 18385edf24efac40062766c643e08f11bc509d373370Jim Grosbach case ARM::tTAILJMPr: { 18395edf24efac40062766c643e08f11bc509d373370Jim Grosbach unsigned newOpc = (Opc == ARM::TAILJMPr || Opc == ARM::TAILJMPrND) 18405edf24efac40062766c643e08f11bc509d373370Jim Grosbach ? ARM::BX : ARM::tBX; 18415edf24efac40062766c643e08f11bc509d373370Jim Grosbach MCInst TmpInst; 18425edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.setOpcode(newOpc); 18435edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); 18445edf24efac40062766c643e08f11bc509d373370Jim Grosbach // Predicate. 18455edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 18465edf24efac40062766c643e08f11bc509d373370Jim Grosbach TmpInst.addOperand(MCOperand::CreateReg(0)); 18475edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.AddComment("TAILCALL"); 18485edf24efac40062766c643e08f11bc509d373370Jim Grosbach OutStreamer.EmitInstruction(TmpInst); 18495edf24efac40062766c643e08f11bc509d373370Jim Grosbach return; 18505edf24efac40062766c643e08f11bc509d373370Jim Grosbach } 18515edf24efac40062766c643e08f11bc509d373370Jim Grosbach 18524d7286083537833880901953d29786cf831affc4Anton Korobeynikov // These are the pseudos created to comply with stricter operand restrictions 18534d7286083537833880901953d29786cf831affc4Anton Korobeynikov // on ARMv5. Lower them now to "normal" instructions, since all the 18544d7286083537833880901953d29786cf831affc4Anton Korobeynikov // restrictions are already satisfied. 18554d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::MULv5: 18564d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::MUL); 18574d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 18584d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::MLAv5: 18594d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::MLA); 18604d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 18614d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::SMULLv5: 18624d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::SMULL); 18634d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 18644d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMULLv5: 18654d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMULL); 18664d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 18674d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::SMLALv5: 18684d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::SMLAL); 18694d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 18704d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMLALv5: 18714d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMLAL); 18724d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 18734d7286083537833880901953d29786cf831affc4Anton Korobeynikov case ARM::UMAALv5: 18744d7286083537833880901953d29786cf831affc4Anton Korobeynikov EmitPatchedInstruction(MI, ARM::UMAAL); 18754d7286083537833880901953d29786cf831affc4Anton Korobeynikov return; 187697f06937449c593a248dbbb1365e6ae408fb9decChris Lattner } 1877b0739b78332275906cd5ace2ae0d65a29135667bJim Grosbach 187897f06937449c593a248dbbb1365e6ae408fb9decChris Lattner MCInst TmpInst; 187930e2cc254be72601b11383dda01f495741ffd56cChris Lattner LowerARMMachineInstrToMCInst(MI, TmpInst, *this); 188057caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 188157caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov // Emit unwinding stuff for frame-related instructions 188257caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov if (EnableARMEHABI && MI->getFlag(MachineInstr::FrameSetup)) 188357caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov EmitUnwindingInstruction(MI); 188457caad7a33ff145b71545f10dcfbbf2fd0f595d3Anton Korobeynikov 1885850d2e2a1b58ea30abed10ca955259d60d07d97aChris Lattner OutStreamer.EmitInstruction(TmpInst); 188697f06937449c593a248dbbb1365e6ae408fb9decChris Lattner} 18872685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 18882685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar//===----------------------------------------------------------------------===// 18892685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar// Target Registry Stuff 18902685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar//===----------------------------------------------------------------------===// 18912685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 18922685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbarstatic MCInstPrinter *createARMMCInstPrinter(const Target &T, 1893a5c177e70a42f48e4885075c4c48aad0816a2817Bill Wendling TargetMachine &TM, 18942685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar unsigned SyntaxVariant, 1895d374087be5360a353a4239a155b1227057145f48Chris Lattner const MCAsmInfo &MAI) { 18962685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar if (SyntaxVariant == 0) 1897a5c177e70a42f48e4885075c4c48aad0816a2817Bill Wendling return new ARMInstPrinter(TM, MAI); 18982685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar return 0; 18992685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar} 19002685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19012685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar// Force static initialization. 19022685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbarextern "C" void LLVMInitializeARMAsmPrinter() { 19032685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget); 19042685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget); 19052685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 19062685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter); 19072685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter); 19082685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar} 19092685a29a8d4ced7791bb671e28f9fe51c74eb3bbDaniel Dunbar 1910